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vhdlpp: Turn on the reg_flag for types that cannot be packed.

This commit is contained in:
Maciej Suminski 2014-08-22 16:22:59 +02:00
parent 27730395ca
commit 0a2100c87f
2 changed files with 6 additions and 2 deletions
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4
vhdlpp/expression_emit.cc
View File

@ -244,6 +244,10 @@ int ExpAggregate::emit_array_(ostream&out, Entity*ent, Architecture*arc, const V
// Emit the elements as a concatenation. This works great for
// vectors of bits. We implement VHDL arrays as packed arrays,
// so this should be generally correct.
// TODO uncomment this once ivl supports assignments of '{}
/*if(!peek_type()->can_be_packed())
out << "'";*/
out << "{";
for (int64_t idx = use_msb ; idx >= use_lsb ; idx -= 1) {
choice_element*cur = element_map[idx];

4
vhdlpp/vsignal.cc
View File

@ -68,7 +68,7 @@ int Signal::emit(ostream&out, Entity*ent, Architecture*arc)
VType::decl_t decl;
type_elaborate_(decl);
if (peek_refcnt_sequ_() > 0)
if (peek_refcnt_sequ_() > 0 || !peek_type()->can_be_packed())
decl.reg_flag = true;
errors += decl.emit(out, peek_name_());
@ -87,7 +87,7 @@ int Variable::emit(ostream&out, Entity*, Architecture*)
VType::decl_t decl;
type_elaborate_(decl);
if (peek_refcnt_sequ_() > 0)
if (peek_refcnt_sequ_() > 0 || !peek_type()->can_be_packed())
decl.reg_flag = true;
errors += decl.emit(out, peek_name_());
out << ";" << endl;