9759c19734
Implement release of linked force nodes
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When nets are forced by non-constant expressions, the value is linked
to the destination net through a force_link. This patch adds the code
needed to unlink a force/link so that release and new force/links can
work. This fixes pr1735836.
Signed-off-by: Stephen Williams <steve@icarus.com>
2007-11-13 19:35:44 -08:00
acdbe274f9
Fix signed ocmpare of negative numbers.
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signed compare in proceedural code was comparing the absolute
value if both operands were negative. Wrong!
Signed-off-by: Stephen Williams <steve@icarus.com>
2007-10-03 22:26:42 -07:00
5d750b7779
Optomize runtime using immediate compare
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Implement compare-immediate instructions and generate code to use
these new instructions to improve runtime performance.
Signed-off-by: Stephen Williams <steve@icarus.com>
2007-10-03 20:58:40 -07:00
e75e7131ac
Fix signed compare with minus values
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If the operands were negative, and not equal, the lt flag
would be set incorrectly.
Signed-off-by: Stephen Williams <steve@icarus.com>
2007-07-02 21:33:05 -07:00
d7c3a32b06
Fix code generation for real expressions
...
Real value are vector width of 1, fix real literal to reflect this.
fix leaking real registers in code generation for function arguments.
Load of signal should handle conversion from real to vector. Function
arguments, type vector passed a real value, are an example where this
comes up.
Signed-off-by: Stephen Williams <steve@icarus.com>
2007-06-29 21:10:37 -07:00
e24e77660f
Detect and use the nan function.
2007-06-13 01:03:57 +00:00
ae82eccdc4
handle constant inf values.
2007-06-12 02:36:58 +00:00
0a38499941
Properly handle signed conversion to real
2007-06-07 03:20:15 +00:00
55f8e5d364
int vs long expressions on 64bit arch (ldoolitt)
2007-06-05 21:52:22 +00:00
9931e4c013
Finish up part select of array words.
2007-04-14 04:43:01 +00:00
4f74d9df98
Add the mov/wr opcode.
2007-02-14 05:58:14 +00:00
d958a4a5af
Handle relink of continuous assignment.
2007-02-05 01:08:10 +00:00
85ceea7358
Fix missing check for thread bits width in ADDI
2007-01-31 22:28:55 +00:00
91d84e7dc7
Major rework of array handling. Memories are replaced with the
...
more general concept of arrays. The NetMemory and NetEMemory
classes are removed from the ivl core program, and the IVL_LPM_RAM
lpm type is removed from the ivl_target API.
2007-01-16 05:44:14 +00:00
26e2e85ffa
Handle non-constant delays on indexed non-blocking assignments.
2006-10-05 01:23:53 +00:00
50800fd3a1
Add support for real valued modulus.
2006-08-09 05:19:08 +00:00
fc0695beb6
Handle 64bit delay constants.
2006-08-08 05:11:37 +00:00
898b0e0365
Support release of a for/linked reg.
2006-08-04 04:37:37 +00:00
36039e13ec
schedule takes relative, not absolute, time.
2006-04-27 04:38:00 +00:00
d0de678d57
real-to-integer conversions round, not truncate.
2006-02-02 05:48:45 +00:00
d434dd7296
Allow part selects of memory words in l-values.
2006-02-02 02:43:57 +00:00
2b8fd28a95
Force instruction that can be indexed.
2005-11-26 17:16:05 +00:00
35951510c5
Put vec8 and vec4 nets into seperate net classes.
2005-11-25 17:55:26 +00:00
be73be8c98
Spelling patches from Larry.
2005-09-19 21:45:35 +00:00
988a0a7048
Add the load/v.p instruction.
2005-09-17 04:01:01 +00:00
65584e6dde
Add word integer compares.
2005-09-14 02:50:07 +00:00
efd7825964
minor correction to address check in of_MOV1XZ
2005-08-30 00:49:21 +00:00
7c19eb51e7
Minor cleanup.
2005-08-29 04:46:13 +00:00
5cf2ce6499
Fix bit destination address in of_AND
2005-08-27 03:28:57 +00:00
bc489a7761
Bring threads into the vvp_vector4_t structure.
2005-08-27 02:34:42 +00:00
de1dd2f2b3
Make bit masks of vector4_t 64bit aware.
2005-06-26 01:57:22 +00:00
1b30bac9f3
Optimize the LOAD_VEC implementation.
2005-06-19 18:42:00 +00:00
cd14ee77ae
Add the assign_v0_d instruction.
2005-06-14 01:44:09 +00:00
fb8ddbbfde
Remove useless references to functor.h
2005-06-12 01:25:27 +00:00
42433f4df9
Add support for notif0/1 gates.
...
Make delay nodes support inertial delay.
Add the %force/link instruction.
2005-06-02 16:02:11 +00:00
d6a89a40cf
Clean up instruction type reverences to bits.
2005-05-17 20:51:06 +00:00
5277124c76
Implement non-blocking part assign.
2005-05-07 03:15:42 +00:00
2894cdefc7
Add cassign/link instruction.
2005-05-01 22:05:21 +00:00
d8a456bd67
The indexed set can write a vector, not just a bit.
2005-03-22 05:18:34 +00:00
8e135a1020
Non blocking assign to memory words.
2005-03-06 17:07:48 +00:00
e7c2e06260
Check that lead.mv vector width matches word.
2005-03-05 05:45:18 +00:00
85286cc086
Rearrange how memories are supported as vvp_vector4 arrays.
2005-03-03 04:33:10 +00:00
c5e7e2ec0a
Signals may receive part vectors from %set/x0
...
instructions. Re-implement the %set/x0 to do
just that. Remove the useless %set/x0/x instruction.
2005-02-14 01:50:23 +00:00
355ead0002
Add debug dumps for vectors, and fix vvp_scaler_t make from BIT4_X values.
2005-02-12 06:13:22 +00:00
a121e703f3
Add vector4 implementation of .arith/mult.
2005-01-28 05:34:25 +00:00
1d1dda5a5d
Implement the %load/x instruction.
2005-01-22 00:58:22 +00:00
26d97558c4
Replace single release with release/net and release/reg.
2004-12-17 04:47:47 +00:00
78dda42493
Add the force/v instruction.
2004-12-15 17:17:42 +00:00
65e9b6be12
Rework of internals to carry vectors through nexus instead
...
of single bits. Make the ivl, tgt-vvp and vvp initial changes
down this path.
2004-12-11 02:31:25 +00:00
e4ae832153
Clean up spurious trailing white space.
2004-10-04 01:10:51 +00:00
51fd249d8a
Watch type of mak bit matches masked value.
2004-06-19 16:17:02 +00:00
050ec6f325
Add signed modulus operator.
2004-06-19 15:52:53 +00:00
8d3102388b
Pick sign bit from the right place in the exponent number.
2004-06-04 23:26:34 +00:00
a7ae8adf9b
Support delayed/non-blocking assignment to reals and others.
2004-05-19 03:26:24 +00:00
995cd449c5
Include config.h
2003-11-10 20:19:32 +00:00
07ece95383
Slight performance tweaks of scheduler.
2003-09-26 02:15:15 +00:00
2272843511
32bit vs 64bit handling in SUBI.
2003-09-01 04:03:38 +00:00
2d5b48ce0a
Initialize allocated memory.
2003-08-01 00:58:03 +00:00
5e954e94fa
Overflow of unsigned when calculating unsigned long value.
2003-07-21 02:39:15 +00:00
dccd7ec7e2
Remove the vvp_cpoint_t indirect code pointer.
2003-07-03 20:03:36 +00:00
71a404a546
Add arithmetic shift operators.
2003-06-18 03:55:18 +00:00
2321df4bfc
Remove short int restrictions from vvp opcodes. (part 2)
2003-06-17 21:28:59 +00:00
96ca885aca
Remove short int restrictions from vvp opcodes.
2003-06-17 19:17:42 +00:00
e157b3f9c5
Add the set/x0/x instruction.
2003-05-26 04:44:54 +00:00
4ace97a083
ufunc calls to functions can have scheduling complexities.
2003-05-07 03:39:12 +00:00
4b543de7f9
Add support for division of real operands.
2003-03-28 02:33:56 +00:00
f45fd155c4
Remove the obsolete functor delete functions.
2003-03-13 04:36:57 +00:00
aa3297a925
Add the cvt/vr instruction.
2003-02-27 20:36:29 +00:00
2935e28ffb
When checking for stop, remember to reschedule.
2003-02-22 06:26:58 +00:00
19c6bd2139
Check for stopped flag in certain strategic points.
2003-02-22 02:52:06 +00:00
b726395d1e
Spelling fixes.
2003-02-09 23:33:26 +00:00
dd56d9a17c
Add the %sub/wr instruction.
2003-02-06 17:41:47 +00:00
04ada23119
Support in various contexts the $realtime
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system task.
2003-01-27 00:14:37 +00:00
7de4108bad
Add %cvt/ir and %cvt/ri instructions, and support
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real values passed as arguments to VPI tasks.
2003-01-26 18:16:22 +00:00
9a5a00f836
Add thread word array, and add the instructions,
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%add/wr, %cmp/wr, %load/wr, %mul/wr and %set/wr.
2003-01-25 23:48:05 +00:00
aa3a6dba4e
Schedule wait lists of threads as a single event,
...
to save on events. Also, improve efficiency of
event_s allocation. Add some event statistics to
get an idea where performance is really going.
2003-01-06 23:57:26 +00:00
8e30bc9f9e
Careful of left operands to shift that are constant.
2002-11-22 00:01:50 +00:00
03afbf157b
%set/x0 instruction to support bounds checking.
2002-11-21 22:43:13 +00:00
1b84893ccb
Add the %assign/v0 instruction.
2002-11-08 04:59:57 +00:00
b0a7909162
functor_set takes bit and strength, not 2 strengths.
2002-11-07 03:11:43 +00:00
d7ae85a13a
Add vector set and load instructions.
2002-11-07 02:32:39 +00:00
4e5dd49a37
Fix mask calculate when MOV_b is right on the word boundary.
2002-11-05 03:46:44 +00:00
7557a46382
Remove some now useless asserts.
2002-09-21 23:47:30 +00:00
acd5e86e04
Fix disable in arbitrary fork/join situations.
2002-09-21 04:55:00 +00:00
ab94b0a636
disable threads with children.
2002-09-20 03:59:34 +00:00
3d3116d48b
Add support for binary NOR operator.
2002-09-18 04:29:55 +00:00
dac99b9374
Add support for binary nand operator.
2002-09-12 15:49:43 +00:00
cbca31555d
Add the %subi instruction, and use it where possible.
2002-08-28 18:38:07 +00:00
1db8319bce
Add the %load/nx opcode to index vpi nets.
2002-08-28 17:15:06 +00:00
aa390f2a91
Fix l-value indexing of memories and vectors so that
...
an unknown (x) index causes so cell to be addresses.
Fix tangling of label identifiers in the fork-join
code generator.
2002-08-27 05:39:57 +00:00
985c34bfd9
Fix behavioral eval of x?a:b expressions.
2002-08-22 03:38:40 +00:00
ac21d96bd8
x in index values leads to 0.
2002-08-18 01:05:50 +00:00
52bf4e613f
conditional ident string using autoconfig.
2002-08-12 01:34:58 +00:00
d68153dea3
Add %cmpi/u instruction.
2002-06-02 18:55:58 +00:00
1ce50993f0
Add the %muli instruction.
2002-05-31 20:04:22 +00:00
af6f0c800f
Slight improvement in %mov performance.
2002-05-31 04:09:58 +00:00
48f65cef40
Word oriented bit storage.
2002-05-31 00:05:49 +00:00
b6b364a09d
Add %addi, which is faster to simulate.
2002-05-29 16:29:34 +00:00
bcd49b94dd
Able to disable thread self.
2002-05-27 00:53:10 +00:00
d63e994ea5
Detect long division by zero.
2002-05-24 04:55:13 +00:00
Stephen Williams
steve