Commit Graph

507 Commits

Author SHA1 Message Date
Nick Gasson c81645ff46 tgt-vhdl: Fix expression generation corner case and bug in xnor reduction operator
Certain types of expressions involving only constants would produce
ambiguous VHDL output. Fixed by qualifying one of the arguments. E.g.

   ('0' or '1') = '1'

Which is ambiguous becomes

   (std_logic'('0') or '1') = '1'

This fixes the xnor_test test.

Reduce XNOR was implemented incorrectly because of trivial typo
2011-04-06 19:20:25 -07:00
Nick Gasson 9a48166855 tgt-vhdl: Improve temporary signal name generation to avoid collisions
Fixes regression of simple_gen test.

Also extended ivl_lpm_size API call to support all LPM types. This
simplifies some of the VHDL LPM generation code a little.
2011-04-06 19:18:08 -07:00
Larry Doolittle 8a568055f6 Spelling fixes
All are in comments and .txt files except for one in the Architecture::Statement dump message.
2011-03-29 08:56:10 -07:00
Larry Doolittle e9fda22ad9 Spelling fixes
Mostly then/than confusion.  All comments or README files,
except for one user-visible change in a tgt-vlog95 error message.
2011-03-14 16:28:36 -07:00
Cary R 98f5ed2f85 Fix remaining space issues. 2011-03-14 16:26:31 -07:00
Nick Gasson 7b82bd26f5 tgt-vhdl: Fix shift2 test regression
Caused by translate_select emitting a logical instead of arithmetic
shift for signed arguments.
2011-03-08 19:08:59 -08:00
Cary R 2a0d33608f Fix spacing problems.
This patch fixes spacing problems in the source code, space/tab at
the end of line and space before tab.
2011-03-03 11:21:31 -08:00
Nick Gasson eba8c8ee65 Fix for pr2661101
Fixes VHDL compilation errors when signal or instance names collide
after renaming.
2010-10-21 19:48:13 -07:00
Cary R be44214598 Add cppcheck target to the Makefile
This patch adds support for running cppcheck from the Makefile. It also
standardizes the order of some of the targets. It renames vpip_format.c
to vpip_format.cc and fixes the size of the array tables to make room
for the trailing NULL. Found when using a C++ compiler.
2010-10-14 19:11:32 -07:00
Nick Gasson 0144b5a2bb Basic parameter support in VHDL target
This is a fix for pr2555831. A separate entity/architecture pair is
generated for each module that is instantiated with a unique
parameter combination.
2010-10-05 20:03:08 +01:00
Nick Gasson 19b592a336 List parameters/values in VHDL entity comment
For example:

  -- Generated from Verilog module child (vhdl_tests/generics.v:30)
  --   MY_VALUE = 3
  entity child is

To make it clear which values were used for this entity.

Conflicts:

	tgt-vhdl/scope.cc
2010-10-05 20:02:49 +01:00
Nick Gasson 249fc93b89 Change VHDL $finish to use report not assert
Changes:

   assert false report "SIMULATION FINISHED" severity failure;

To just:

   report "SIMULATION FINISHED" severity failure;
2010-10-05 20:02:17 +01:00
Nick Gasson a7fe5167e8 Generate VHDL report statements for $display
This changes the implementation of $display/$write to use VHDL
report statements rather the the std.textio functions. The code
produced is simpler and more like what a real VHDL designed would
write. However it no longer exactly matches the Verilog output as
most VHDL simulators prepend the text with simulation time, entity
name, severity level, etc. There is a corresponding change in
ivtest to support this.

Conflicts:

	tgt-vhdl/cast.cc
	tgt-vhdl/display.cc
	tgt-vhdl/vhdl_syntax.cc
	tgt-vhdl/vhdl_target.h
2010-10-05 20:02:04 +01:00
Nick Gasson 9faaf5f817 Add VHDL report statement
Not output yet, but will be used to replace std.textio
implementation of $display.

Conflicts:

	tgt-vhdl/vhdl_syntax.cc
2010-10-05 20:00:16 +01:00
Nick Gasson 2187f30207 Reduce number of 0 ns waits in generated VHDL
Previous we generated a "wait for 0 ns" statement after
every blocking assignment that wasn't the last statement
in the process. While this implements the Verilog semantics,
it generates excessive waits, and cannot usually be synthesised.
This patch only generates "wait for 0 ns" statements when it
cannot be avoid (e.g. when the target of a blocking assignment
is read in the same process).

An example:

  begin
    x = 5;
    if (x == 2)
      y = 7;
  end

Becomes:

  x <= 5;
  wait for 0 ns;    -- Required to implement assignment semantics
  if x = 2 then
    y <= 7;         -- No need for wait here, not read
    -- wait for 0 ns  (previously)
  end if;

Conflicts:

	tgt-vhdl/process.cc
	tgt-vhdl/stmt.cc
	tgt-vhdl/vhdl_target.h
2010-10-05 19:59:25 +01:00
Stephen Williams ec49f10e2d Revert bad merge from vhdl branch 2010-10-02 11:02:27 -07:00
Nick Gasson 43f904f793 Add uwire support to VHDL backend
Implemented as std_ulogic which behaves almost identically.
2010-09-30 12:22:39 +01:00
Nick Gasson 419ea8c9ea Merge branch 'generics' into vhdl 2010-09-30 12:16:39 +01:00
Nick Gasson d9bf96d8fa Basic parameter support in VHDL target
This is a fix for pr2555831. A separate entity/architecture pair is
generated for each module that is instantiated with a unique
parameter combination.
2010-09-11 12:17:06 +01:00
Nick Gasson 56525d0c20 Merge branch 'generics' into vhdl 2010-09-08 19:37:00 +01:00
Nick Gasson e41f2f36a3 List parameters/values in VHDL entity comment
For example:

  -- Generated from Verilog module child (vhdl_tests/generics.v:30)
  --   MY_VALUE = 3
  entity child is

To make it clear which values were used for this entity.
2010-08-28 17:13:23 +01:00
Nick Gasson 0c883a00bf Change VHDL $finish to use report not assert
Changes:

   assert false report "SIMULATION FINISHED" severity failure;

To just:

   report "SIMULATION FINISHED" severity failure;
2010-08-24 22:17:11 +01:00
Nick Gasson 48ae8c1ce5 Generate VHDL report statements for $display
This changes the implementation of $display/$write to use VHDL
report statements rather the the std.textio functions. The code
produced is simpler and more like what a real VHDL designed would
write. However it no longer exactly matches the Verilog output as
most VHDL simulators prepend the text with simulation time, entity
name, severity level, etc. There is a corresponding change in
ivtest to support this.
2010-08-24 22:13:08 +01:00
Nick Gasson 0cec4495ca Add VHDL report statement
Not output yet, but will be used to replace std.textio
implementation of $display.
2010-08-18 23:50:13 +01:00
Nick Gasson f9da800cf5 Reduce number of 0 ns waits in generated VHDL
Previous we generated a "wait for 0 ns" statement after
every blocking assignment that wasn't the last statement
in the process. While this implements the Verilog semantics,
it generates excessive waits, and cannot usually be synthesised.
This patch only generates "wait for 0 ns" statements when it
cannot be avoid (e.g. when the target of a blocking assignment
is read in the same process).

An example:

  begin
    x = 5;
    if (x == 2)
      y = 7;
  end

Becomes:

  x <= 5;
  wait for 0 ns;    -- Required to implement assignment semantics
  if x = 2 then
    y <= 7;         -- No need for wait here, not read
    -- wait for 0 ns  (previously)
  end if;
2010-08-17 22:49:27 +01:00
Nick Gasson 406d3936af Add find_vars method to VHDL syntax objects
Finds set of read and written variables. For use in
post-processing the syntax tree for cleanup.
2010-08-17 22:49:27 +01:00
Nick Gasson 0d6b42885b Reduce superflous parens in generated VHDL
Purely cosmetic, replaces output like:

  if (x + foo(x + (2 * y))) then ...

With:

  if x + foo(x + (2 * y)) then ...
2010-08-17 22:49:27 +01:00
Nick Gasson d33082bca5 Resize VHDL vector before cast in signed comparison
E.g. $signed(x) > y with x, y different sizes should be

  resize(signed(x), N) > y

Not

  signed(resize(x, N)) > y

As this does not treat the sign bit correctly. Was causing
the signed5 test to fail.
2010-08-11 17:34:16 -07:00
Nick Gasson ae0fe9541d Rename modules which are VHDL reserved words 2010-08-11 17:30:27 -07:00
Nick Gasson 5e0f80afca Avoid emitting VHDL Bool_To_Logic calls for common cases
No functional change, just improves the output a bit. E.g.

  x <= Bool_To_Logic(y = z);

Becomes:

  x <= '1' when y = z else '0';
2010-08-08 14:34:13 -07:00
Nick Gasson 090f7730e6 Avoid VHDL type error in concurrent assignment
When translating a relational LPM to concurrent VHDL assignment, the
generated code would be incorrect if the input types differed in
signedness.
2010-08-08 14:34:06 -07:00
Nick Gasson 2d97486897 Rename VHDL instances which are reserved words
Fixes compiler errors with some real-world examples
2010-08-08 14:34:00 -07:00
Cary R 86653ddff9 Remove some cppcheck warnings.
This patch modifies the code to remove some more cppcheck warnings.
2010-07-30 18:50:52 -07:00
Cary R 1993bf6f69 Remove malloc.h support and for C++ files use <c...> include files.
The functions (malloc, free, etc.) that used to be provided in
malloc.h are now provided in cstdlib for C++ files and stdlib.h for
C files. Since we require a C99 compliant compiler it makes sense
that malloc.h is no longer needed.

This patch also modifies all the C++ files to use the <c...>
version of the standard C header files (e.g. <cstdlib> vs
<stdlib.h>). Some of the files used the C++ version and others did
not. There are still a few other header changes that could be done,
but this takes care of much of it.
2010-06-01 08:56:30 -07:00
Cary R b6b43b5dec C++ functions passed to C should be declared extern "C" (second patch)
The SunPro compiler was complaining about C++ routines that
were being passed to the ivl C routines if the C++ routines
were not declared extern "C".
2010-05-13 19:01:55 -07:00
Cary R dd33d25e3c C++ functions passed to C should be declared extern "C"
The SunPro compiler was complaining about C++ routines that
were being passed to the ivl C routines if the C++ routines
were not declared extern "C".
2010-05-13 19:00:41 -07:00
Cary R c0a592bec2 Don't place a trailing ',' after the last enum item.
The SunPro compiler does not like having a ',' after the last
enum item.
2010-05-13 18:56:44 -07:00
Cary R 2aa627d89f Update all Makefile.in files to support OpenSolaris
This patch updates all the Makefile.in files and configure.in
as follows:

Do not use the -Wall warning flag when using the SunPro compiler.

The SunPro compiler uses -xMD instead of -MD.

There are still more fixes needed before Icarus will compile
on OpenSolaris.
2010-05-13 18:54:09 -07:00
Stephen Williams 8cbff6def0 Cleanup various style issues.
This patch cleans up some style issues: no need to check that a value
is defined before freeing or deleting it, use C++ style casts, make
sure to NULL terminate strncpy(), empty() is faster than size() for
size == 0 or size >= 0 checks, re-scope some variables, etc.
2010-04-13 21:29:15 -07:00
Stephen Williams bf4e7454eb Account for output drive of LPM mux devices.
LPM devices, and LPM MUX devices in particular, need to
have their drive strength accounted for.
2010-03-16 14:25:00 -07:00
Nick Gasson 47d3b3365b VHDL: fix spurious resize seen in pr2911213
Another case when ivl_scope_sig list was used instead of
ivl_scope_param.
2009-12-18 13:38:12 -08:00
Nick Gasson 9c568d8f47 VHDL: ensure with-select statement choices completely cover input space
Newer versions of GHDL seem to be stricter when checking this than
older versions. ModelSim still accepts an incomplete with-select,
however.

This patch makes the output 'U' if none of the conditions match.
2009-12-14 12:01:27 -08:00
Nick Gasson a9c85cf5b6 VHDL: emit function parameters in correct order
The function draw_scope was extracting the input/output parameters
just by looking at the (unordered) list of signals in the function
scope rather than using the ivl_scope_ports list.
2009-12-11 21:50:53 -08:00
Cary R 3f12a401eb Add some casts in tgt-vhdl to remove warnings.
The Cygwin compiler is a bit picky. This patch adds some casts
to remove compilation warnings. In the past I have had warnings
off because of problems with the STL, but we may as well get
rid of the warnings we can. It also does not recognize that an
assert(0) or assert(false) ends a routine so it complains about
no return at end of function or variables not being defined.
2009-12-11 21:46:49 -08:00
Stephen Williams 26ab32ac3b Add explicit dependencies on generated header files.
These explicit dependencies are not normally needed (because they
are covered by automatic dependency generation) but when the "-jN"
flag is passed to gmake, they help gmake schedule parallel builds.
(cherry picked from commit 5479aaf721)
2009-12-07 16:29:37 -08:00
Stephen Williams 966e29db3b Unify the version stamp in the version_*.h header files.
Try to put all the version stamps into common version_base.h
and version_stamp.h header files. All the source programs then
get their version from these header files.

Also handle the version stamps in the man pages by using the
version_*.h header file contents to edit the version strings
in the man page title bar markers.
2009-11-27 09:25:50 -08:00
Cary R ae49197a14 Cleanup a few more issues found with cppcheck.
Minor fixes and code reorganization to remove a few more issues
that cppcheck is complaining about. It has a few false warnings
and some issues that need more investigation.
2009-10-31 20:42:43 -07:00
Cary R 9dc4c8cbe1 Fix memory.h include issues.
The local "memory.h" file is no longer used in V0.9 or development,
so it does not need to be included in vvp/codes.h. The VHDL target
does not use the system <memory.h> header file so there is no need
to have a define for it in the vhld_config.h.in file.
2009-10-26 11:09:02 -07:00
Jared Casper c167b3a01f Still more build system cleanup.
- Add missing dependency of configure on aclocal.m4.

- Remove config stamp files in make distclean (and fix another for
  loop in base make distclean that I missed)

- Add stamp files to .gitignore
2009-10-23 10:57:41 -07:00
Jared Casper 7ead2aa88b More build system tweaks, fixing pr2881797.
Use the time stamp file technique recommended by the autoconf manual
to prevent unneccesary rebuilds because of an unchanged config.h.
Uses the automake trick of generating the stamp files in the
_AC_AM_CONFIG_HEADER_HOOK macro instead of littering the source
directory with stamp-h.in files.

Add an extra ./config.status run after ./config.status --recheck
because with --recheck it doesn't actually try to remake the generated
files (and thus doesn't make the timestamp files).  Thus without the
extra run, each stamp-*-h target would need to independently run
./config.status to make sure it wasn't changed by the configuration
change.

An orthogonal fix of how config.status is called in subdirectories.
When in a subdirectory and config.status is called with
../config.status and $(srcdir) is a relative path, config.status gets
confused.  Fixed by replacing '../config.status --file=Makefile.in'
with 'cd ..; ./config.status --file=<dir>/Makefile.in'
2009-10-20 09:45:42 -07:00