bab9c7adba
Proper compile time processing of arithmetic right shift
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Handle arithmetic right shift during compile time. This comes
up with both the operands are constant expressions. the compiler
is able to evaluate this down to a constant to replace the
expression.
Signed-off-by: Stephen Williams <steve@icarus.com>
2007-11-08 21:52:38 -08:00
7c852aa075
Add cmos/rcmos primitives.
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This patch adds the cmos and rcmos primitives.
2007-09-06 18:46:22 -07:00
b69c4c9a2c
Fix range handling/checking and add a flag to allow deprecated port syntax.
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This patch is rather large and fixes a couple of problems. The major
change is that instead of keeping all the range specifications in
a list that is later processed the information is now kept as
individual entries for the port and net definitions. This allows
easier checking for multiple definitions (pr1660028), more
detailed error messages and the ability to pass the now deprecated
style of a scalar I/O definition used with a vectored net definition.
These changes did require extra code to prevent a single definition
from setting the range values in more than on place.
When using the new ANSI-C style of port declarations (1364-2001 12.3.4
list_of_port_declarations) the compiler ensures that you do not
redeclare the port in the body (it is already completely defined).
This caught a few errors in the test suite (pr859 and sqrt32*).
The flag to disable the normal port checking and allow the deprecated
port syntax is -gno-io-range-error. This will print a warning for the
case of a scalar port with a vectored definition in the body. All
other cases are still considered an error.
2007-08-29 18:10:18 -07:00
7aa323bcbf
Handle nil parameter overrides
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Nil parameter overrides can turn up in positional paramter override
lists, where items are intentionally skipped.
Signed-off-by: Stephen Williams <steve@icarus.com>
2007-07-14 17:11:14 -07:00
396ffd1cdd
Add support for conditional generate. In the process, fix bugs
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related to generate used multiple times by multiple scopes causing
spurious generation results.
Signed-off-by: Stephen Williams <steve@icarus.com>
2007-06-21 19:04:48 -07:00
129a064e1a
Handle bit/part select of array words in nets.
2007-06-04 02:19:07 +00:00
c7d97f4146
Properly evaluate scope path expressions.
2007-06-02 03:42:12 +00:00
17fd3bae15
Missing return value to perm_string dump
2007-05-31 18:35:50 +00:00
ddd36ecb6c
Rework the heirarchical identifier parse syntax and pform
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to handle more general combinations of heirarch and bit selects.
2007-05-24 04:07:11 +00:00
ae88f5cc68
Lint fixes.
2007-03-07 00:38:15 +00:00
e6fa72c318
Handle processes within generate loops.
2007-03-05 05:59:10 +00:00
c1c2381261
Parse all specify paths to pform.
2007-02-12 01:52:21 +00:00
0edb5a7547
Basic support for specify timing.
2006-09-23 04:57:19 +00:00
0d17e57656
Dump indexes of ident expressions
2006-04-28 04:19:31 +00:00
f001d0001a
Add support for generate loops w/ wires and gates.
2006-04-10 00:37:42 +00:00
a652719876
Add support for indexed select attached to parameters.
2005-10-04 04:09:25 +00:00
b9799cf6ec
Remove NetVariable and ivl_variable_t structures.
2005-07-11 16:56:50 +00:00
75ad90534b
Generalize signals to carry types.
2005-07-07 16:22:49 +00:00
e4ae832153
Clean up spurious trailing white space.
2004-10-04 01:10:51 +00:00
5472b27e1f
Rewire/generalize parsing an elaboration of
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function return values to allow for better
speed and more type support.
2004-05-31 23:34:36 +00:00
e7fa56981a
More identifier lists use perm_strings.
2004-05-25 19:21:06 +00:00
177b6ffb6a
Addtrbute keys are perm_strings.
2004-02-20 18:53:33 +00:00
1295058e5d
parameter keys are per_strings.
2004-02-20 06:22:56 +00:00
27af95d402
Use perm_strings for named langiage items.
2004-02-18 17:11:54 +00:00
77da147629
Fix some enumeration warnings.
2003-07-05 20:42:08 +00:00
ccf4d4d7da
Module attributes from the parser
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through to elaborated form.
2003-06-20 00:53:19 +00:00
3ef65d1298
Properly manage real variables in subscopes.
2003-06-13 19:10:45 +00:00
e58030498f
specparams as far as pform.
2003-02-27 06:45:11 +00:00
46253ed873
Rework expression parsing and elaboration to
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accommodate real/realtime values and expressions.
2003-01-26 21:15:58 +00:00
43501809b1
Redo the parameter vector support to allow
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parameter names in range expressions.
2002-10-19 22:59:49 +00:00
4de141ab1d
Support parameters with defined ranges.
2002-08-19 02:39:16 +00:00
52bf4e613f
conditional ident string using autoconfig.
2002-08-12 01:34:58 +00:00
bfad382fd1
Carry Verilog 2001 attributes with processes,
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all the way through to the ivl_target API.
Divide signal reference counts between rval
and lval references.
2002-05-26 01:39:02 +00:00
700887d657
Verilog 2001 attriubtes on nets/wires.
2002-05-24 04:36:23 +00:00
e6c0629626
Add language support for Verilog-2001 attribute
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syntax. Hook this support into existing $attribute
handling, and add number and void value types.
Add to the ivl_target API new functions for access
of complex attributes attached to gates.
2002-05-23 03:08:50 +00:00
bf10c5762a
Parse port_declaration_lists from the 2001 Standard.
2002-05-19 23:37:28 +00:00
b094bbdcf4
Add support for conbinational events by finding
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the inputs to expressions and some statements.
Get case and assignment statements working.
2002-04-21 04:59:07 +00:00
712080f7e0
Detect scalar/vector declarion mismatch.
2002-01-26 05:28:28 +00:00
ab6c8cb4b8
Parser and pform use hierarchical names as hname_t
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objects instead of encoded strings.
2001-12-03 04:47:14 +00:00
b825f8d2b2
Create a config.h.in file to hold all the config
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junk, and support gcc 3.0. (Stephan Boettcher)
2001-07-25 03:10:48 +00:00
02fc59fbdf
Parse parameters within nested scopes.
2001-01-13 22:20:08 +00:00
5dbea64759
Add support for signed reg variables,
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simulate in t-vvm signed comparisons.
2000-12-11 00:31:43 +00:00
084a464cf1
Support decimal constants in behavioral delays.
2000-12-10 22:01:35 +00:00
28bc621f11
change set for support of nmos, pmos, rnmos, rpmos, notif0, and notif1
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change set to correct behavior of bufif0 and bufif1
(Tim Leight)
Also includes fix for PR#27
2000-11-11 01:52:09 +00:00
f526d235d1
Check for missing concat subexpressions (PR#11)
2000-10-14 02:23:02 +00:00
739365abe5
Parse disable statements to pform.
2000-07-26 05:08:07 +00:00
8fc2dc2cd1
Better parsing of expressions lists will empty expressoins.
2000-05-23 16:03:13 +00:00
3676d66408
Module ports are really special PEIdent
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expressions, because a name can be used
many places in the port list.
2000-05-16 04:05:15 +00:00
367db72c99
Add support for procedural continuous assignment.
2000-05-11 23:37:26 +00:00
ca2fd41bb6
Carry assignment strength to pform.
2000-05-06 15:41:56 +00:00
fbe475ef7d
Add infrastructure for system functions, move
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$time to that structure and add $random.
2000-05-04 03:37:58 +00:00
44838f8973
Add support for force assignment.
2000-04-22 04:20:19 +00:00
4493e968da
Finally remove the NetNEvent and NetPEvent classes,
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Get synthesis working with the NetEvWait class,
and get started supporting multiple events in a
wait in vvm.
2000-04-12 20:02:52 +00:00
b1fd927acb
Named events really should be expressed with PEIdent
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objects in the pform,
Handle named events within the mix of net events
and edges. As a unified lot they get caught together.
wait statements are broken into more complex statements
that include a conditional.
Do not generate NetPEvent or NetNEvent objects in
elaboration. NetEvent, NetEvWait and NetEvProbe
take over those functions in the netlist.
2000-04-12 04:23:57 +00:00
2dd010dc04
Named events as far as the pform.
2000-04-01 19:31:57 +00:00
6eef54595f
Support localparam.
2000-03-12 17:09:40 +00:00
e7efc2709a
Redesign the implementation of scopes and parameters.
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I now generate the scopes and notice the parameters
in a separate pass over the pform. Once the scopes
are generated, I can process overrides and evalutate
paremeters before elaboration begins.
2000-03-08 04:36:53 +00:00
b734ecf02f
Macintosh compilers do not support ident.
2000-02-23 02:56:53 +00:00
5b52c384d6
Catch module instantiation arrays.
2000-02-18 05:15:02 +00:00
9125a4c451
Careful with wires connected to multiple ports.
2000-01-09 20:37:57 +00:00
2de887c2ff
Support named parameter override lists.
2000-01-09 05:50:48 +00:00
70a1236626
Structural case equals device.
1999-10-10 01:59:54 +00:00
c63a3acf93
Elaborate ~^ and ~| operators.
1999-09-30 02:43:01 +00:00
6e486e9bcf
Cope with errors during ternary operator elaboration.
1999-09-30 00:48:49 +00:00
8e21f0f363
Handle some mor missing names.
1999-09-29 21:15:58 +00:00
2271fc9894
Handle empty named ports in the dump.
1999-09-29 20:23:53 +00:00
a64a33e65a
Full case support
1999-09-29 18:36:02 +00:00
424e6a750c
Handle unconnected module ports.
1999-09-17 02:06:25 +00:00
9d82d19d07
Empty conditionals (pmonta@imedia.com)
1999-09-08 02:24:39 +00:00
8f68a07476
Add support for delayed non-blocking assignments.
1999-09-04 19:11:45 +00:00
23acca48ff
elaborate some aspects of functions.
1999-08-25 22:22:41 +00:00
9eae940ebd
Parameter overrides support from Peter Monta
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AND and XOR support wide expressions.
1999-08-23 16:48:39 +00:00
4c219530c1
Proper port type names.
1999-08-03 04:49:13 +00:00
5f10342f52
Parse into pform arbitrarily complex module
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port declarations.
1999-08-03 04:14:49 +00:00
71d35f32b2
Parse and elaborate rise/fall/decay times
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for gates, and handle the rules for partial
lists of times.
1999-08-01 16:34:50 +00:00
e0a988bf7e
Add functions up to elaboration (Ed Carter)
1999-07-31 19:14:47 +00:00
d9553ecba1
Handle dumping tasks with no ports.
1999-07-30 00:43:17 +00:00
93a77a2efd
Elaborate task input ports.
1999-07-24 02:11:19 +00:00
a5921ceae8
netlist support for ternary operator.
1999-07-17 19:50:59 +00:00
6852a62e5a
procedural blocking assignment delays.
1999-07-12 00:59:36 +00:00
3ff6912bdd
Elaborate user defined tasks.
1999-07-03 02:12:51 +00:00
11b2b1740a
Handle expression widths for EEE and NEE operators,
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add named blocks and scope handling,
add registers declared in named blocks.
1999-06-24 04:24:18 +00:00
853ad247a1
Elaborate and supprort to vvm the forever
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and repeat statements.
1999-06-19 21:06:16 +00:00
37b60a4c52
Clean up interface of the PWire class,
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Properly match wire ranges.
1999-06-17 05:34:42 +00:00
fabb146342
Support case expression lists.
1999-06-15 05:38:39 +00:00
d0afc9adee
Get rid of the STL vector template.
1999-06-15 03:44:53 +00:00
740c63291a
l-value part select for procedural assignments.
1999-06-13 23:51:16 +00:00
7c2cf8b2fa
Add support for the Ternary operator,
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Add support for repeat concatenation,
Correct some seg faults cause by elaboration
errors,
Parse the casex anc casez statements.
1999-06-10 04:03:52 +00:00
7605a7b1f0
Add parse and elaboration of non-blocking assignments,
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Replace list<PCase::Item*> with an svector version,
Add integer support.
1999-06-06 20:45:38 +00:00
35893919e0
module parameter bind by name.
1999-05-29 02:36:17 +00:00
5de9b7c9f1
Parse and elaborate the concatenate operator
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in structural contexts, Replace vector<PExpr*>
and list<PExpr*> with svector<PExpr*>, evaluate
constant expressions with parameters, handle
memories as lvalues.
Parse task declarations, integer types.
1999-05-10 00:16:57 +00:00
b44ef063a8
Fix handling of null delay statements.
1999-05-05 03:04:46 +00:00
41f9a84a4b
Handle much more complex event expressions.
1999-05-01 02:57:52 +00:00
ce49708442
Parse OR of event expressions.
1999-04-29 02:16:26 +00:00
5895d3c98d
Add memories to the parse and elaboration phases.
1999-04-19 01:59:36 +00:00
e2a37a8ccd
Add support for module parameters.
1999-02-21 17:01:57 +00:00
e5f5f41515
Elaborate gate ranges.
1999-02-15 02:06:15 +00:00
8bdd381cdf
Parse and elaborate the Verilog CASE statement.
1999-02-03 04:20:11 +00:00
a7ad8985ac
Carry some line info to the netlist,
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Dump line numbers for processes.
Elaborate prints errors about port vector
width mismatch
Emit better handles null statements.
1999-02-01 00:26:48 +00:00
e097c999d5
Elaborate UDP devices,
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Support UDP type attributes, and
pass those attributes to nodes that
are instantiated by elaboration,
Put modules into a map instead of
a simple list.
1998-12-01 00:42:13 +00:00
91aad30e1f
Parse UDP primitives all the way to pform.
1998-11-25 02:35:53 +00:00
af8d6fbf01
NetAssign handles lvalues as pin links
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instead of a signal pointer,
Wire attributes added,
Ability to parse UDP descriptions added,
XNF generates EXT records for signals with
the PAD attribute.
1998-11-23 00:20:22 +00:00
6b2fa19429
Handle while loops.
1998-11-11 03:13:04 +00:00
ebad845fc3
Add procedural while loops,
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Parse procedural for loops,
Add procedural wait statements,
Add constant nodes,
Add XNOR logic gate,
Make vvm output look a bit prettier.
1998-11-09 18:55:33 +00:00
b118634189
Handle procedural conditional, and some
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of the conditional expressions.
Elaborate signals and identifiers differently,
allowing the netlist to hold signal information.
1998-11-07 17:05:05 +00:00
3fb7a053be
Introduce verilog to CVS.
1998-11-03 23:28:49 +00:00
Stephen Williams
Cary R
steve