Commit Graph

244 Commits

Author SHA1 Message Date
Cary R 6b76f76a3a Add the procedural signed power function.
This patch adds the procedural power function %pow/s for signed
values. This has bit based inputs and outputs, but uses the double
pow() function to calculate the value.
2008-11-28 10:33:45 -08:00
Martin Whitaker fe199a7593 Fix for pr2276163.
The VVP %join function was incorrectly treating the return from a
non-automatic function as a return from an automatic function in
the case that the non-automatic function result was being used as
a parameter to an automatic function. This patch fixes this error.
2008-11-15 11:04:51 -08:00
Cary R bbdf622ea5 Fix numerous problems with the divide and modulus operators.
This patch fixes a number of problems related to the divide and
modulus operators.

The net version (CA) of modulus did not support a signed version.

Division or modulus of a value wider than the machine word did
not correctly check for division by zero and return 'bx.

Fixed a problem in procedural modulus. The sign of the result is
only dependent on the L-value.

Division or modulus of a signed value that was the same width as
the machine word was creating an incorrect sign mask.

Division of a signed value that would fit into a single machine
word was not checking for division by zero.

Division or modulus of a wide value was always being done as
unsigned.

Added a negative operator for vvp_vector2_t. This made
implementing the signed wide division and modulus easier.
2008-11-07 19:58:00 -08:00
Stephen Williams 6cac1d2cab Add support for real/realtime arrays.
Support arrays of realtime variable arrays and net arrays. This
involved a simple fix to the ivl core parser, proper support in
the code generator, and rework the runtime support in vvp.
2008-11-01 20:44:03 -07:00
Martin Whitaker 18edf2f15f Rework of automatic task/function support.
This patch splits any VVP net functor that needs to access both
statically and automatically allocated state into two sub-classes,
one for handling operations on statically allocated state, the
other for handling operations on automatically allocated state.
This undoes the increase in run-time memory use introduced when
automatic task/function support was first introduced.

This patch also fixes various issues with event handling in automatic
scopes. Event expressions in automatic scopes may now reference either
statically or automatically allocated variables or arrays, or part
selects or word selects thereof. More complex expressions (e.g.
containing arithmetic or logical operators, function calls, etc.) are
not currently supported.

This patch introduces some error checking for language constructs
that may not reference automatically allocated variables. Further
error checking will follow in a subsequent patch.
2008-10-29 20:43:00 -07:00
Larry Doolittle c010145eaf Shadow reduction part 1
Start cleaning up shadowed variables, flagged by turning on -Wshadow.
No intended change in functionality.  Patch looks right, and is tested
to compile and run on my machine.  YMMV.
2008-10-09 11:55:26 -07:00
Martin Whitaker 7ebcc6b357 Support for automatic tasks and functions.
This patch adds support for automatic tasks and functions.
Refer to the overview in vvp/README.txt for details.
2008-09-27 15:51:16 -07:00
Cary R f7d3c7c711 Add non-blocking EC for arrays and other fixes.
This patch adds non-blocking event control for array words.
It also fixes a problem where the word used to put the
calculated delay for a non-blocking array assignment was
not being released. It also fixes the non-blocking array
assignments to correctly handle off the end/beginning part
selects.
2008-09-19 21:08:03 -07:00
Cary R 626394d198 Some event control assigns can be skipped so add an event clear.
Since some event control assignments can be skipped we need an
event control clear so that future %evctl statements do not fail
their assert. This patch adds %evctl/c and uses it in the compiler
as appropriate to keep the event control information in sync.
2008-09-19 20:04:51 -07:00
Cary R 8ffec473ef Add event control for vectors and parts of a vectors.
This patch adds full event control for vectors and parts of a
vector. It also fixes the other non-blocking part select code
to correctly handle a negative offset ([1:-2] of a [4:0] will
have an offset of -2).
2008-09-19 19:46:33 -07:00
Cary R 1e60754ff0 Partial non-blocking event control implementation
This patch pushes the non-blocking event control information to
the code generator. It adds the %evctl statements that are used
to put the event control information into the special thread
event control registers. The signed version (%evctl/s) required
the implementation of %ix/getv/s to load a signed value into
an index register. It then adds %assign/wr/e event control based
non-blocking assignment for real values. It also fixes the other
non-blocking real assignments to use Transport instead of inertial
delays.
2008-09-12 20:00:28 -07:00
Cary R 088c7f3feb Add calculated delay, real valued, non-blocking assignments.
This patch add the ability to do a non-blocking assignment
for real values using a non-constant (calculated) delay.
2008-09-09 20:09:49 -07:00
Stephen Williams dd47599d55 Merge branch 'master' into elaborate-net-rework 2008-09-06 17:20:14 -07:00
Larry Doolittle 66949122cf Non-controversial whitespace cleanup
Nothing to do with tab width!  Eliminates useless
trailing spaces and tabs, and nearly all <space><tab>
pairings.  No change to derived files (e.g., .vvp),
non-master files (e.g., lxt2_write.c) or the new tgt-vhdl
directory.

Low priority, simple entropy reduction.  Please apply
unless it deletes some steganographic content you want
to keep.
2008-09-04 21:31:30 -07:00
Stephen Williams bc3411e28e Merge branch 'master' into elaborate-net-rework 2008-08-29 22:13:07 -07:00
Cary R 2e97b28185 More NaN constant fixes.
This patch cleans up %loadi/wr regarding NaN values. It also
fixes the code generator to correctly output a NaN value as
a Cr<> constant.
2008-08-29 19:32:00 -07:00
Cary R 2d3cd7cb9a Handle NaN constant in the code generator and fix loadi/wr NaN bug.
This patch fixes a bug in %loadi/wr regarding NaN values. It also
fixes the code generator to correctly output a NaN value.
2008-08-29 19:31:50 -07:00
Stephen Williams 468f45b4db Merge branch 'master' into elaborate-net-rework 2008-08-28 18:17:24 -07:00
Stephen Williams 091a546387 Broken run-time wide divide.
The wide-divide function was broke. It generated bad results.
2008-08-27 18:20:35 -07:00
Stephen Williams 04d49fcf35 Merge branch 'master' into elaborate-net-rework 2008-08-21 18:11:21 -07:00
Martin Whitaker 2c1426a44d Patch to ensure functions are evaluated immediately.
This patch causes a thread that is created to evaluate a function
to be executed immediately. The parent thread is resumed when the
function thread terminates.
2008-08-16 14:42:17 -07:00
Stephen Williams 50c1533fdd Fix evaluation of logical equality with x bits.
Logical (in)equality needs to look at all the bits of both operands,
and cannot short circuit the test unless defined bits differ. If there
are undefined bits, the equality is undefined at that point, but return
x only if there are not other bits that make the results clearly
unequal.
2008-08-13 22:22:59 -07:00
Cary R e719dc250a %load/av now matches %load/v for truncating/extension.
This patch adds code to make %load/av extend or truncate
a value like %load/v.
2008-08-07 20:34:20 -07:00
Cary R 6cb3d86d15 Update %cvt/vr to use new double to vector conversion (constructor).
This patch updates the %cvt/vr command to use the new double to vector
constructor. This allows the resulting bit pattern to be larger than
a long. The old method was producing incorrect results without a
warning for large bit values.
2008-07-30 14:40:14 -07:00
Stephen Williams 49363c660c Remove the duplicate schedule_assign_vector.
The schedule_assign_plucked_vector is a better way to implement the
schedule_assign_vector, or at least no worse, so remove the now
redundent schedule_assign_vector.
2008-06-16 13:40:20 -07:00
Stephen Williams 30d42e2806 Allow l-value part select to be out of bounds.
It is legal (though worthy of a warning, I think) for the part select
of an l-value to me out of bounds, so replace the error message with
a warning, and generate the appropriate code. In the process, clean
up some of the code for signal l-values to divide out the various kinds
of processing that can be done. This cleans things up a bit.
2008-06-14 21:22:55 -07:00
Stephen Williams 9013dcb527 Signed load-and-add for arrays.
The load-and-add for vectors %load/vp0/s can be combined with the
load-and-add for array words, and the %load/avp0/s added to round
out the combinations. This can make for fewer instructions when
words are padded in arithmetic expressions.
2008-06-14 19:59:57 -07:00
Stephen Williams 6f0d8e8dda Load_add_immediate to work with signed expressions
The %load/vp0 instruction adds a signed value to the signal value being
loaded, but it doesn't allow for a signed source vector. Add the
%load/vp0/s instruction that pads the loaded vector, and add the code
generator details to properly use it.
2008-06-13 20:23:40 -07:00
Larry Doolittle eed4ff7e2d Spelling fixes
Mostly comments, but includes quite a few
user-visible error, debug, and help messages.
2008-06-13 08:51:28 -07:00
Stephen Williams 3c4346acb2 ASSIGN transfer data to scheduler efficiently/permalloc vvp_net_t objects.
The vvp_net_t objects are never deleted, so overload the new operator
to do a more space efficient permanent allocation.

The %assign/v instruction copied the vvp_vector4_t object needlessly
on its way to the scheduler. Eliminate that duplication.(cherry picked from commit d0f303463d)
2008-06-12 13:00:31 -07:00
Cary R acf010326c Remove the signed/unsigned comparison warning 2008-06-11 19:44:21 -07:00
Stephen Williams d7814ed767 Better handle some vector size matters for %load/v
The %load/v instruction was doing some spurious resizes of the vector
that comes from the signal. Eliminate those resizes that can be
removed, and optimize some that remain.
2008-06-11 14:38:35 -07:00
Stephen Williams 70768176f9 Change bit select instruction to a part select.
There is no point in having a bit select instruction and running it in
a loop (always) when we can simply turn it into a part select instruction.
2008-06-10 17:29:47 -07:00
Stephen Williams 694a6ed4a1 Remove some unused opcodes.
Codes from a dfiferent era.
2008-06-10 16:33:34 -07:00
Larry Doolittle d90ce68f5d Spelling fixes
No code changes.
2008-06-10 15:02:18 -07:00
Larry Doolittle 523dff7ae7 Fix probable precedence bug
and at least get rid of a compiler warning
2008-06-03 20:50:36 -07:00
Stephen Williams dfa6471227 Merge branch 'master' of ssh://steve-icarus@icarus.com/home/u/icarus/steve/git/verilog 2008-05-29 14:00:51 -07:00
Stephen Williams 6f0d98cf18 Constrain multiply word to prevent overflow.
The multiply runs does not need to do all the combinations of digit
products, because the higher ones cannot add into the result. Fix the
iteration to limit the scan.
2008-05-29 14:00:03 -07:00
Stephen Williams 6f30813102 Prevent overflow when parsing 32bit values
The source can carry 32bit numbers. Watch out that they are handled
all the way through to the compiled results on 32bit systems.
2008-05-29 13:52:12 -07:00
Cary R b5e9e44e07 Fix error in of_SUBI with wide results.
This patch fixes an error in the recent rework of of_SUBI.
It was doing a double bit inversion.
2008-05-27 19:42:20 -07:00
Stephen Williams 5a0fe9ff83 Better use of immediate operands.
Clarify that operands are typically 32bits, and have the code generator
make better use of this.

Also improve the %movi implementation to work well with marger vectors.

Add the %andi instruction to use immediate operands.
2008-05-27 17:51:28 -07:00
Stephen Williams 0fa3099ded Optimize %div and %div/s
Use high radix long division to take advantage of the divide hardware
of the host computer. It looks brute force at first glance, but since
it is using the optimized arithmetic of the host processor, it is much
faster then implementing "fast" algorithms the hard way.
2008-05-27 11:54:39 -07:00
Stephen Williams 6987d16bd3 Optimize the %load/vp0 to use subarrays.
This instruction adds an integer value to the value being loaded. This
optimization uses subarrays instead of the += operator. This is faster
because the value is best loaded into the vector as a subarray anyhow.
2008-05-26 16:44:58 -07:00
Stephen Williams 5cc376ebd4 Optimize ADD and MUL instructions
Make better use of the CPU word in ADD and MUL instructions.
2008-05-26 16:00:16 -07:00
Stephen Williams 9af459f95b Vectorize AND/OR/NAND/NOR/INV instructions when reasonable.
When processing wide vectors of these operations, it pays to process
them as vectors. This improves run-time performance. Have the run time
select vectorized or not based on the vector width.
2008-05-23 17:52:43 -07:00
Stephen Williams 492b240304 Optimize vvp_vector4 vector handling.
Improve vvp_vector4_t methods copy_bits and the part selecting constructor
to make better use of vector words. Eliminate bit-by-bit processing by
these methods to take advantage of host processor words.

Improve vthread_bits_to_vector to use these improved methods and Update
the %load/av and %set/v instructions to take advantage of these changes.
2008-05-23 14:30:32 -07:00
Stephen Williams 07ae300e0c Rework %cmpi/u, %cmp/u and %ix/get for speed
These instructions can take advantage of the much optimized
vector_to_array function to do their arithmetic work quickly and
punt on X very quickly if needed. This helps some benchmarks.
2008-05-22 18:19:40 -07:00
Stephen Williams 007056d671 Remove last vestiges of the the .mem structures.
Before the .array support, we had .mem nodes. These are long since
removed because the arrays to all the jobs of the .mem nodes.
2008-05-20 16:57:50 -07:00
Stephen Williams ca517b5519 Handle corner cases of abs(), min() and max()
The abs() function needs to be able to turn -0.0 into 0.0. This proved
to be too clunky (and perhaps impossible) to do with tests and jumps,
so add an %abs/wr opcode to do it using fabs().

The min/max functions need to take special care with the handling
of NaN operands. These matter, so generate the extra code to handle
them.
2008-05-06 22:19:59 -07:00
Stephen Williams 7b81eb3494 Optimize the SUB instruction
The %sub instruction didn't have the efficent implementation that
the %add instructions used. Update subtraction to use the array
method, so that it gets the same performance benefits.
2008-04-23 14:03:52 -07:00