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iverilog
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Merge branch 'master' of ssh://steve-icarus@icarus.com/home/u/icarus/steve/git/verilog

This commit is contained in:
Stephen Williams 2008-05-29 14:00:51 -07:00
parent a8f492776a 6f30813102
commit dfa6471227
3 changed files with 6 additions and 6 deletions
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4
vvp/lexor.lex
View File

@ -184,11 +184,11 @@
return T_INSTR; }
[0-9][0-9]* {
yylval.numb = strtol(yytext, 0, 0);
yylval.numb = strtoul(yytext, 0, 0);
return T_NUMBER; }
"0x"[0-9a-fA-F]+ {
yylval.numb = strtol(yytext, 0, 0);
yylval.numb = strtoul(yytext, 0, 0);
return T_NUMBER; }
/* Handle some specialized constant/literals as symbols. */

2
vvp/parse.y
View File

@ -47,7 +47,7 @@ static struct __vpiModPath*modpath_dst = 0;
%union {
char*text;
char **table;
long numb;
unsigned long numb;
bool flag;
comp_operands_t opa;

6
vvp/vthread.cc
View File

@ -1102,7 +1102,7 @@ static bool of_CMPIU_the_hard_way(vthread_t thr, vvp_code_t cp)
{
unsigned idx1 = cp->bit_idx[0];
unsigned imm = cp->bit_idx[1];
unsigned long imm = cp->bit_idx[1];
unsigned wid = cp->number;
if (idx1 >= 4)
thr_check_addr(thr, idx1+wid-1);
@ -1116,8 +1116,8 @@ static bool of_CMPIU_the_hard_way(vthread_t thr, vvp_code_t cp)
vvp_bit4_t eq = BIT4_0;
for (unsigned idx = 0 ; idx < wid ; idx += 1) {
vvp_bit4_t rv = (imm & 1)? BIT4_1 : BIT4_0;
imm >>= 1;
vvp_bit4_t rv = (imm & 1UL)? BIT4_1 : BIT4_0;
imm >>= 1UL;
if (bit4_is_xz(lv)) {
eq = BIT4_X;