5b351599f0
Allow attributes on Verilog 2001 port declarations.
2003-07-04 03:57:18 +00:00
21ff80075a
Various warnings fixed.
2003-06-24 01:38:02 +00:00
ccf4d4d7da
Module attributes from the parser
...
through to elaborated form.
2003-06-20 00:53:19 +00:00
3ef65d1298
Properly manage real variables in subscopes.
2003-06-13 19:10:45 +00:00
dc90f0d52d
Task/functions can have signed ports.
2003-06-13 00:27:09 +00:00
cb0a9b254e
More 2001 port declaration support.
2003-04-28 17:50:57 +00:00
561a268c9c
Break sized constants into a size token
...
and a based numeric constant.
2003-04-14 03:37:47 +00:00
658706ad8b
lex_strings.add module names earlier.
2003-03-06 04:37:12 +00:00
4c67de5ca7
Add the lex_strings string handler, and put
...
scope names and system task/function names
into this table. Also, permallocate event
names from the beginning.
2003-03-01 06:25:30 +00:00
e58030498f
specparams as far as pform.
2003-02-27 06:45:11 +00:00
9adbdcb7c5
Add support for signed ports and nets.
2003-02-02 19:02:39 +00:00
46253ed873
Rework expression parsing and elaboration to
...
accommodate real/realtime values and expressions.
2003-01-26 21:15:58 +00:00
ad6ff5562d
Missed a case of setting line on an PEident.
2003-01-17 05:47:30 +00:00
3c1426e631
Detect duplicate module declarations.
2003-01-16 21:44:19 +00:00
f56d763411
Move strstream to ostringstream for compatibility.
2003-01-14 21:16:18 +00:00
4a3459c87c
Spelling fixes.
2003-01-10 03:08:13 +00:00
7e1e44e87a
Properly cast signedness of parameters with ranges.
2002-09-01 03:01:48 +00:00
4de141ab1d
Support parameters with defined ranges.
2002-08-19 02:39:16 +00:00
52bf4e613f
conditional ident string using autoconfig.
2002-08-12 01:34:58 +00:00
5eca5d9948
Carry integerness throughout the compilation.
2002-06-21 04:59:35 +00:00
bfad382fd1
Carry Verilog 2001 attributes with processes,
...
all the way through to the ivl_target API.
Divide signal reference counts between rval
and lval references.
2002-05-26 01:39:02 +00:00
700887d657
Verilog 2001 attriubtes on nets/wires.
2002-05-24 04:36:23 +00:00
e6c0629626
Add language support for Verilog-2001 attribute
...
syntax. Hook this support into existing $attribute
handling, and add number and void value types.
Add to the ivl_target API new functions for access
of complex attributes attached to gates.
2002-05-23 03:08:50 +00:00
74c219f171
Add ranges and signed to port list declarations.
2002-05-20 02:06:01 +00:00
bf10c5762a
Parse port_declaration_lists from the 2001 Standard.
2002-05-19 23:37:28 +00:00
76b5d7e9e1
Fix first_file test for timescale warning.
2002-04-18 18:38:37 +00:00
0ab42597d9
Timescale warnings.
2002-04-15 00:04:22 +00:00
f7f61a8696
Detect mismatches in reg as module items and ports.
2002-04-12 02:57:08 +00:00
a624021a2e
Detect duplicate port declarations.
2002-01-31 04:10:15 +00:00
712080f7e0
Detect scalar/vector declarion mismatch.
2002-01-26 05:28:28 +00:00
361d4f2147
Drive strengths for continuous assignments.
2002-01-12 04:03:39 +00:00
c200c0c20e
Support integer for function return value.
2001-12-07 05:03:13 +00:00
ab6c8cb4b8
Parser and pform use hierarchical names as hname_t
...
objects instead of encoded strings.
2001-12-03 04:47:14 +00:00
65f835f3eb
Properly parse net_decl assignments with delays.
2001-11-29 17:37:51 +00:00
4d0b840c26
Coerse input to inout when assigned to.
2001-11-10 02:08:49 +00:00
faa3a62259
detect module ports not declared within the module.
2001-10-31 03:11:15 +00:00
467ecf5b33
Error messages for missing UDP port declarations.
2001-10-21 01:55:24 +00:00
9f3e64e11a
Module types in pform are char* instead of string.
2001-10-21 00:42:47 +00:00
6466d02eda
Add automatic module libraries.
2001-10-20 23:02:39 +00:00
7a149a6943
Scope/module names are char* instead of string.
2001-10-20 05:21:51 +00:00
b825f8d2b2
Create a config.h.in file to hold all the config
...
junk, and support gcc 3.0. (Stephan Boettcher)
2001-07-25 03:10:48 +00:00
b79da2c4d6
Detect input and input ports declared as reg.
2001-05-25 02:21:34 +00:00
d4b2958e50
Deleted wrong time when -Tmax is selected.
2001-05-20 15:03:25 +00:00
9bb2cee686
UDP instances need not have user supplied names.
2001-04-28 23:18:08 +00:00
84c7795d16
Allow task ports to be given real types.
2001-02-17 05:15:33 +00:00
a00924089d
Pass scope type information to the target module.
2001-01-15 00:47:01 +00:00
219df169a3
Generalize the evaluation of floating point delays, and
...
get it working with delay assignment statements.
Allow parameters to be referenced by hierarchical name.
2001-01-14 23:04:55 +00:00
246f2d5884
Match memories within task scopes. (PR#101)
2001-01-10 05:32:44 +00:00
cc18d065aa
declaration initialization for time variables.
2001-01-06 06:31:58 +00:00
68e672e61a
Support arrays of integers.
2001-01-06 02:29:35 +00:00
5dbea64759
Add support for signed reg variables,
...
simulate in t-vvm signed comparisons.
2000-12-11 00:31:43 +00:00
ef49fc127f
Change LineInfo to store const C strings.
2000-11-30 17:31:42 +00:00
3591e06c4e
Support time variables.
2000-10-31 17:49:02 +00:00
88c8547486
Remove C++ string from variable lists.
2000-10-31 17:00:04 +00:00
67472379b4
Error message for invalid variable list.
2000-09-13 16:32:26 +00:00
30a81731dd
Introduce min:typ:max support.
2000-07-29 17:58:20 +00:00
286cef19fb
Parse and elaborate timescale to scopes.
2000-07-22 22:09:03 +00:00
8fc2dc2cd1
Better parsing of expressions lists will empty expressoins.
2000-05-23 16:03:13 +00:00
3676d66408
Module ports are really special PEIdent
...
expressions, because a name can be used
many places in the port list.
2000-05-16 04:05:15 +00:00
de1a7a0933
Deliver gate output strengths to the netlist.
2000-05-08 05:30:19 +00:00
ca2fd41bb6
Carry assignment strength to pform.
2000-05-06 15:41:56 +00:00
2dd010dc04
Named events as far as the pform.
2000-04-01 19:31:57 +00:00
6eef54595f
Support localparam.
2000-03-12 17:09:40 +00:00
e7efc2709a
Redesign the implementation of scopes and parameters.
...
I now generate the scopes and notice the parameters
in a separate pass over the pform. Once the scopes
are generated, I can process overrides and evalutate
paremeters before elaboration begins.
2000-03-08 04:36:53 +00:00
b734ecf02f
Macintosh compilers do not support ident.
2000-02-23 02:56:53 +00:00
5b52c384d6
Catch module instantiation arrays.
2000-02-18 05:15:02 +00:00
2de887c2ff
Support named parameter override lists.
2000-01-09 05:50:48 +00:00
e52a5be16e
Forgot to handle no overrides at all.
2000-01-02 01:59:28 +00:00
7e37b61a05
Fix module parameter override syntax.
2000-01-01 23:47:58 +00:00
6d0edcf58a
Support reg initial assignment syntax.
1999-12-30 19:06:14 +00:00
3e1738dcec
Fix support for attaching attributes to primitive gates.
1999-12-11 05:45:41 +00:00
cd3ed1959e
A file name of - means standard input.
1999-11-23 01:04:57 +00:00
b37fcf3593
Handle declaration of integers (including scope) in functions.
1999-09-30 01:22:37 +00:00
fcfa9d004a
Get scope right when setting the net range.
1999-09-21 00:58:33 +00:00
424e6a750c
Handle unconnected module ports.
1999-09-17 02:06:25 +00:00
b04148b754
Elaborate non-blocking assignment to memories.
1999-09-15 01:55:06 +00:00
287d21f300
Handle integers at task parameters.
1999-09-10 05:02:09 +00:00
e69345b9fe
Elaborate and emit to vvm procedural functions.
1999-08-31 22:38:29 +00:00
3017636c05
continuous assignment lists.
1999-08-27 15:08:37 +00:00
23acca48ff
elaborate some aspects of functions.
1999-08-25 22:22:41 +00:00
9eae940ebd
Parameter overrides support from Peter Monta
...
AND and XOR support wide expressions.
1999-08-23 16:48:39 +00:00
5f10342f52
Parse into pform arbitrarily complex module
...
port declarations.
1999-08-03 04:14:49 +00:00
71d35f32b2
Parse and elaborate rise/fall/decay times
...
for gates, and handle the rules for partial
lists of times.
1999-08-01 16:34:50 +00:00
0f91039134
misspelled comment.
1999-07-31 19:15:21 +00:00
e0a988bf7e
Add functions up to elaboration (Ed Carter)
1999-07-31 19:14:47 +00:00
93a77a2efd
Elaborate task input ports.
1999-07-24 02:11:19 +00:00
46df679fc5
remove string from lexical phase.
1999-07-10 01:03:18 +00:00
3ff6912bdd
Elaborate user defined tasks.
1999-07-03 02:12:51 +00:00
11b2b1740a
Handle expression widths for EEE and NEE operators,
...
add named blocks and scope handling,
add registers declared in named blocks.
1999-06-24 04:24:18 +00:00
349f0427d4
Fix merging of UDP port type in decls.
1999-06-21 01:02:16 +00:00
37b60a4c52
Clean up interface of the PWire class,
...
Properly match wire ranges.
1999-06-17 05:34:42 +00:00
d0afc9adee
Get rid of the STL vector template.
1999-06-15 03:44:53 +00:00
740c63291a
l-value part select for procedural assignments.
1999-06-13 23:51:16 +00:00
29da349106
parse more verilog.
1999-06-12 20:35:27 +00:00
60237c0100
Assert state of bit range expressions.
1999-06-12 03:42:17 +00:00
7605a7b1f0
Add parse and elaboration of non-blocking assignments,
...
Replace list<PCase::Item*> with an svector version,
Add integer support.
1999-06-06 20:45:38 +00:00
f3a91a10b3
Line information with nets.
1999-06-02 15:38:46 +00:00
b9b1531a34
makegates infinite loop fixed.
1999-05-31 15:45:59 +00:00
35893919e0
module parameter bind by name.
1999-05-29 02:36:17 +00:00
0352864470
Much expression parsing work,
...
mark continuous assigns with source line info,
replace some assertion failures with Sorry messages.
1999-05-20 04:31:45 +00:00
steve