Commit Graph

200 Commits

Author SHA1 Message Date
Stephen Williams 5b273178f5 Parse disciplines and contribution statements
Parse discipline declarations, net discipline declarations, and
analog contribution statements. Don't yet do anything useful with
these, just give a sorry message where they are encountered.
2008-05-11 12:00:11 -07:00
Cary R 4f8b91e65c Add file and line information for parameters, etc.
This patch adds file and line information for parameters and
local parameters. It also adds file/line stubs for signals in
the tgt-* files. It adds the pform code needed to eventually
do genvar checks and passing of genvar file/line information.
It verifies that a genvar does not have the same name as a
parameter/local parameter.
2008-05-06 07:14:27 -07:00
Stephen Williams 8e704cbf93 Rework handling of lexical scope
Move the storage of wires (signals) out of the Module class into
the PScope base class, and instead of putting the PWires all into
the Module object, distribute them into the various lexical scopes
(derived from PScope) so that the wire names do not need to carry
scope information.

This required some rewiring of elaboration of signals, and rewriting
of lexical scope handling.
2008-02-24 19:40:54 -08:00
Stephen Williams b0e4a6884a Objects of lexical scope use PScope base class.
All the pform objects that represent lexical scope now are derived
from the PScope class, and are kept in a lexical_scope table so that
the scope can be managed.
2008-02-15 21:20:24 -08:00
Stephen Williams bc1d3eb7cd Add support for generate case
Generate case is a complex generate scheme where the items are
sub-schemes of the case generate itself. The parser handles them
something like nested generate statements, but storing the case
guards as the test expression. Then the elaborator notes the
case scheme and reaches into the case item schemes inside to make
up tests, select the generate item, and elaborate.
2008-02-09 22:19:42 -08:00
Larry Doolittle d9ac146b8f Spelling fixes
only comments and documentation
some punctuation and capitalization for good measure
Changelogs are purposefully untouched
2008-01-29 20:24:24 -08:00
Cary R b69c4c9a2c Fix range handling/checking and add a flag to allow deprecated port syntax.
This patch is rather large and fixes a couple of problems. The major
change is that instead of keeping all the range specifications in
a list that is later processed the information is now kept as
individual entries for the port and net definitions. This allows
easier checking for multiple definitions (pr1660028), more
detailed error messages and the ability to pass the now deprecated
style of a scalar I/O definition used with a vectored net definition.
These changes did require extra code to prevent a single definition
from setting the range values in more than on place.

When using the new ANSI-C style of port declarations (1364-2001 12.3.4
list_of_port_declarations) the compiler ensures that you do not
redeclare the port in the body (it is already completely defined).
This caught a few errors in the test suite (pr859 and sqrt32*).

The flag to disable the normal port checking and allow the deprecated
port syntax is -gno-io-range-error. This will print a warning for the
case of a scalar port with a vectored definition in the body. All
other cases are still considered an error.
2007-08-29 18:10:18 -07:00
Cary R ca924639a8 [PATCH] Better error message when an endmodule is missing (nested modules).
This patch adds better checking for a missing endmodule or an attempt
to nest modules. A more descriptive message is printed and the location
of the original module definition is printed.
2007-08-28 17:49:34 -07:00
Stephen Williams 396ffd1cdd Add support for conditional generate. In the process, fix bugs
related to generate used multiple times by multiple scopes causing
spurious generation results.


Signed-off-by: Stephen Williams <steve@icarus.com>
2007-06-21 19:04:48 -07:00
steve ddd36ecb6c Rework the heirarchical identifier parse syntax and pform
to handle more general combinations of heirarch and bit selects.
2007-05-24 04:07:11 +00:00
steve f9c1c02f8d Add support for -v flag in command file. 2007-04-19 02:52:53 +00:00
steve f621448ced Parse edge sensitive paths without edge specifier. 2007-04-13 02:34:35 +00:00
steve c1c2381261 Parse all specify paths to pform. 2007-02-12 01:52:21 +00:00
steve 0edb5a7547 Basic support for specify timing. 2006-09-23 04:57:19 +00:00
steve f001d0001a Add support for generate loops w/ wires and gates. 2006-04-10 00:37:42 +00:00
steve 77a0d7f4db task/function ports can have types. 2006-03-30 05:22:34 +00:00
steve 1021e5acc8 Fixes for stubborn compilers. 2005-12-05 21:21:18 +00:00
steve 75ad90534b Generalize signals to carry types. 2005-07-07 16:22:49 +00:00
steve 65e9b6be12 Rework of internals to carry vectors through nexus instead
of single bits. Make the ivl, tgt-vvp and vvp initial changes
 down this path.
2004-12-11 02:31:25 +00:00
steve 95c8115fc7 Add support for localparam ranges. 2004-08-26 04:02:03 +00:00
steve 9949040285 Add support for the default_nettype directive. 2004-06-13 04:56:53 +00:00
steve 5472b27e1f Rewire/generalize parsing an elaboration of
function return values to allow for better
 speed and more type support.
2004-05-31 23:34:36 +00:00
steve e7fa56981a More identifier lists use perm_strings. 2004-05-25 19:21:06 +00:00
steve 413932e406 Verilog2001 new style port declartions for primitives. 2004-03-08 00:10:29 +00:00
steve 177b6ffb6a Addtrbute keys are perm_strings. 2004-02-20 18:53:33 +00:00
steve 1295058e5d parameter keys are per_strings. 2004-02-20 06:22:56 +00:00
steve 27af95d402 Use perm_strings for named langiage items. 2004-02-18 17:11:54 +00:00
steve 5b351599f0 Allow attributes on Verilog 2001 port declarations. 2003-07-04 03:57:18 +00:00
steve ccf4d4d7da Module attributes from the parser
through to elaborated form.
2003-06-20 00:53:19 +00:00
steve dc90f0d52d Task/functions can have signed ports. 2003-06-13 00:27:09 +00:00
steve cb0a9b254e More 2001 port declaration support. 2003-04-28 17:50:57 +00:00
steve 561a268c9c Break sized constants into a size token
and a based numeric constant.
2003-04-14 03:37:47 +00:00
steve e58030498f specparams as far as pform. 2003-02-27 06:45:11 +00:00
steve 9adbdcb7c5 Add support for signed ports and nets. 2003-02-02 19:02:39 +00:00
steve e941e7e805 Spelling fixes. 2003-01-30 16:23:07 +00:00
steve 46253ed873 Rework expression parsing and elaboration to
accommodate real/realtime values and expressions.
2003-01-26 21:15:58 +00:00
steve 7e1e44e87a Properly cast signedness of parameters with ranges. 2002-09-01 03:01:48 +00:00
steve 4de141ab1d Support parameters with defined ranges. 2002-08-19 02:39:16 +00:00
steve 52bf4e613f conditional ident string using autoconfig. 2002-08-12 01:34:58 +00:00
steve 28e0616543 Use standard name for iostream. 2002-06-06 18:57:18 +00:00
steve bfad382fd1 Carry Verilog 2001 attributes with processes,
all the way through to the ivl_target API.

 Divide signal reference counts between rval
 and lval references.
2002-05-26 01:39:02 +00:00
steve 700887d657 Verilog 2001 attriubtes on nets/wires. 2002-05-24 04:36:23 +00:00
steve e6c0629626 Add language support for Verilog-2001 attribute
syntax. Hook this support into existing $attribute
 handling, and add number and void value types.

 Add to the ivl_target API new functions for access
 of complex attributes attached to gates.
2002-05-23 03:08:50 +00:00
steve 74c219f171 Add ranges and signed to port list declarations. 2002-05-20 02:06:01 +00:00
steve bf10c5762a Parse port_declaration_lists from the 2001 Standard. 2002-05-19 23:37:28 +00:00
steve 361d4f2147 Drive strengths for continuous assignments. 2002-01-12 04:03:39 +00:00
steve c200c0c20e Support integer for function return value. 2001-12-07 05:03:13 +00:00
steve ab6c8cb4b8 Parser and pform use hierarchical names as hname_t
objects instead of encoded strings.
2001-12-03 04:47:14 +00:00
steve 65f835f3eb Properly parse net_decl assignments with delays. 2001-11-29 17:37:51 +00:00
steve 4d0b840c26 Coerse input to inout when assigned to. 2001-11-10 02:08:49 +00:00
steve faa3a62259 detect module ports not declared within the module. 2001-10-31 03:11:15 +00:00
steve 467ecf5b33 Error messages for missing UDP port declarations. 2001-10-21 01:55:24 +00:00
steve 9f3e64e11a Module types in pform are char* instead of string. 2001-10-21 00:42:47 +00:00
steve 6466d02eda Add automatic module libraries. 2001-10-20 23:02:39 +00:00
steve 7a149a6943 Scope/module names are char* instead of string. 2001-10-20 05:21:51 +00:00
steve 5dbea64759 Add support for signed reg variables,
simulate in t-vvm signed comparisons.
2000-12-11 00:31:43 +00:00
steve ef49fc127f Change LineInfo to store const C strings. 2000-11-30 17:31:42 +00:00
steve 3591e06c4e Support time variables. 2000-10-31 17:49:02 +00:00
steve 88c8547486 Remove C++ string from variable lists. 2000-10-31 17:00:04 +00:00
steve 30a81731dd Introduce min:typ:max support. 2000-07-29 17:58:20 +00:00
steve de1a7a0933 Deliver gate output strengths to the netlist. 2000-05-08 05:30:19 +00:00
steve ca2fd41bb6 Carry assignment strength to pform. 2000-05-06 15:41:56 +00:00
steve 2dd010dc04 Named events as far as the pform. 2000-04-01 19:31:57 +00:00
steve 6eef54595f Support localparam. 2000-03-12 17:09:40 +00:00
steve e7efc2709a Redesign the implementation of scopes and parameters.
I now generate the scopes and notice the parameters
 in a separate pass over the pform. Once the scopes
 are generated, I can process overrides and evalutate
 paremeters before elaboration begins.
2000-03-08 04:36:53 +00:00
steve b734ecf02f Macintosh compilers do not support ident. 2000-02-23 02:56:53 +00:00
steve f37f69f160 minor type syntax fix for stubborn C++ compilers. 2000-01-10 22:16:24 +00:00
steve 2de887c2ff Support named parameter override lists. 2000-01-09 05:50:48 +00:00
steve 6d0edcf58a Support reg initial assignment syntax. 1999-12-30 19:06:14 +00:00
steve 287d21f300 Handle integers at task parameters. 1999-09-10 05:02:09 +00:00
steve 3017636c05 continuous assignment lists. 1999-08-27 15:08:37 +00:00
steve 23acca48ff elaborate some aspects of functions. 1999-08-25 22:22:41 +00:00
steve 9eae940ebd Parameter overrides support from Peter Monta
AND and XOR support wide expressions.
1999-08-23 16:48:39 +00:00
steve 5f10342f52 Parse into pform arbitrarily complex module
port declarations.
1999-08-03 04:14:49 +00:00
steve 71d35f32b2 Parse and elaborate rise/fall/decay times
for gates, and handle the rules for partial
 lists of times.
1999-08-01 16:34:50 +00:00
steve e0a988bf7e Add functions up to elaboration (Ed Carter) 1999-07-31 19:14:47 +00:00
steve 93a77a2efd Elaborate task input ports. 1999-07-24 02:11:19 +00:00
steve 46df679fc5 remove string from lexical phase. 1999-07-10 01:03:18 +00:00
steve 3ff6912bdd Elaborate user defined tasks. 1999-07-03 02:12:51 +00:00
steve 11b2b1740a Handle expression widths for EEE and NEE operators,
add named blocks and scope handling,
 add registers declared in named blocks.
1999-06-24 04:24:18 +00:00
steve d0afc9adee Get rid of the STL vector template. 1999-06-15 03:44:53 +00:00
steve 29da349106 parse more verilog. 1999-06-12 20:35:27 +00:00
steve 7605a7b1f0 Add parse and elaboration of non-blocking assignments,
Replace list<PCase::Item*> with an svector version,
 Add integer support.
1999-06-06 20:45:38 +00:00
steve f3a91a10b3 Line information with nets. 1999-06-02 15:38:46 +00:00
steve 35893919e0 module parameter bind by name. 1999-05-29 02:36:17 +00:00
steve 0352864470 Much expression parsing work,
mark continuous assigns with source line info,
 replace some assertion failures with Sorry messages.
1999-05-20 04:31:45 +00:00
steve 10ffaeda90 Redo constant expression detection to happen
after parsing.

 Parse more operators and expressions.
1999-05-16 05:08:42 +00:00
steve 5de9b7c9f1 Parse and elaborate the concatenate operator
in structural contexts, Replace vector<PExpr*>
 and list<PExpr*> with svector<PExpr*>, evaluate
 constant expressions with parameters, handle
 memories as lvalues.

 Parse task declarations, integer types.
1999-05-10 00:16:57 +00:00
steve 8e73ff2376 Parse more complex continuous assign lvalues. 1999-05-07 04:26:49 +00:00
steve a568e526c6 Get rid of list<lgate> types. 1999-05-06 04:37:17 +00:00
steve b2b9097488 Parse more constant expressions. 1999-05-06 04:09:28 +00:00
steve 5895d3c98d Add memories to the parse and elaboration phases. 1999-04-19 01:59:36 +00:00
steve e2a37a8ccd Add support for module parameters. 1999-02-21 17:01:57 +00:00
steve e5f5f41515 Elaborate gate ranges. 1999-02-15 02:06:15 +00:00
steve fb439c78b9 Add the LineInfo class to carry the source file
location of things. PGate, Statement and PProcess.

 elaborate handles module parameter mismatches,
 missing or incorrect lvalues for procedural
 assignment, and errors are propogated to the
 top of the elaboration call tree.

 Attach line numbers to processes, gates and
 assignment statements.
1999-01-25 05:45:56 +00:00
steve 45f45f73b7 Support the include directive. 1998-12-09 04:02:47 +00:00
steve e097c999d5 Elaborate UDP devices,
Support UDP type attributes, and
 pass those attributes to nodes that
 are instantiated by elaboration,
 Put modules into a map instead of
 a simple list.
1998-12-01 00:42:13 +00:00
steve 91aad30e1f Parse UDP primitives all the way to pform. 1998-11-25 02:35:53 +00:00
steve af8d6fbf01 NetAssign handles lvalues as pin links
instead of a signal pointer,
 Wire attributes added,
 Ability to parse UDP descriptions added,
 XNF generates EXT records for signals with
 the PAD attribute.
1998-11-23 00:20:22 +00:00
steve 3fb7a053be Introduce verilog to CVS. 1998-11-03 23:28:49 +00:00