Commit Graph

166 Commits

Author SHA1 Message Date
steve e24e77660f Detect and use the nan function. 2007-06-13 01:03:57 +00:00
steve ae82eccdc4 handle constant inf values. 2007-06-12 02:36:58 +00:00
steve 0a38499941 Properly handle signed conversion to real 2007-06-07 03:20:15 +00:00
steve 55f8e5d364 int vs long expressions on 64bit arch (ldoolitt) 2007-06-05 21:52:22 +00:00
steve 9931e4c013 Finish up part select of array words. 2007-04-14 04:43:01 +00:00
steve 4f74d9df98 Add the mov/wr opcode. 2007-02-14 05:58:14 +00:00
steve d958a4a5af Handle relink of continuous assignment. 2007-02-05 01:08:10 +00:00
steve 85ceea7358 Fix missing check for thread bits width in ADDI 2007-01-31 22:28:55 +00:00
steve 91d84e7dc7 Major rework of array handling. Memories are replaced with the
more general concept of arrays. The NetMemory and NetEMemory
 classes are removed from the ivl core program, and the IVL_LPM_RAM
 lpm type is removed from the ivl_target API.
2007-01-16 05:44:14 +00:00
steve 26e2e85ffa Handle non-constant delays on indexed non-blocking assignments. 2006-10-05 01:23:53 +00:00
steve 50800fd3a1 Add support for real valued modulus. 2006-08-09 05:19:08 +00:00
steve fc0695beb6 Handle 64bit delay constants. 2006-08-08 05:11:37 +00:00
steve 898b0e0365 Support release of a for/linked reg. 2006-08-04 04:37:37 +00:00
steve 36039e13ec schedule takes relative, not absolute, time. 2006-04-27 04:38:00 +00:00
steve d0de678d57 real-to-integer conversions round, not truncate. 2006-02-02 05:48:45 +00:00
steve d434dd7296 Allow part selects of memory words in l-values. 2006-02-02 02:43:57 +00:00
steve 2b8fd28a95 Force instruction that can be indexed. 2005-11-26 17:16:05 +00:00
steve 35951510c5 Put vec8 and vec4 nets into seperate net classes. 2005-11-25 17:55:26 +00:00
steve be73be8c98 Spelling patches from Larry. 2005-09-19 21:45:35 +00:00
steve 988a0a7048 Add the load/v.p instruction. 2005-09-17 04:01:01 +00:00
steve 65584e6dde Add word integer compares. 2005-09-14 02:50:07 +00:00
steve efd7825964 minor correction to address check in of_MOV1XZ 2005-08-30 00:49:21 +00:00
steve 7c19eb51e7 Minor cleanup. 2005-08-29 04:46:13 +00:00
steve 5cf2ce6499 Fix bit destination address in of_AND 2005-08-27 03:28:57 +00:00
steve bc489a7761 Bring threads into the vvp_vector4_t structure. 2005-08-27 02:34:42 +00:00
steve de1dd2f2b3 Make bit masks of vector4_t 64bit aware. 2005-06-26 01:57:22 +00:00
steve 1b30bac9f3 Optimize the LOAD_VEC implementation. 2005-06-19 18:42:00 +00:00
steve cd14ee77ae Add the assign_v0_d instruction. 2005-06-14 01:44:09 +00:00
steve fb8ddbbfde Remove useless references to functor.h 2005-06-12 01:25:27 +00:00
steve 42433f4df9 Add support for notif0/1 gates.
Make delay nodes support inertial delay.
 Add the %force/link instruction.
2005-06-02 16:02:11 +00:00
steve d6a89a40cf Clean up instruction type reverences to bits. 2005-05-17 20:51:06 +00:00
steve 5277124c76 Implement non-blocking part assign. 2005-05-07 03:15:42 +00:00
steve 2894cdefc7 Add cassign/link instruction. 2005-05-01 22:05:21 +00:00
steve d8a456bd67 The indexed set can write a vector, not just a bit. 2005-03-22 05:18:34 +00:00
steve 8e135a1020 Non blocking assign to memory words. 2005-03-06 17:07:48 +00:00
steve e7c2e06260 Check that lead.mv vector width matches word. 2005-03-05 05:45:18 +00:00
steve 85286cc086 Rearrange how memories are supported as vvp_vector4 arrays. 2005-03-03 04:33:10 +00:00
steve c5e7e2ec0a Signals may receive part vectors from %set/x0
instructions. Re-implement the %set/x0 to do
 just that. Remove the useless %set/x0/x instruction.
2005-02-14 01:50:23 +00:00
steve 355ead0002 Add debug dumps for vectors, and fix vvp_scaler_t make from BIT4_X values. 2005-02-12 06:13:22 +00:00
steve a121e703f3 Add vector4 implementation of .arith/mult. 2005-01-28 05:34:25 +00:00
steve 1d1dda5a5d Implement the %load/x instruction. 2005-01-22 00:58:22 +00:00
steve 26d97558c4 Replace single release with release/net and release/reg. 2004-12-17 04:47:47 +00:00
steve 78dda42493 Add the force/v instruction. 2004-12-15 17:17:42 +00:00
steve 65e9b6be12 Rework of internals to carry vectors through nexus instead
of single bits. Make the ivl, tgt-vvp and vvp initial changes
 down this path.
2004-12-11 02:31:25 +00:00
steve e4ae832153 Clean up spurious trailing white space. 2004-10-04 01:10:51 +00:00
steve 51fd249d8a Watch type of mak bit matches masked value. 2004-06-19 16:17:02 +00:00
steve 050ec6f325 Add signed modulus operator. 2004-06-19 15:52:53 +00:00
steve 8d3102388b Pick sign bit from the right place in the exponent number. 2004-06-04 23:26:34 +00:00
steve a7ae8adf9b Support delayed/non-blocking assignment to reals and others. 2004-05-19 03:26:24 +00:00
steve 995cd449c5 Include config.h 2003-11-10 20:19:32 +00:00