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5830 Commits

Author SHA1 Message Date
Alan Mishchenko 7c6b779327 Supporting programmable cell libraries. 2025-11-01 01:23:30 -07:00
Alan Mishchenko a9d62d845d Experiments with LUT mapping. 2025-11-01 01:21:37 -07:00
Alan Mishchenko 6034f6621b Changes to cut dumping. 2025-10-30 22:14:18 -07:00
Alan Mishchenko 56a7c049ae Extending max support size in "lutexact". 2025-10-30 16:35:15 -07:00
Alan Mishchenko 18f6464ec7 Experiments with LUT mapping. 2025-10-24 16:57:55 -07:00
Alan Mishchenko 3a1efd48f7 Enabling multiple LUT libraries. 2025-10-24 11:46:55 -07:00
Alan Mishchenko 4c6b082463 Reusing switch "-j" in "if" and "&if". 2025-10-24 10:59:56 -07:00
Alan Mishchenko 6fb4f739b0 Suppress a warning about uninitialized variable. 2025-10-24 10:58:38 -07:00
Alan Mishchenko f39b84a4a1 Fixing compilation problem. 2025-10-22 11:24:18 -07:00
Alan Mishchenko 93f3791fbe Command "&dg" contributed by Jiun-Hao Chen from NTU. 2025-10-22 11:15:07 -07:00
Miodrag Milanovic a1f5e4541b Fix compilation for mingw and wasi 2025-10-20 07:38:00 +02:00
Alan Mishchenko 7fbcde9d22 Correcting performance degradation introduced by a bug fix in commit e824cca0c 2025-10-10 13:47:23 -07:00
Alan Mishchenko c8eac7595d Another bug fix. 2025-10-01 22:23:27 -07:00
Alan Mishchenko 9596162b4a Bug fix in the previous commit. 2025-09-30 22:18:30 -07:00
Alan Mishchenko 4c25599cce Exploring multiplier boundaries. 2025-09-30 15:49:14 -07:00
Alan Mishchenko 613fa4f5eb Enable saving choices in &deepsyn. 2025-09-30 15:48:45 -07:00
Alan Mishchenko b28e042afd Compiler warning. 2025-09-16 02:45:58 +07:00
Alan Mishchenko 08230e0c31 Adding choice computaiton to &stochsyn. 2025-09-16 02:33:08 +07:00
Alan Mishchenko 745376d505 Reconstruction of structural choices. 2025-09-16 00:59:49 +07:00
Alan Mishchenko 9478c17288 Adding the dump of non-decomposable functions in "lutcasdec". 2025-08-31 20:18:30 -07:00
Alan Mishchenko 5adfd0030d Silencing benign assertion failure (Issue #428) 2025-08-29 18:41:38 -07:00
alanminko 4dfa49774f
Merge pull request #438 from chenjunhao0315/master 
rewire support timing-constraint
 2025-08-29 10:55:59 -07:00
jiunhaochen 4f29be9046 rewire support timing-constraint 2025-08-27 00:56:43 +08:00
Martin Povišer 3455f423d0 Fix capacitance unit parsing 
Fix the liberty parser to handle "capacitive_load_unit (1,fF)".
Previously this input would produce a corrupted internal representation
for the library as there would be an extra value written on line 944.
 2025-08-26 12:05:05 +02:00
Alan Mishchenko 279217b73d Updating procedures to dump cut info. 2025-08-18 22:00:43 -07:00
Alan Mishchenko 0e4a080779 Enabling "if" to dump the cut and truth table info. 2025-08-16 16:32:29 -07:00
Alan Mishchenko 192c161f93 Enabled default memory blasting when using Yosys. 2025-08-16 16:20:56 -07:00
Alan Mishchenko c5ceff2bee Dumping a binary file with truth tables in "if". 2025-08-12 16:00:26 -07:00
Alan Mishchenko e29dcd9f32 Adding a way to dump sets of resub problems. 2025-08-11 22:44:46 -07:00
Alan Mishchenko e7d360811f Fixed combo loop in choice computation. 2025-08-10 11:04:20 -07:00
Alan Mishchenko 15151c58ed Updating &stochsyn with switch '-d' to support level-preserving AIG optimizations. 2025-08-09 18:10:32 -07:00
Alan Mishchenko 00910e36ff Fixing typos. 2025-08-09 17:00:02 -07:00
Alan Mishchenko a5715bc32d Updates to the prefix tree generation. 2025-08-09 16:43:55 -07:00
Alan Mishchenko 5e09cca964 Handing the case of signed comparators. 2025-08-09 14:46:45 -07:00
Alan Mishchenko 1a18c9a3d8 : lutexact 2025-08-07 12:35:03 -07:00
Alan Mishchenko fd74cb8e8a Refactored the code to return prefix tree as an array of GP-nodes. 2025-08-07 10:51:05 -07:00
Alan Mishchenko 260fa85161 Fixing a linker problem. 2025-08-06 07:38:27 -07:00
Alan Mishchenko c738ed6e86 Integrating prefix adder generation code by Martin Povišer 2025-08-05 22:50:06 -07:00
Alan Mishchenko 0218e3e4cb New command for bound-set evaluation. 2025-08-03 20:10:26 -07:00
Alan Mishchenko aeef2c6692 Fixing compiler warning. 2025-08-02 08:58:01 -07:00
Alan Mishchenko 3aa8a4a639 New command to dump circuit structure into a file. 2025-08-02 08:53:22 -07:00
Alan Mishchenko c69e45916a Update &append to share primary inputs. 2025-08-01 14:29:45 -07:00
Alan Mishchenko 052a365823 Undoing previous commit. 2025-07-28 22:58:24 -07:00
Alan Mishchenko 705a3da338 Saving box info for XAIG created usign %blast. 2025-07-28 22:52:27 -07:00
Alan Mishchenko 4ccacb1e5b Adding printout of don't-cares after mapping. 2025-07-21 10:22:43 -07:00
Alan Mishchenko ff56eed4b3 Allowing "lutexact" to take truth table from the current network. 2025-07-21 07:56:30 -07:00
Alan Mishchenko a511d753a6 Improvements to "lutcasdec". 2025-07-20 18:29:20 -07:00
Alan Mishchenko d0118d3917 Adding JSONC parser. 2025-07-14 10:34:24 -07:00
Alan Mishchenko c4c401b7a5 Fixing pointer-dependent behavior during BDD variable reordering. 2025-07-13 20:58:34 -07:00
Alan Mishchenko 990abc4349 Extending external AIG APIs. 2025-07-08 19:26:10 -07:00
Alan Mishchenko f1eebf78f4 Updating command "runscript". 2025-07-08 19:06:04 -07:00
alanminko 0dc5524b80
Merge pull request #425 from MyskYko/fix3 
fix cadical
 2025-07-07 03:44:24 -07:00
MyskYko 13205ccbb3 qbf with cadical 2025-06-21 01:29:26 -07:00
MyskYko 5e03f9fefa more APIs in cadical 2025-06-20 15:55:31 -07:00
MyskYko 6e130c15a3 fix setnvars 2025-06-20 15:28:27 -07:00
MyskYko 9ea1aaa3cf fix comments 2025-06-20 14:45:50 -07:00
MyskYko a5156f257e fix cadical 2025-06-20 13:40:04 -07:00
Alan Mishchenko beff7f1b34 Temporary fix of the compilation problem related to sorting objects by level in rewiring. 2025-06-19 14:32:10 +07:00
alanminko 83824878e3
Merge pull request #422 from MyskYko/fix 
fix amap -m
 2025-06-17 21:20:28 -07:00
MyskYko e9845e534a fix a bug when yosys constants are already declared 2025-06-17 16:41:43 -07:00
MyskYko f443db4a24 fix amap -m 2025-06-16 10:27:33 -07:00
Alan Mishchenko 6463f11625 Fixing pointer-dependent behavior during BDD variable reordering. 2025-06-07 12:52:23 -07:00
alanminko afae379366
Merge pull request #419 from mikesinouye/multilib 
Prevent merged scl filename size from growing unbounded.
 2025-06-07 10:38:15 -07:00
alanminko 5cf5a8d9f5
Merge pull request #412 from tklam/feature/support_verilog_gate_name 
Support primitive gates with names in Verilog netlist
 2025-06-07 10:38:03 -07:00
Mike Inouye a4064b8b73 Prevent merged scl filename size from growing unbounded, which limits upper bound of files loaded. 2025-05-30 18:14:47 +00:00
alanminko 0a55186553
Merge pull request #416 from chenjunhao0315/master 
patch rewire with empty name
 2025-05-25 22:27:43 -07:00
Alan Mishchenko 1f98c28011 Improved cascade printout in "lutcasdec". 2025-05-25 22:24:33 -07:00
Alan Mishchenko 301b46e3c1 Fixiing BLIF reader to read Yosys constants. 2025-05-25 18:45:59 -07:00
jiunhaochen 04161dfda8 patch rewire with empty name 2025-05-26 01:44:04 +08:00
Alan Mishchenko 0ae04514cd Work-around for a bug in "lutcasdec". 2025-05-22 23:56:40 -07:00
Alan Mishchenko 716314d835 Generating AIGs for adders. 2025-05-22 23:56:13 -07:00
Alan Mishchenko 32fe49b6d1 New commands for reading/writing mini-mapping for AIGs. 2025-05-21 21:57:51 -07:00
Alan Mishchenko e1a1994292 Extending "&cofs" to handle multi-output AIGs. 2025-05-21 21:30:58 -07:00
alanminko 0c155952bf
Merge pull request #415 from HAHHHD/master 
add clause pushing with blocking
 2025-05-20 16:37:20 -07:00
Alan Mishchenko 3bd7bac552 Improvements to "lutcasdec". 2025-05-20 16:17:43 -07:00
HAHHHD e20c484ee1 add clause pushing with blocking 2025-05-20 15:04:15 -07:00
Alan Mishchenko c5edc566ff Improvements to "lutcasdec". 2025-05-20 14:28:07 -07:00
Alan Mishchenko 29c8d3eacf Improvements to "lutcasdec". 2025-05-20 10:41:47 -07:00
Alan Mishchenko 9bb736acee Improvements to "lutcasdec". 2025-05-20 06:39:28 -07:00
Alan Mishchenko c398b06740 Experiments with decomposition. 2025-05-20 06:08:46 -07:00
Alan Mishchenko 240bf58f90 Updating "short_names" and BDD profiling. 2025-05-19 10:24:56 -07:00
Alan Mishchenko 916f70058e Updating script runner. 2025-05-18 14:05:50 -07:00
Alan Mishchenko 0b1d7c6d0f Supporting structural choices in rewiring. 2025-05-18 13:37:30 -07:00
Alan Mishchenko 5daa0c347e Small changes to "lutcasdec". 2025-05-16 17:23:32 -07:00
Alan Mishchenko 57966de4b4 Adding flag to skip two-output cells in "read_lib". 2025-05-14 17:01:48 -07:00
Alan Mishchenko d34821e768 Skipping cells with more than two outputs in "read_lib". 2025-05-14 14:17:05 -07:00
Alan Mishchenko 078debff4e Adding print-out of LUT mapping stats. 2025-05-13 22:49:55 -07:00
Alan Mishchenko d245305393 Improvements to "lutcasdec". 2025-05-13 19:21:56 -07:00
tklam 9545b79e0e support primitive gates with names in Verilog netlist 2025-05-12 10:20:13 -04:00
Alan Mishchenko c85f007f75 Convert buffers to .short lines in BLIF. 2025-05-09 18:16:37 -07:00
Alan Mishchenko 490bb92a8c Fixing the Yosys script used to read a mapped netlist. 2025-05-09 17:17:26 -07:00
Alan Mishchenko a42e6ecd23 Fixing a bug in "read_lib". 2025-05-09 17:13:40 -07:00
Alan Mishchenko 9dc7ade063 Adding a switch to read mapped Verilog using command %yosys. 2025-05-09 11:47:26 -07:00
Alan Mishchenko 71b60a9830 Updating &stochsyn. 2025-05-07 19:53:53 -07:00
Alan Mishchenko 4560597b31 Utility to duplicate inputs. 2025-05-07 16:53:51 -07:00
Alan Mishchenko 49d9252f90 Updating the way min col mult is reported in lutcasdec. 2025-05-05 09:03:41 -07:00
Alan Mishchenko 5e54ef3aff Adding printout of flops. 2025-05-03 18:15:11 -07:00
Alan Mishchenko f9e4d06806 Column multiplicity statistics 2025-05-02 08:18:12 -07:00
Alan Mishchenko 692b0c6908 Printout of column multiplicity statistics. 2025-05-02 08:13:20 -07:00
Alan Mishchenko 75adf123f6 Adding new feature to &nf. 2025-05-01 22:41:49 -07:00
Alan Mishchenko 1c2b935a77 Adding new feature to "lutexact". 2025-05-01 21:08:46 -07:00
Alan Mishchenko 391a767c16 Updating LUT cascade mapping. 2025-05-01 11:51:48 -07:00
Alan Mishchenko 6a031620fe Supporting random seed in "lutexact". 2025-04-30 12:10:22 -07:00
Alan Mishchenko 59bb4de39f Misc changes. 2025-04-30 10:47:12 -07:00
alanminko 5305d93037
Merge pull request #405 from MyskYko/rrr 
update rrr
 2025-04-25 06:48:30 +07:00
jiunhaochen b1734ac297 rewire clean up 2025-04-19 00:43:48 +08:00
MyskYko b1b1023285 update rrr 2025-04-17 11:01:39 -07:00
jiunhaochen 0ab176d7c9 rewire fix genlib change 2025-04-17 16:14:49 +08:00
jiunhaochen 01bfd8fbad rewire fix not mapped 2025-04-17 12:39:24 +08:00
Alan Mishchenko 3a063c5901 Allowing more aggressive restructuring in "stochmap". 2025-04-16 16:58:04 -07:00
Alan Mishchenko 1626a337a1 Adding random seed to "lutcasdec". 2025-04-16 16:35:23 -07:00
jiunhaochen 6c37cc9ac3 rewire restructured even if the cost is not improved 2025-04-17 04:58:32 +08:00
Alan Mishchenko dcf9079507 Extending "stochmap" to work for AIGs. 2025-04-15 21:56:24 -07:00
Alan Mishchenko 47ac9f75ca New command "&andcare" to AND the miter with the careset. 2025-04-15 20:00:19 -07:00
Alan Mishchenko 1a1bdbe4c8 Another typo. 2025-04-10 07:03:19 -07:00
jiunhaochen 2179034f23 command rewire fix condition 2025-04-10 17:24:27 +08:00
jiunhaochen 43d12f6c31 command rewire add external careset 2025-04-10 16:57:13 +08:00
Chen jiun hao 08ccd6d0b9
Merge branch 'berkeley-abc:master' into master 2025-04-10 16:52:03 +08:00
Alan Mishchenko d271403514 Fixing a typo. 2025-04-09 21:23:44 -07:00
Alan Mishchenko c5fdfb3835 New command "runscript". 2025-04-09 18:16:24 -07:00
Alan Mishchenko 83150e6549 Enable overlapping partitions in "stochmap". 2025-04-09 08:46:38 -07:00
jiunhaochen 5700bff205 command rewire add external care 2025-04-09 19:27:32 +08:00
alanminko 68c576cc56
Merge pull request #400 from MyskYko/rrr 
update rrr
 2025-04-07 11:34:13 +07:00
Alan Mishchenko 3846c193f2 Enable overlapping partitions in "stochmap". 2025-04-06 17:01:40 -07:00
MyskYko 27f2429d76 update rrr 2025-04-06 15:46:02 -07:00
Alan Mishchenko c0be439b45 Performance improvements. 2025-04-06 00:14:02 -07:00
Alan Mishchenko 1b6b553922 New commands for truth table file processing. 2025-04-05 22:40:24 -07:00
Alan Mishchenko 3f479dc84f Bug fixes in LUT cascade. 2025-04-05 22:39:59 -07:00
Alan Mishchenko 5c604949af Enable dumping of the resulting permutation of internal nodes in "permute". 2025-04-05 16:37:49 -07:00
Alan Mishchenko 96c28881a8 Bug fix in LUT cascade. 2025-04-01 19:03:17 -07:00
alanminko e3b96c784f
Merge pull request #396 from fxreichl/master 
Extend logging for eSLIM
 2025-04-01 20:35:49 +07:00
alanminko a4d6775b7c
Merge pull request #384 from QiuYitai/master 
Fix the null reference vulnerability
 2025-04-01 20:35:09 +07:00
Franz Reichl 2c003f8865 Extend logging for eSLIM 2025-04-01 11:50:28 +02:00
Alan Mishchenko 29706ebede Bug with LUT cascade mapping. 2025-03-31 19:09:54 -07:00
Alan Mishchenko 80becaf2e2 Bug fix in LUT cascade decomposition. 2025-03-31 18:33:38 -07:00
Alan Mishchenko 9cdbb79338 Bug fix in handling concurrency in "stochmap". 2025-03-31 15:39:05 -07:00
Alan Mishchenko dc72d1e120 New command &store. 2025-03-31 15:24:15 -07:00
Alan Mishchenko 4656ae10e0 Updates to the GPC-based mapping. 2025-03-30 19:55:07 -07:00
Alan Mishchenko 6d6a5accb4 Experiments with LUT cascade mapping. 2025-03-30 18:20:55 -07:00
Alan Mishchenko 4ac014db41 Experiments with adder mapping. 2025-03-30 09:15:54 -07:00
Alan Mishchenko db2b52ca03 Bug fix. 2025-03-29 16:54:10 -07:00
Alan Mishchenko 2b5f102bdb Updating input file format in command "permute". 2025-03-29 15:48:07 -07:00
Alan Mishchenko bb11cc4c46 Experiments with adder-tree mapping. 2025-03-29 15:37:22 -07:00
Alan Mishchenko 2442720528 Adding counter generation to "symfun". 2025-03-29 11:11:13 -07:00
Alan Mishchenko 938ae9428b Extending interface of "permute". 2025-03-28 18:35:30 -07:00
Alan Mishchenko f5ac2d4bd3 Updates to LUT cascade decomposition. 2025-03-19 12:20:25 -07:00
Alan Mishchenko e320888191 Adding structural guidance. 2025-03-19 12:14:28 -07:00
Franz Reichl 8ffca32372 Add command &eslim 2025-03-19 11:29:14 +01:00
Alan Mishchenko e7dd9151b1 Adding structural guidance. 2025-03-18 17:51:40 -07:00
Alan Mishchenko 2078b3945b Adding support for the random seed to the recent experiments. 2025-03-18 07:55:28 -07:00
Alan Mishchenko 30c952ed22 Remove structural choices after mapping. 2025-03-17 17:17:48 -07:00
Alan Mishchenko 59a7cc5c9c Removing intermediate files in exact synthesis. 2025-03-17 17:12:01 -07:00
Alan Mishchenko e20cbd6120 Updating command "cone" to extract a comma-separated list of outputs. 2025-03-17 16:10:22 -07:00
jiunhaochen e937e82cc6 rewire with &nf, &simap 2025-03-17 10:26:32 +08:00
jiunhaochen c63cf09660 rewire support level constraint 2025-03-17 10:26:32 +08:00
jiunhaochen 67d8095515 fix read_mm 2025-03-17 10:26:32 +08:00
jiunhaochen c3b76b1712 Patch rewire 2025-03-17 10:26:32 +08:00
Alan Mishchenko 0ebc9dbbae Experiments with exact synthesis. 2025-03-16 09:39:04 -07:00
Alan Mishchenko 839f3e18dd Experiments with mapping. 2025-03-14 20:24:08 -07:00
Alan Mishchenko aaba1b9a5f Experiments with mapping. 2025-03-13 20:59:17 -07:00
Alan Mishchenko d55735df2b Updates to the result reporting. 2025-03-13 11:57:53 -07:00
Alan Mishchenko 27fdbe0162 Updates to the mapping experiment. 2025-03-13 11:57:34 -07:00
Alan Mishchenko 2361a02c99 Fixing compilation problemj in some builds. 2025-03-12 20:53:02 -07:00
Alan Mishchenko feefa0f513 Supporting out of order signal names in AIGER reader. 2025-03-12 20:12:28 -07:00
Alan Mishchenko 5ef9c3c50b Experiment with mapping. 2025-03-12 20:11:33 -07:00
qiuweibin 02f3727d87 Fix the null reference vulnerability 2025-03-11 03:38:50 +00:00
Alan Mishchenko b09305204d Minor bug fixes. 2025-03-10 20:13:53 -07:00
Alan Mishchenko 2c45f9dce2 Adding conflict limit and timeout to &simap. 2025-03-10 17:54:30 -07:00
Alan Mishchenko 40ea8a7598 Enabling support for input/output names in mini mapping format. 2025-03-10 17:29:01 -07:00
Alan Mishchenko 9390a74c54 Changes to the file interface in "stochmap". 2025-03-10 14:40:28 -07:00
Alan Mishchenko bd9fb45808 Adding direct file interface for mapped networks. 2025-03-10 14:38:51 -07:00
Alan Mishchenko ecc27e80dc Adding support for the genlib library file name. 2025-03-10 14:37:29 -07:00
Alan Mishchenko 9665696a94 Code refactoring to dump CNF files. 2025-03-10 13:17:04 -07:00
Alan Mishchenko 67fdd8d244 Random crash fix. 2025-03-10 13:06:14 -07:00
Alan Mishchenko 0e117760e2 Performance improvement. 2025-03-10 00:37:51 -07:00
Alan Mishchenko c62bf1b89c Updating cut level. 2025-03-10 00:08:35 -07:00
Alan Mishchenko 3dc77bbe1c Bug fix in "stochmap". 2025-03-09 23:52:03 -07:00
Alan Mishchenko 38ba7d78aa Experiment with mapping. 2025-03-09 15:42:25 -07:00
alanminko f058e15f87
Merge pull request #382 from MyskYko/cadical 
CaDiCaL
 2025-03-07 23:17:57 +07:00
alanminko 383c16b690
Merge pull request #380 from MyskYko/kissat 
support debug mode
 2025-03-07 23:17:44 +07:00
qiuweibin db4a3005e3 Fix the null reference vulnerability 2025-03-07 10:48:02 +00:00
MyskYko 14b451b52f patch 2025-03-07 00:25:11 -08:00
MyskYko f544165a88 cadical original 2025-03-05 21:25:31 -08:00
MyskYko 8fb9fc5d0f add version 2025-03-05 21:19:39 -08:00
MyskYko f168f2f286 support debug mode 2025-03-05 20:25:40 -08:00
alanminko fbd19056e7
Merge pull request #379 from MyskYko/rrr 
update rrr
 2025-03-06 09:00:36 +07:00
Alan Mishchenko 7364002c39 Updates to rewiring. 2025-03-05 17:47:12 -08:00
Alan Mishchenko f3ae349cf2 Bug fixing in "stockmap". 2025-03-05 17:46:39 -08:00
MyskYko 8005405ed7 update rrr 2025-03-05 14:44:12 -08:00
Alan Mishchenko 2126cb3ca1 Fixing a typo in Kissat integration. 2025-03-05 10:30:16 -08:00
Alan Mishchenko b9b8ff47e3 Adding programmable call to Kissat in command &kissat. 2025-03-05 08:26:28 -08:00
MyskYko 3f6171127a add license 2025-03-05 04:21:18 -08:00
MyskYko 664d285fcb patch 2025-03-05 04:10:49 -08:00
MyskYko a7476c65d8 kissat original 2025-03-04 17:39:59 -08:00
Alan Mishchenko c25bf73466 Adding new external APIs. 2025-03-03 19:40:11 -08:00
alanminko 1b96863505
Merge pull request #375 from chenjunhao0315/master 
Command rewire
 2025-03-02 01:27:30 +07:00
alanminko adbeffc145
Merge pull request #374 from wjrforcyber/fix_lib_pointer 
Fix(Pointer): Fix the wrong value passed to size
 2025-03-02 01:27:01 +07:00
alanminko d0d1721bbe
Merge pull request #373 from wjrforcyber/fix_HMetis 
Fix(write_hmetis): Remain the obj number when omitting POs explictly
 2025-03-02 01:26:44 +07:00
jiunhaochen 083d3884dd Command rewire 2025-03-01 23:44:55 +08:00
wjrforcyber 5632bb8892
Fix(Pointer): Fix the wrong value passed to size 
Signed-off-by: wjrforcyber <wjrforcyber@163.com>
 2025-03-01 21:03:51 +08:00