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Patch rewire

This commit is contained in:
jiunhaochen 2025-03-10 15:36:00 +08:00
parent 0ebc9dbbae
commit c3b76b1712
4 changed files with 49 additions and 26 deletions
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41
src/base/abci/abc.c
View File

@ -20554,17 +20554,16 @@ int Abc_CommandRewire( Abc_Frame_t * pAbc, int argc, char ** argv )
usage:
Abc_Print( -2, "usage: rewire [-IEGDFSTV <num>]\n" );
Abc_Print( -2, "\t performs AIG re-wiring\n" );
Abc_Print( -2, "\t-I <num> : the number of iterations [default = %d]\n", nIters );
Abc_Print( -2, "\t-E <num> : the number of fanins to add to all nodes [default = %d]\n", nExpands );
Abc_Print( -2, "\t-G <num> : the number of fanins to add to one node [default = %d]\n", nGrowth );
Abc_Print( -2, "\t-D <num> : the number of shared divisors to extract [default = %d]\n", nDivs );
Abc_Print( -2, "\t-F <num> : the limit on the fanin count at a node [default = %d]\n", nFaninMax);
Abc_Print( -2, "\t-L <num> : localization distances [default = %d]\n", nDist);
Abc_Print( -2, "\t-M <num> : optimization target [default = %s]\n", nMode ? "transistor" : "node" );
Abc_Print( -2, "\t-S <num> : the random seed [default = %d]\n", nSeed );
Abc_Print( -2, "\t-T <num> : the timeout in seconds [default = unused]\n" );
Abc_Print( -2, "\t-V <num> : the verbosity level [default = %d]\n", nVerbose );
Abc_Print( -2, "\t-I <num> : the number of iterations [default = %d]\n", nIters );
Abc_Print( -2, "\t-E <num> : the number of fanins to add to all nodes [default = %d]\n", nExpands );
Abc_Print( -2, "\t-G <num> : the number of fanins to add to one node [default = %d]\n", nGrowth );
Abc_Print( -2, "\t-D <num> : the number of shared divisors to extract (-1 = unlimited) [default = %d]\n", nDivs );
Abc_Print( -2, "\t-F <num> : the limit on the fanin count at a node [default = %d]\n", nFaninMax);
Abc_Print( -2, "\t-L <num> : localization distances (0 = unlimited) [default = %d]\n", nDist);
Abc_Print( -2, "\t-M <num> : optimization target [default = %s]\n", nMode ? "transistor" : "node" );
Abc_Print( -2, "\t-S <num> : the random seed [default = %d]\n", nSeed );
Abc_Print( -2, "\t-T <num> : the timeout in seconds (0 = unlimited) [default = %d]\n", nTimeOut );
Abc_Print( -2, "\t-V <num> : the verbosity level [default = %d]\n", nVerbose );
Abc_Print( -2, "\t-h : prints the command usage\n" );
Abc_Print( -2, "\n\tThis command was contributed by Jiun-Hao Chen from National Taiwan University.\n" );
return 1;
@ -45968,16 +45967,16 @@ int Abc_CommandAbc9Rewire( Abc_Frame_t * pAbc, int argc, char ** argv )
usage:
Abc_Print( -2, "usage: &rewire [-IEGDFSTV <num>]\n" );
Abc_Print( -2, "\t performs AIG re-wiring\n" );
Abc_Print( -2, "\t-I <num> : the number of iterations [default = %d]\n", nIters );
Abc_Print( -2, "\t-E <num> : the number of fanins to add to all nodes [default = %d]\n", nExpands );
Abc_Print( -2, "\t-G <num> : the number of fanins to add to one node [default = %d]\n", nGrowth );
Abc_Print( -2, "\t-D <num> : the number of shared divisors to extract [default = %d]\n", nDivs );
Abc_Print( -2, "\t-F <num> : the limit on the fanin count at a node [default = %d]\n", nFaninMax);
Abc_Print( -2, "\t-L <num> : localization distances [default = %d]\n", nDist);
Abc_Print( -2, "\t-M <num> : optimization target [default = %s]\n", nMode ? "transistor" : "node" );
Abc_Print( -2, "\t-S <num> : the random seed [default = %d]\n", nSeed );
Abc_Print( -2, "\t-T <num> : the timeout in seconds [default = unused]\n" );
Abc_Print( -2, "\t-V <num> : the verbosity level [default = %d]\n", nVerbose );
Abc_Print( -2, "\t-I <num> : the number of iterations [default = %d]\n", nIters );
Abc_Print( -2, "\t-E <num> : the number of fanins to add to all nodes [default = %d]\n", nExpands );
Abc_Print( -2, "\t-G <num> : the number of fanins to add to one node [default = %d]\n", nGrowth );
Abc_Print( -2, "\t-D <num> : the number of shared divisors to extract (-1 = unlimited) [default = %d]\n", nDivs );
Abc_Print( -2, "\t-F <num> : the limit on the fanin count at a node [default = %d]\n", nFaninMax);
Abc_Print( -2, "\t-L <num> : localization distances (0 = unlimited) [default = %d]\n", nDist);
Abc_Print( -2, "\t-M <num> : optimization target [default = %s]\n", nMode ? "transistor" : "node" );
Abc_Print( -2, "\t-S <num> : the random seed [default = %d]\n", nSeed );
Abc_Print( -2, "\t-T <num> : the timeout in seconds (0 = unlimited) [default = %d]\n", nTimeOut );
Abc_Print( -2, "\t-V <num> : the verbosity level [default = %d]\n", nVerbose );
Abc_Print( -2, "\t-h : prints the command usage\n" );
Abc_Print( -2, "\n\tThis command was contributed by Jiun-Hao Chen from National Taiwan University.\n" );
return 1;

1
src/opt/rar/rewire_map.c
View File

@ -33,6 +33,7 @@ extern Mini_Aig_t * Abc_MiniAigFromNtk ( Abc_Ntk_t *pNtk );
Abc_Ntk_t *Gia_ManRewirePut(Gia_Man_t *pGia) {
Aig_Man_t *pMan = Gia_ManToAig(pGia, 0);
Abc_Ntk_t *pNtk = Abc_NtkFromAigPhase(pMan);
Abc_NtkSetName(pNtk, Abc_UtilStrsav(Gia_ManName(pGia)));
Aig_ManStop(pMan);
return pNtk;
}

30
src/opt/rar/rewire_miaig.cpp
View File

@ -31,6 +31,7 @@ Gia_Man_t *Gia_ManRewireInt(Gia_Man_t *pGia, int nIters, int nExpands, int nGrow
Rewire::Miaig pNtkMiaig(pGia);
Rewire::Miaig pNew = pNtkMiaig.rewire(nIters, nExpands, nGrowth, nDivs, nFaninMax, nTimeOut, nMode, nDist, fVerbose);
pNew.setName(Gia_ManName(pGia));
return pNew.toGia();
}
@ -38,10 +39,15 @@ Gia_Man_t *Gia_ManRewireInt(Gia_Man_t *pGia, int nIters, int nExpands, int nGrow
Abc_Ntk_t *Abc_ManRewireInt(Abc_Ntk_t *pNtk, int nIters, int nExpands, int nGrowth, int nDivs, int nFaninMax, int nTimeOut, int nMode, int nDist, int nSeed, int fVerbose) {
Random_Num(nSeed);
int fMapped = nMode == 1;
Rewire::Miaig pNtkMiaig(pNtk);
Rewire::Miaig pNew = pNtkMiaig.rewire(nIters, nExpands, nGrowth, nDivs, nFaninMax, nTimeOut, nMode, nDist, fVerbose);
Rewire::Miaig pNew = pNtkMiaig.rewire(nIters, nExpands, nGrowth, nDivs, nFaninMax, nTimeOut, fMapped, nDist, fVerbose);
pNew.setName(Abc_NtkName(pNtk));
if (nMode == 2) {
pNew.countTransistors(1);
}
return pNew.toNtk(nMode);
return pNew.toNtk(nMode >= 1);
}
Mini_Aig_t *MiniAig_ManRewireInt(Mini_Aig_t *pAig, int nIters, int nExpands, int nGrowth, int nDivs, int nFaninMax, int nTimeOut, int nMode, int nDist, int nSeed, int fVerbose) {
@ -84,6 +90,15 @@ void Miaig::create(int nIns, int nOuts, int nObjsAlloc) {
}
}
void Miaig::setName(char *pName) {
if (_data) {
if (_data->pName) {
free(_data->pName);
}
_data->pName = strdup(pName);
}
}
void Miaig::print(void) {
int i, k, iLit;
printf("\nAIG printout:\n");
@ -149,6 +164,7 @@ int Miaig::fromMiniAig(Mini_Aig_t *pMiniAig) {
Gia_Man_t *Miaig::toGia(void) {
int i, k, iLit, And2 = countAnd2();
Gia_Man_t *pGia = Gia_ManStart(1 + nIns() + And2 + nOuts()), *pTemp;
pGia->pName = Abc_UtilStrsav( _data->pName );
Gia_ManHashAlloc(pGia);
memset(_data->pCopy, 0, sizeof(int) * nObjs());
Miaig_ForEachInput(i)
@ -197,11 +213,15 @@ Mini_Aig_t *Miaig::toMiniAig(void) {
}
Abc_Ntk_t *Miaig::toNtk(int fMapped) {
Abc_Ntk_t *pNtk;
if (_data->pNtkMapped && fMapped) {
return Abc_ManRewireNtkFromMiniMapping(Vi_Array(_data->pNtkMapped));
pNtk = Abc_ManRewireNtkFromMiniMapping(Vi_Array(_data->pNtkMapped));
ABC_FREE(pNtk->pName);
Abc_NtkSetName(pNtk, Abc_UtilStrsav(_data->pName));
return pNtk;
}
Gia_Man_t *pGia = toGia();
Abc_Ntk_t *pNtk = Gia_ManRewirePut(pGia);
pNtk = Gia_ManRewirePut(pGia);
Gia_ManStop(pGia);
return pNtk;
}
@ -1125,7 +1145,7 @@ Miaig Miaig::rewire(int nIters, int nExpands, int nGrowth, int nDivs, int nFanin
float PrevBest = ((&pBest)->*Miaig_ObjectiveFunction)(1);
int iterNotImproveAfterRestart = 0;
if (nVerbose) printf("Initial target : %5g (AND2 = %5g Level = %3d)\n", PrevBest, this->countAnd2(1), this->countLevel());
for (int i = 0; i < nIters; i++) {
for (int i = 0; nIters ? i < nIters : 1; i++) {
if (nVerbose) printf("\rIteration %7d : %5g -> ", i + 1, ((&pRoot)->*Miaig_ObjectiveFunction)(0));
if (nTimeOut && nTimeOut < 1.0 * (Time_Clock() - clkStart) / CLOCKS_PER_SEC) break;
pNew = pRoot.dupMulti(nFaninMax, nGrowth);

3
src/opt/rar/rewire_miaig.h
View File

@ -141,6 +141,7 @@ static inline int Rw_Lit2LitL(int *pMapV2L, int Lit) {
}
struct Miaig_Data {
char *pName; // network name
int refcount; // Reference counter
int nIns; // primary inputs
int nOuts; // primary outputs
@ -217,6 +218,7 @@ public:
void refObj(int iObj);
void derefObj(int iObj);
void derefObj_rec(int iObj, int iLitSkip);
void setName(char *pName);
private:
int initializeLevels_rec(int iObj);
@ -355,6 +357,7 @@ inline void Miaig::addref(void) {
inline void Miaig::release(void) {
if (_refcount && RW_XADD(_refcount, -1) == 1) {
if (_data) {
if (_data->pName) free(_data->pName);
for (int i = 0; i < _data->nObjsAlloc; ++i)
if (_data->pvFans[i].ptr)
free(_data->pvFans[i].ptr);