mirror of https://github.com/YosysHQ/abc.git
rewire with &nf, &simap
This commit is contained in:
parent
c63cf09660
commit
e937e82cc6
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@ -1243,7 +1243,7 @@ Vec_Int_t * Gia_RunKadical( char * pFileNameIn, char * pFileNameOut, int nBTLimi
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#ifdef _WIN32
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char * pKadical = "kadical.exe";
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#else
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char * pKadical = "kadical";
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char * pKadical = "./kadical";
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#endif
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char Command[1000], * pCommand = (char *)&Command;
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if ( nBTLimit ) {
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@ -1582,7 +1582,7 @@ int Gia_ManSimpleMapping( Gia_Man_t * p, int nBound, int nBTLimit, int nTimeout,
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if ( fVerbose )
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printf( "SAT variables = %d. SAT clauses = %d. Cardinality bound = %d. Conflict limit = %d. Timeout = %d.\n",
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nVars, Vec_StrCountEntry(vStr, '\n'), nBound, nBTLimit, nTimeout );
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Vec_Int_t * vRes = Gia_RunKadical( pFileNameI, pFileNameO, nBTLimit, nTimeout, 1, &Status );
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Vec_Int_t * vRes = Gia_RunKadical( pFileNameI, pFileNameO, nBTLimit, nTimeout, fVerbose, &Status );
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unlink( pFileNameI );
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//unlink( pFileNameO );
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if ( fKeepFile ) Gia_ManDumpCnf2( vStr, nVars, argc, argv, Abc_Clock() - clkStart, Status );
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@ -1595,7 +1595,7 @@ int Gia_ManSimpleMapping( Gia_Man_t * p, int nBound, int nBTLimit, int nTimeout,
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if ( fVerbose ) Gia_ManSimplePrintMapping( vRes, Gia_ManCiNum(p) );
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p->vCellMapping = Gia_ManDeriveSimpleMapping( p, vRes );
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Vec_IntFree( vRes );
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Abc_PrintTime( 0, "Total time", Abc_Clock() - clkStart );
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if ( fVerbose ) Abc_PrintTime( 0, "Total time", Abc_Clock() - clkStart );
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return 1;
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}
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@ -20427,16 +20427,15 @@ usage:
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***********************************************************************/
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int Abc_CommandRewire( Abc_Frame_t * pAbc, int argc, char ** argv )
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{
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extern Abc_Ntk_t *Abc_ManRewire(Abc_Ntk_t *pNtk, int nIters, float levelGrowRatio, int nExpands, int nGrowth, int nDivs, int nFaninMax, int nTimeOut, int nMode, int nDist, int nSeed, int fVerbose);
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extern Abc_Ntk_t *Abc_ManRewire(Abc_Ntk_t *pNtk, int nIters, float levelGrowRatio, int nExpands, int nGrowth, int nDivs, int nFaninMax, int nTimeOut, int nMode, int nMappedMode, int nDist, int nSeed, int fVerbose);
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Abc_Ntk_t *pNtk, *pTemp;
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int c, nIters = 100000, nExpands = 128, nGrowth = 4, nDivs = -1, nFaninMax = 8, nSeed = 1, nTimeOut = 0, nVerbose = 1, nMode = 0, nDist = 0;
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int c, nIters = 100000, nExpands = 128, nGrowth = 4, nDivs = -1, nFaninMax = 8, nSeed = 1, nTimeOut = 0, nVerbose = 1, nMode = 0, nMappedMode = 0, nDist = 0;
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float nLevelGrowRatio = 0;
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Extra_UtilGetoptReset();
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// Cmd_CommandExecute
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pNtk = Abc_FrameReadNtk(pAbc);
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while ( ( c = Extra_UtilGetopt( argc, argv, "IEGDFSTMLRVh" ) ) != EOF ) {
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while ( ( c = Extra_UtilGetopt( argc, argv, "IEGDFSTMALRVh" ) ) != EOF ) {
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switch ( c ) {
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case 'I':
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if ( globalUtilOptind >= argc )
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@ -20510,6 +20509,15 @@ int Abc_CommandRewire( Abc_Frame_t * pAbc, int argc, char ** argv )
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nMode = atoi(argv[globalUtilOptind]);
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globalUtilOptind++;
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break;
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case 'A':
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if ( globalUtilOptind >= argc )
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{
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Abc_Print( -1, "Command line switch \"-M\" should be followed by a positive integer.\n" );
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goto usage;
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}
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nMappedMode = atoi(argv[globalUtilOptind]);
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globalUtilOptind++;
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break;
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case 'L':
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if ( globalUtilOptind >= argc )
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{
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@ -20552,28 +20560,29 @@ int Abc_CommandRewire( Abc_Frame_t * pAbc, int argc, char ** argv )
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Abc_Print( -1, "Empty network.\n" );
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return 1;
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}
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if ( nMode == 1 && Abc_FrameReadLibGen2() == NULL )
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if ( nMode >= 1 && Abc_FrameReadLibGen2() == NULL )
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{
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Abc_Print( -1, "Library is not available.\n" );
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return 1;
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}
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pTemp = Abc_ManRewire( pNtk, nIters, nLevelGrowRatio, nExpands, nGrowth, nDivs, nFaninMax, nTimeOut, nMode, nDist, nSeed, nVerbose );
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pTemp = Abc_ManRewire( pNtk, nIters, nLevelGrowRatio, nExpands, nGrowth, nDivs, nFaninMax, nTimeOut, nMode, nMappedMode, nDist, nSeed, nVerbose );
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Abc_FrameReplaceCurrentNetwork( pAbc, pTemp );
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return 0;
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usage:
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Abc_Print( -2, "usage: rewire [-IEGDFSTV <num>]\n" );
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Abc_Print( -2, "usage: rewire [-IEGDFLRMASTV <num>]\n" );
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Abc_Print( -2, "\t-I <num> : the number of iterations [default = %d]\n", nIters );
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Abc_Print( -2, "\t-E <num> : the number of fanins to add to all nodes [default = %d]\n", nExpands );
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Abc_Print( -2, "\t-G <num> : the number of fanins to add to one node [default = %d]\n", nGrowth );
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Abc_Print( -2, "\t-D <num> : the number of shared divisors to extract (-1 = unlimited) [default = %d]\n", nDivs );
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Abc_Print( -2, "\t-D <num> : the number of shared divisors to extract (-1: unlimited) [default = %d]\n", nDivs );
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Abc_Print( -2, "\t-F <num> : the limit on the fanin count at a node [default = %d]\n", nFaninMax);
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Abc_Print( -2, "\t-L <num> : localization distances (0 = unlimited) [default = %d]\n", nDist);
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Abc_Print( -2, "\t-R <num> : level constraint (0 = unlimited, 1 = preserve level) [default = %g]\n", nLevelGrowRatio);
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Abc_Print( -2, "\t-M <num> : optimization target [default = %s]\n", nMode ? "transistor" : "node" );
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Abc_Print( -2, "\t-S <num> : the random seed [default = %d]\n", nSeed );
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Abc_Print( -2, "\t-T <num> : the timeout in seconds (0 = unlimited) [default = %d]\n", nTimeOut );
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Abc_Print( -2, "\t-L <num> : localization distances (0: unlimited) [default = %d]\n", nDist);
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Abc_Print( -2, "\t-R <num> : level constraint (0: unlimited, 1: preserve level) [default = %g]\n", nLevelGrowRatio);
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Abc_Print( -2, "\t-M <num> : optimization target [default = %s]\n", nMode ? "area" : "AIG node" );
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Abc_Print( -2, "\t-A <num> : mapper (0: amap, 1: &nf, 2: &simap) (experimental) [default = %d]\n", nMappedMode );
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Abc_Print( -2, "\t-S <num> : the random seed (0: random, >= 1: user defined) [default = %d]\n", nSeed );
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Abc_Print( -2, "\t-T <num> : the timeout in seconds (0: unlimited) [default = %d]\n", nTimeOut );
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Abc_Print( -2, "\t-V <num> : the verbosity level [default = %d]\n", nVerbose );
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Abc_Print( -2, "\t-h : prints the command usage\n" );
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Abc_Print( -2, "\n\tThis command was contributed by Jiun-Hao Chen from National Taiwan University.\n" );
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@ -45851,13 +45860,13 @@ usage:
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***********************************************************************/
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int Abc_CommandAbc9Rewire( Abc_Frame_t * pAbc, int argc, char ** argv )
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{
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extern Gia_Man_t *Gia_ManRewire(Gia_Man_t *pGia, int nIters, float levelGrowRatio, int nExpands, int nGrowth, int nDivs, int nFaninMax, int nTimeOut, int nMode, int nDist, int nSeed, int fVerbose);
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extern Gia_Man_t *Gia_ManRewire(Gia_Man_t *pGia, int nIters, float levelGrowRatio, int nExpands, int nGrowth, int nDivs, int nFaninMax, int nTimeOut, int nMode, int nMappedMode, int nDist, int nSeed, int fVerbose);
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Gia_Man_t *pTemp;
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int c, nIters = 100000, nExpands = 128, nGrowth = 4, nDivs = -1, nFaninMax = 8, nSeed = 1, nTimeOut = 0, nVerbose = 1, nMode = 0, nDist = 0;
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int c, nIters = 100000, nExpands = 128, nGrowth = 4, nDivs = -1, nFaninMax = 8, nSeed = 1, nTimeOut = 0, nVerbose = 1, nMode = 0, nMappedMode = 0, nDist = 0;
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float nLevelGrowRatio = 0;
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Extra_UtilGetoptReset();
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// Cmd_CommandExecute
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while ( ( c = Extra_UtilGetopt( argc, argv, "IEGDFSTMLRVh" ) ) != EOF ) {
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while ( ( c = Extra_UtilGetopt( argc, argv, "IEGDFSTMALRVh" ) ) != EOF ) {
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switch ( c ) {
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case 'I':
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if ( globalUtilOptind >= argc )
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@ -45931,6 +45940,15 @@ int Abc_CommandAbc9Rewire( Abc_Frame_t * pAbc, int argc, char ** argv )
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nMode = atoi(argv[globalUtilOptind]);
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globalUtilOptind++;
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break;
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case 'A':
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if ( globalUtilOptind >= argc )
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{
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Abc_Print( -1, "Command line switch \"-M\" should be followed by a positive integer.\n" );
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goto usage;
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}
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nMappedMode = atoi(argv[globalUtilOptind]);
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globalUtilOptind++;
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break;
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case 'L':
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if ( globalUtilOptind >= argc )
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{
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@ -45973,31 +45991,32 @@ int Abc_CommandAbc9Rewire( Abc_Frame_t * pAbc, int argc, char ** argv )
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Abc_Print( -1, "Empty GIA network.\n" );
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return 1;
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}
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if ( nMode == 1 && Abc_FrameReadLibGen2() == NULL )
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if ( nMode >= 1 && Abc_FrameReadLibGen2() == NULL )
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{
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Abc_Print( -1, "Library is not available.\n" );
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return 1;
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}
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pTemp = Gia_ManRewire( pAbc->pGia, nIters, nLevelGrowRatio, nExpands, nGrowth, nDivs, nFaninMax, nTimeOut, nMode, nDist, nSeed, nVerbose );
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pTemp = Gia_ManRewire( pAbc->pGia, nIters, nLevelGrowRatio, nExpands, nGrowth, nDivs, nFaninMax, nTimeOut, nMode, nMappedMode, nDist, nSeed, nVerbose );
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if ( pTemp->pName == NULL )
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pTemp->pName = Abc_UtilStrsav(Extra_FileNameWithoutPath(pAbc->pGia->pName));
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Abc_FrameUpdateGia( pAbc, pTemp );
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return 0;
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usage:
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Abc_Print( -2, "usage: &rewire [-IEGDFSTV <num>]\n" );
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Abc_Print( -2, "usage: &rewire [-IEGDFLRMASTV <num>]\n" );
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Abc_Print( -2, "\t performs AIG re-wiring\n" );
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Abc_Print( -2, "\t-I <num> : the number of iterations [default = %d]\n", nIters );
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Abc_Print( -2, "\t-E <num> : the number of fanins to add to all nodes [default = %d]\n", nExpands );
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Abc_Print( -2, "\t-G <num> : the number of fanins to add to one node [default = %d]\n", nGrowth );
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Abc_Print( -2, "\t-D <num> : the number of shared divisors to extract (-1 = unlimited) [default = %d]\n", nDivs );
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Abc_Print( -2, "\t-D <num> : the number of shared divisors to extract (-1: unlimited) [default = %d]\n", nDivs );
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Abc_Print( -2, "\t-F <num> : the limit on the fanin count at a node [default = %d]\n", nFaninMax);
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Abc_Print( -2, "\t-L <num> : localization distances (0 = unlimited) [default = %d]\n", nDist);
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Abc_Print( -2, "\t-R <num> : level constraint (0 = unlimited, 1 = preserve level) [default = %g]\n", nLevelGrowRatio);
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Abc_Print( -2, "\t-M <num> : optimization target [default = %s]\n", nMode ? "transistor" : "node" );
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Abc_Print( -2, "\t-S <num> : the random seed [default = %d]\n", nSeed );
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Abc_Print( -2, "\t-T <num> : the timeout in seconds (0 = unlimited) [default = %d]\n", nTimeOut );
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Abc_Print( -2, "\t-L <num> : localization distances (0: unlimited) [default = %d]\n", nDist);
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Abc_Print( -2, "\t-R <num> : level constraint (0: unlimited, 1: preserve level) [default = %g]\n", nLevelGrowRatio);
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Abc_Print( -2, "\t-M <num> : optimization target [default = %s]\n", nMode ? "area" : "AIG node" );
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Abc_Print( -2, "\t-A <num> : mapper (0: amap, 1: &nf, 2: &simap) (experimental) [default = %d]\n", nMappedMode );
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Abc_Print( -2, "\t-S <num> : the random seed (0: random, >= 1: user defined) [default = %d]\n", nSeed );
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Abc_Print( -2, "\t-T <num> : the timeout in seconds (0: unlimited) [default = %d]\n", nTimeOut );
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Abc_Print( -2, "\t-V <num> : the verbosity level [default = %d]\n", nVerbose );
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Abc_Print( -2, "\t-h : prints the command usage\n" );
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Abc_Print( -2, "\n\tThis command was contributed by Jiun-Hao Chen from National Taiwan University.\n" );
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@ -1313,7 +1313,6 @@ Abc_Ntk_t * Abc_NtkStochProcessOne( Abc_Ntk_t * p, char * pScript0, int Rand, in
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}
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ABC_FREE( pScript );
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pNew = Abc_NtkReadFromFile( FileName );
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unlink( FileName );
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if ( pNew && Abc_NtkGetMappedArea(pNew) < Abc_NtkGetMappedArea(p) ) {
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pNew = Abc_NtkDupDfs( pTemp = pNew );
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@ -1613,6 +1612,7 @@ void Abc_NtkPermuteLevel( Abc_Ntk_t * pNtk, int Level )
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Abc_ObjForEachFanout( pObj, pNext, k )
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if ( Abc_ObjIsNode(pNext) )
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LevelMax = Abc_MinInt( LevelMax, Abc_ObjLevel(pNext) );
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if ( LevelMin == LevelMax ) continue;
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assert( LevelMin < LevelMax );
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// randomly set level between LevelMin and LevelMax-1
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pObj->Level = LevelMin + (Abc_Random(0) % (LevelMax - LevelMin));
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@ -1802,17 +1802,19 @@ Vec_Ptr_t * Abc_NtkDupWindows( Abc_Ntk_t * pNtk, Vec_Ptr_t * vvIns, Vec_Ptr_t *
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}
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Vec_Ptr_t * Abc_NtkExtractPartitions( Abc_Ntk_t * pNtk, int Iter, int nSuppMax, Vec_Ptr_t ** pvIns, Vec_Ptr_t ** pvOuts, Vec_Ptr_t ** pvNodes )
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{
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if ( Abc_NtkCiNum(pNtk) <= nSuppMax ) {
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Vec_Ptr_t * vWins = Vec_PtrAlloc( 1 );
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Vec_PtrPush( vWins, Abc_NtkDupDfs(pNtk) );
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*pvIns = *pvOuts = *pvNodes = NULL;
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return vWins;
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}
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int iUseRevL = Iter % 3 == 0 ? 0 : Abc_Random(0) & 1;
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// if ( Abc_NtkCiNum(pNtk) <= nSuppMax ) {
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// Vec_Ptr_t * vWins = Vec_PtrAlloc( 1 );
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// Vec_PtrPush( vWins, Abc_NtkDupDfs(pNtk) );
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// *pvIns = *pvOuts = *pvNodes = NULL;
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// return vWins;
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// }
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// int iUseRevL = Iter % 3 == 0 ? 0 : Abc_Random(0) & 1;
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int iUseRevL = Abc_Random(0) & 1;
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int LevelMax = iUseRevL ? Abc_NtkLevelR(pNtk) : Abc_NtkLevel(pNtk);
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int LevelCut = Iter % 3 == 0 ? 0 : LevelMax > 8 ? 2 + (Abc_Random(0) % (LevelMax - 4)) : 0;
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//printf( "Using %s cut level %d (out of %d)\n", iUseRevL ? "reverse": "direct", LevelCut, LevelMax );
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Abc_NtkPermuteLevel( pNtk, LevelMax );
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// int LevelCut = Iter % 3 == 0 ? 0 : LevelMax > 8 ? 2 + (Abc_Random(0) % (LevelMax - 4)) : 0;
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int LevelCut = LevelMax > 8 ? (Abc_Random(0) % (LevelMax - 4)) : 0;
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// printf( "Using %s cut level %d (out of %d)\n", iUseRevL ? "reverse": "direct", LevelCut, LevelMax );
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// Abc_NtkPermuteLevel( pNtk, LevelMax );
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Vec_Wec_t * vStore = Vec_WecStart( LevelMax+1 );
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Vec_Wec_t * vSupps = Abc_NtkCollectObjectsWithSuppLimit( pNtk, LevelCut, nSuppMax );
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Vec_Ptr_t * vIns = Abc_NtkDeriveWinInsAll( vSupps, nSuppMax, pNtk );
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@ -29,6 +29,11 @@ extern Vec_Int_t * Abc_NtkWriteMiniMapping( Abc_Ntk_t * pNtk );
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extern void Abc_NtkPrintMiniMapping( int * pArray );
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extern Abc_Ntk_t * Abc_NtkFromMiniMapping( int *vMapping );
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extern Mini_Aig_t * Abc_MiniAigFromNtk ( Abc_Ntk_t *pNtk );
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extern void Nf_ManSetDefaultPars( Jf_Par_t * pPars );
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extern Gia_Man_t * Nf_ManPerformMapping( Gia_Man_t * pGia, Jf_Par_t * pPars );
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extern Abc_Ntk_t * Abc_NtkFromMappedGia( Gia_Man_t * p, int fFindEnables, int fUseBuffs );
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extern Abc_Ntk_t * Abc_NtkFromCellMappedGia( Gia_Man_t * p, int fUseBuffs );
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extern int Gia_ManSimpleMapping( Gia_Man_t * p, int nBound, int nBTLimit, int nTimeout, int fVerbose, int fKeepFile, int argc, char ** argv );
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Abc_Ntk_t *Gia_ManRewirePut(Gia_Man_t *pGia) {
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Aig_Man_t *pMan = Gia_ManToAig(pGia, 0);
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@ -38,16 +43,35 @@ Abc_Ntk_t *Gia_ManRewirePut(Gia_Man_t *pGia) {
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return pNtk;
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}
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Abc_Ntk_t *Abc_ManRewireMap(Abc_Ntk_t *pNtk) {
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Abc_Ntk_t *Abc_ManRewireMapAmap(Abc_Ntk_t *pNtk) {
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Amap_Par_t Pars, *pPars = &Pars;
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Amap_ManSetDefaultParams(pPars);
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Abc_Ntk_t *pNtkMapped = Abc_NtkDarAmap(pNtk, pPars);
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if (pNtkMapped == NULL) {
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Abc_NtkDelete(pNtk);
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Abc_Print(-1, "Mapping has failed.\n");
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return NULL;
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}
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return pNtkMapped;
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}
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Abc_Ntk_t *Gia_ManRewireMapNf(Gia_Man_t *pGia) {
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Jf_Par_t Pars, * pPars = &Pars;
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Nf_ManSetDefaultPars( pPars );
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Gia_Man_t *pGiaNew = Nf_ManPerformMapping(pGia, pPars);
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if (pGiaNew == NULL) {
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Abc_Print(-1, "Mapping has failed.\n");
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return NULL;
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}
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Abc_Ntk_t *pNtkMapped = Abc_NtkFromCellMappedGia(pGiaNew, 0);
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return pNtkMapped;
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}
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Abc_Ntk_t *Gia_ManRewireMapSimap(Gia_Man_t *pGia, int nBound, int nBTLimit, int nTimeout) {
|
||||
if (!Gia_ManSimpleMapping(pGia, nBound, nBTLimit, nTimeout, 0, 0, 0, NULL)) {
|
||||
// Abc_Print(-1, "Mapping has failed.\n");
|
||||
return NULL;
|
||||
}
|
||||
Abc_Ntk_t *pNtkMapped = Abc_NtkFromCellMappedGia(pGia, 0);
|
||||
return pNtkMapped;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -30,7 +30,9 @@
|
|||
ABC_NAMESPACE_HEADER_START
|
||||
|
||||
Abc_Ntk_t *Gia_ManRewirePut(Gia_Man_t *pGia);
|
||||
Abc_Ntk_t *Abc_ManRewireMap(Abc_Ntk_t *pNtk);
|
||||
Abc_Ntk_t *Abc_ManRewireMapAmap(Abc_Ntk_t *pNtk);
|
||||
Abc_Ntk_t *Gia_ManRewireMapNf(Gia_Man_t *pGia);
|
||||
Abc_Ntk_t *Gia_ManRewireMapSimap(Gia_Man_t *pGia, int nBound, int nBTLimit, int nTimeout);
|
||||
Vec_Int_t *Abc_ManRewireNtkWriteMiniMapping(Abc_Ntk_t *pNtk);
|
||||
Abc_Ntk_t *Abc_ManRewireNtkFromMiniMapping(int *vMapping);
|
||||
Mini_Aig_t *Abc_ManRewireMiniAigFromNtk(Abc_Ntk_t *pNtk);
|
||||
|
|
|
|||
|
|
@ -26,35 +26,35 @@ ABC_NAMESPACE_IMPL_START
|
|||
#endif // RW_ABC
|
||||
|
||||
#ifdef RW_ABC
|
||||
Gia_Man_t *Gia_ManRewireInt(Gia_Man_t *pGia, int nIters, float levelGrowRatio, int nExpands, int nGrowth, int nDivs, int nFaninMax, int nTimeOut, int nMode, int nDist, int nSeed, int fVerbose) {
|
||||
Random_Num(nSeed);
|
||||
Gia_Man_t *Gia_ManRewireInt(Gia_Man_t *pGia, int nIters, float levelGrowRatio, int nExpands, int nGrowth, int nDivs, int nFaninMax, int nTimeOut, int nMode, int nMappedMode, int nDist, int nSeed, int fVerbose) {
|
||||
Random_Num(nSeed == 0 ? Abc_Random(0) % 10 : nSeed);
|
||||
|
||||
Rewire::Miaig pNtkMiaig(pGia);
|
||||
Rewire::Miaig pNew = pNtkMiaig.rewire(nIters, levelGrowRatio, nExpands, nGrowth, nDivs, nFaninMax, nTimeOut, nMode, nDist, fVerbose);
|
||||
Rewire::Miaig pNew = pNtkMiaig.rewire(nIters, levelGrowRatio, nExpands, nGrowth, nDivs, nFaninMax, nTimeOut, nMode, nMappedMode, nDist, fVerbose);
|
||||
pNew.setName(Gia_ManName(pGia));
|
||||
|
||||
return pNew.toGia();
|
||||
}
|
||||
|
||||
Abc_Ntk_t *Abc_ManRewireInt(Abc_Ntk_t *pNtk, int nIters, float levelGrowRatio, int nExpands, int nGrowth, int nDivs, int nFaninMax, int nTimeOut, int nMode, int nDist, int nSeed, int fVerbose) {
|
||||
Random_Num(nSeed);
|
||||
Abc_Ntk_t *Abc_ManRewireInt(Abc_Ntk_t *pNtk, int nIters, float levelGrowRatio, int nExpands, int nGrowth, int nDivs, int nFaninMax, int nTimeOut, int nMode, int nMappedMode, int nDist, int nSeed, int fVerbose) {
|
||||
Random_Num(nSeed == 0 ? Abc_Random(0) % 10 : nSeed);
|
||||
|
||||
int fMapped = nMode == 1;
|
||||
Rewire::Miaig pNtkMiaig(pNtk);
|
||||
Rewire::Miaig pNew = pNtkMiaig.rewire(nIters, levelGrowRatio, nExpands, nGrowth, nDivs, nFaninMax, nTimeOut, fMapped, nDist, fVerbose);
|
||||
Rewire::Miaig pNew = pNtkMiaig.rewire(nIters, levelGrowRatio, nExpands, nGrowth, nDivs, nFaninMax, nTimeOut, fMapped, nMappedMode, nDist, fVerbose);
|
||||
pNew.setName(Abc_NtkName(pNtk));
|
||||
if (nMode == 2) {
|
||||
pNew.countTransistors(1);
|
||||
pNew.countTransistors(1, nMappedMode);
|
||||
}
|
||||
|
||||
return pNew.toNtk(nMode >= 1);
|
||||
}
|
||||
|
||||
Mini_Aig_t *MiniAig_ManRewireInt(Mini_Aig_t *pAig, int nIters, float levelGrowRatio, int nExpands, int nGrowth, int nDivs, int nFaninMax, int nTimeOut, int nMode, int nDist, int nSeed, int fVerbose) {
|
||||
Random_Num(nSeed);
|
||||
Mini_Aig_t *MiniAig_ManRewireInt(Mini_Aig_t *pAig, int nIters, float levelGrowRatio, int nExpands, int nGrowth, int nDivs, int nFaninMax, int nTimeOut, int nMode, int nMappedMode, int nDist, int nSeed, int fVerbose) {
|
||||
Random_Num(nSeed == 0 ? Abc_Random(0) % 10 : nSeed);
|
||||
|
||||
Rewire::Miaig pNtkMiaig(pAig);
|
||||
Rewire::Miaig pNew = pNtkMiaig.rewire(nIters, levelGrowRatio, nExpands, nGrowth, nDivs, nFaninMax, nTimeOut, nMode, nDist, fVerbose);
|
||||
Rewire::Miaig pNew = pNtkMiaig.rewire(nIters, levelGrowRatio, nExpands, nGrowth, nDivs, nFaninMax, nTimeOut, nMode, nMappedMode, nDist, fVerbose);
|
||||
|
||||
return pNew.toMiniAig();
|
||||
}
|
||||
|
|
@ -225,26 +225,51 @@ Abc_Ntk_t *Miaig::toNtk(int fMapped) {
|
|||
Gia_ManStop(pGia);
|
||||
return pNtk;
|
||||
}
|
||||
|
||||
vi *moveVecToVi(Vec_Int_t *v) {
|
||||
vi *p = (vi *)malloc(sizeof(vi));
|
||||
p->size = Vec_IntSize(v);
|
||||
p->cap = Vec_IntCap(v);
|
||||
p->ptr = Vec_IntArray(v);
|
||||
free(v);
|
||||
return p;
|
||||
}
|
||||
#endif // RW_ABC
|
||||
|
||||
// technology mapping
|
||||
float Miaig::countTransistors(int reset) {
|
||||
float Miaig::countTransistors(int reset, int nMappedMode) {
|
||||
if (!reset && _data->nTransistor) return _data->nTransistor;
|
||||
#ifdef RW_ABC
|
||||
Abc_Ntk_t *pNtk = toNtk();
|
||||
Abc_Ntk_t *pNtkMapped = Abc_ManRewireMap(pNtk);
|
||||
|
||||
float area = Abc_NtkGetMappedArea(pNtkMapped);
|
||||
Vec_Int_t *vMapping = Abc_ManRewireNtkWriteMiniMapping(pNtkMapped);
|
||||
_data->pNtkMapped = (vi *)malloc(sizeof(vi));
|
||||
_data->pNtkMapped->size = Vec_IntSize(vMapping);
|
||||
_data->pNtkMapped->cap = Vec_IntCap(vMapping);
|
||||
_data->pNtkMapped->ptr = Vec_IntArray(vMapping);
|
||||
free(vMapping);
|
||||
Abc_NtkDelete(pNtk);
|
||||
Abc_NtkDelete(pNtkMapped);
|
||||
#else
|
||||
float area = 0;
|
||||
Abc_Ntk_t *pNtkMapped = NULL, *pNtkMappedTemp = NULL;
|
||||
if (nMappedMode == 0) { // amap
|
||||
Abc_Ntk_t *pNtk = toNtk();
|
||||
pNtkMapped = Abc_ManRewireMapAmap(pNtk);
|
||||
Abc_NtkDelete(pNtk);
|
||||
} else if (nMappedMode == 1) { // &nf
|
||||
Gia_Man_t *pGia = toGia();
|
||||
pNtkMapped = Gia_ManRewireMapNf(pGia);
|
||||
Gia_ManStop(pGia);
|
||||
} else if (nMappedMode == 2) { // &simap
|
||||
Abc_Ntk_t *pNtk = toNtk();
|
||||
pNtkMapped = Abc_ManRewireMapAmap(pNtk);
|
||||
area = Abc_NtkGetMappedArea(pNtkMapped);
|
||||
Gia_Man_t *pGia = toGia();
|
||||
while ((pNtkMappedTemp = Gia_ManRewireMapSimap(pGia, area - 2, 0, 40))) {
|
||||
area -= 2;
|
||||
Abc_NtkDelete(pNtkMapped);
|
||||
pNtkMapped = pNtkMappedTemp;
|
||||
}
|
||||
Gia_ManStop(pGia);
|
||||
}
|
||||
if (pNtkMapped) {
|
||||
area = Abc_NtkGetMappedArea(pNtkMapped);
|
||||
Vec_Int_t *vMapping = Abc_ManRewireNtkWriteMiniMapping(pNtkMapped);
|
||||
_data->pNtkMapped = moveVecToVi(vMapping);
|
||||
Abc_NtkDelete(pNtkMapped);
|
||||
}
|
||||
#else
|
||||
float area = countAnd2(reset, 0);
|
||||
#endif // RW_ABC
|
||||
|
||||
return _data->nTransistor = area;
|
||||
|
|
@ -1131,7 +1156,7 @@ Miaig randomRead(std::vector<Miaig> &pBests) {
|
|||
return pBests[Random_Num(0) % pBests.size()];
|
||||
}
|
||||
|
||||
Miaig Miaig::rewire(int nIters, float levelGrowRatio, int nExpands, int nGrowth, int nDivs, int nFaninMax, int nTimeOut, int nMode, int nDist, int nVerbose) {
|
||||
Miaig Miaig::rewire(int nIters, float levelGrowRatio, int nExpands, int nGrowth, int nDivs, int nFaninMax, int nTimeOut, int nMode, int nMappedMode, int nDist, int nVerbose) {
|
||||
const int nRootSave = 8;
|
||||
const int nBestSave = 4;
|
||||
int nRestart = 5000;
|
||||
|
|
@ -1141,16 +1166,16 @@ Miaig Miaig::rewire(int nIters, float levelGrowRatio, int nExpands, int nGrowth,
|
|||
Miaig pNew;
|
||||
Miaig pRoot = pRoots[0];
|
||||
Miaig pBest = this->dup(0);
|
||||
float (Miaig::*Miaig_ObjectiveFunction)(int) = (nMode == 0) ? &Miaig::countAnd2 : &Miaig::countTransistors;
|
||||
float (Miaig::*Miaig_ObjectiveFunction)(int, int) = (nMode == 0) ? &Miaig::countAnd2 : &Miaig::countTransistors;
|
||||
int maxLevel = levelGrowRatio != 0 ? this->countLevel() * levelGrowRatio : 0;
|
||||
int nExpandableLevel = maxLevel ? maxLevel - this->countLevel() : 0;
|
||||
|
||||
float PrevBest = ((&pBest)->*Miaig_ObjectiveFunction)(1);
|
||||
float PrevBest = ((&pBest)->*Miaig_ObjectiveFunction)(1, nMappedMode);
|
||||
int iterNotImproveAfterRestart = 0;
|
||||
if (nVerbose && maxLevel) printf("Max level : %5d\n", maxLevel);
|
||||
if (nVerbose) printf("Initial target : %5g (AND2 = %5g Level = %3d)\n", PrevBest, this->countAnd2(1), this->countLevel());
|
||||
for (int i = 0; nIters ? i < nIters : 1; i++) {
|
||||
if (nVerbose) printf("\rIteration %7d : %5g -> ", i + 1, ((&pRoot)->*Miaig_ObjectiveFunction)(0));
|
||||
if (nVerbose) printf("\rIteration %7d : %5g -> ", i + 1, ((&pRoot)->*Miaig_ObjectiveFunction)(0, nMappedMode));
|
||||
if (nTimeOut && nTimeOut < 1.0 * (Time_Clock() - clkStart) / CLOCKS_PER_SEC) break;
|
||||
pNew = pRoot.dupMulti(nFaninMax, nGrowth);
|
||||
|
||||
|
|
@ -1161,8 +1186,8 @@ Miaig Miaig::rewire(int nIters, float levelGrowRatio, int nExpands, int nGrowth,
|
|||
|
||||
++iterNotImproveAfterRestart;
|
||||
// report
|
||||
float rootTarget = ((&pRoot)->*Miaig_ObjectiveFunction)(0);
|
||||
float newTarget = ((&pNew)->*Miaig_ObjectiveFunction)(1);
|
||||
float rootTarget = ((&pRoot)->*Miaig_ObjectiveFunction)(0, nMappedMode);
|
||||
float newTarget = ((&pNew)->*Miaig_ObjectiveFunction)(1, nMappedMode);
|
||||
if (maxLevel ? pNew.countLevel() > maxLevel : 0) {
|
||||
} else if (PrevBest > newTarget) {
|
||||
if (nVerbose) printf("%5g (AND2 = %5g Level = %3d) ", newTarget, pNew.countAnd2(), pNew.countLevel());
|
||||
|
|
|
|||
|
|
@ -257,8 +257,9 @@ private:
|
|||
int *hashLookup(int *pTable, int l0, int l1, int TableSize);
|
||||
|
||||
public:
|
||||
float countAnd2(int reset = 0);
|
||||
float countTransistors(int reset = 0);
|
||||
float countAnd2(int reset = 0, int fDummy = 0);
|
||||
// 0: amap 1: &nf 2: &simap
|
||||
float countTransistors(int reset = 0, int nMode = 0);
|
||||
int countLevel(void);
|
||||
|
||||
private:
|
||||
|
|
@ -285,7 +286,7 @@ public:
|
|||
Miaig reduce(int fVerbose);
|
||||
Miaig expandThenReduce(int nFaninAddLimit, int nDist, int nExpandableLevel, int fVerbose);
|
||||
Miaig expandShareReduce(int nFaninAddLimitAll, int nDivs, int nDist, int nExpandableLevel, int nVerbose);
|
||||
Miaig rewire(int nIters, float levelGrowRatio, int nExpands, int nGrowth, int nDivs, int nFaninMax, int nTimeOut, int nMode, int nDist, int nVerbose);
|
||||
Miaig rewire(int nIters, float levelGrowRatio, int nExpands, int nGrowth, int nDivs, int nFaninMax, int nTimeOut, int nMode, int nMappedMode, int nDist, int nVerbose);
|
||||
#ifdef RW_ABC
|
||||
Gia_Man_t *toGia(void);
|
||||
Abc_Ntk_t *toNtk(int fMapped = 0);
|
||||
|
|
@ -462,7 +463,7 @@ inline int Miaig::nWords(void) {
|
|||
return _data->nWords;
|
||||
}
|
||||
|
||||
inline float Miaig::countAnd2(int reset) {
|
||||
inline float Miaig::countAnd2(int reset, int fDummy) {
|
||||
int i, Counter = 0;
|
||||
Miaig_ForEachNode(i) {
|
||||
Counter += objFaninNum(i) - 1;
|
||||
|
|
|
|||
|
|
@ -22,16 +22,16 @@
|
|||
|
||||
ABC_NAMESPACE_IMPL_START
|
||||
|
||||
Gia_Man_t *Gia_ManRewire(Gia_Man_t *pGia, int nIters, float levelGrowRatio, int nExpands, int nGrowth, int nDivs, int nFaninMax, int nTimeOut, int nMode, int nDist, int nSeed, int fVerbose) {
|
||||
return Gia_ManRewireInt(pGia, nIters, levelGrowRatio, nExpands, nGrowth, nDivs, nFaninMax, nTimeOut, nMode, nDist, nSeed, fVerbose);
|
||||
Gia_Man_t *Gia_ManRewire(Gia_Man_t *pGia, int nIters, float levelGrowRatio, int nExpands, int nGrowth, int nDivs, int nFaninMax, int nTimeOut, int nMode, int nMappedMode, int nDist, int nSeed, int fVerbose) {
|
||||
return Gia_ManRewireInt(pGia, nIters, levelGrowRatio, nExpands, nGrowth, nDivs, nFaninMax, nTimeOut, nMode, nMappedMode, nDist, nSeed, fVerbose);
|
||||
}
|
||||
|
||||
Abc_Ntk_t *Abc_ManRewire(Abc_Ntk_t *pNtk, int nIters, float levelGrowRatio, int nExpands, int nGrowth, int nDivs, int nFaninMax, int nTimeOut, int nMode, int nDist, int nSeed, int fVerbose) {
|
||||
return Abc_ManRewireInt(pNtk, nIters, levelGrowRatio, nExpands, nGrowth, nDivs, nFaninMax, nTimeOut, nMode, nDist, nSeed, fVerbose);
|
||||
Abc_Ntk_t *Abc_ManRewire(Abc_Ntk_t *pNtk, int nIters, float levelGrowRatio, int nExpands, int nGrowth, int nDivs, int nFaninMax, int nTimeOut, int nMode, int nMappedMode, int nDist, int nSeed, int fVerbose) {
|
||||
return Abc_ManRewireInt(pNtk, nIters, levelGrowRatio, nExpands, nGrowth, nDivs, nFaninMax, nTimeOut, nMode, nMappedMode, nDist, nSeed, fVerbose);
|
||||
}
|
||||
|
||||
Mini_Aig_t *MiniAig_ManRewire(Mini_Aig_t *pAig, int nIters, float levelGrowRatio, int nExpands, int nGrowth, int nDivs, int nFaninMax, int nTimeOut, int nMode, int nDist, int nSeed, int fVerbose) {
|
||||
return MiniAig_ManRewireInt(pAig, nIters, levelGrowRatio, nExpands, nGrowth, nDivs, nFaninMax, nTimeOut, nMode, nDist, nSeed, fVerbose);
|
||||
Mini_Aig_t *MiniAig_ManRewire(Mini_Aig_t *pAig, int nIters, float levelGrowRatio, int nExpands, int nGrowth, int nDivs, int nFaninMax, int nTimeOut, int nMode, int nMappedMode, int nDist, int nSeed, int fVerbose) {
|
||||
return MiniAig_ManRewireInt(pAig, nIters, levelGrowRatio, nExpands, nGrowth, nDivs, nFaninMax, nTimeOut, nMode, nMappedMode, nDist, nSeed, fVerbose);
|
||||
}
|
||||
|
||||
ABC_NAMESPACE_IMPL_END
|
||||
|
|
@ -35,12 +35,12 @@
|
|||
|
||||
ABC_NAMESPACE_HEADER_START
|
||||
|
||||
Gia_Man_t *Gia_ManRewire(Gia_Man_t *pGia, int nIters, float levelGrowRatio, int nExpands, int nGrowth, int nDivs, int nFaninMax, int nTimeOut, int nMode, int nDist, int nSeed, int fVerbose);
|
||||
Gia_Man_t *Gia_ManRewireInt(Gia_Man_t *pGia, int nIters, float levelGrowRatio, int nExpands, int nGrowth, int nDivs, int nFaninMax, int nTimeOut, int nMode, int nDist, int nSeed, int fVerbose);
|
||||
Abc_Ntk_t *Abc_ManRewire(Abc_Ntk_t *pNtk, int nIters, float levelGrowRatio, int nExpands, int nGrowth, int nDivs, int nFaninMax, int nTimeOut, int nMode, int nDist, int nSeed, int fVerbose);
|
||||
Abc_Ntk_t *Abc_ManRewireInt(Abc_Ntk_t *pNtk, int nIters, float levelGrowRatio, int nExpands, int nGrowth, int nDivs, int nFaninMax, int nTimeOut, int nMode, int nDist, int nSeed, int fVerbose);
|
||||
Mini_Aig_t *MiniAig_ManRewire(Mini_Aig_t *pAig, int nIters, float levelGrowRatio, int nExpands, int nGrowth, int nDivs, int nFaninMax, int nTimeOut, int nMode, int nDist, int nSeed, int fVerbose);
|
||||
Mini_Aig_t *MiniAig_ManRewireInt(Mini_Aig_t *pAig, int nIters, float levelGrowRatio, int nExpands, int nGrowth, int nDivs, int nFaninMax, int nTimeOut, int nMode, int nDist, int nSeed, int fVerbose);
|
||||
Gia_Man_t *Gia_ManRewire(Gia_Man_t *pGia, int nIters, float levelGrowRatio, int nExpands, int nGrowth, int nDivs, int nFaninMax, int nTimeOut, int nMode, int nMappedMode, int nDist, int nSeed, int fVerbose);
|
||||
Gia_Man_t *Gia_ManRewireInt(Gia_Man_t *pGia, int nIters, float levelGrowRatio, int nExpands, int nGrowth, int nDivs, int nFaninMax, int nTimeOut, int nMode, int nMappedMode, int nDist, int nSeed, int fVerbose);
|
||||
Abc_Ntk_t *Abc_ManRewire(Abc_Ntk_t *pNtk, int nIters, float levelGrowRatio, int nExpands, int nGrowth, int nDivs, int nFaninMax, int nTimeOut, int nMode, int nMappedMode, int nDist, int nSeed, int fVerbose);
|
||||
Abc_Ntk_t *Abc_ManRewireInt(Abc_Ntk_t *pNtk, int nIters, float levelGrowRatio, int nExpands, int nGrowth, int nDivs, int nFaninMax, int nTimeOut, int nMode, int nMappedMode, int nDist, int nSeed, int fVerbose);
|
||||
Mini_Aig_t *MiniAig_ManRewire(Mini_Aig_t *pAig, int nIters, float levelGrowRatio, int nExpands, int nGrowth, int nDivs, int nFaninMax, int nTimeOut, int nMode, int nMappedMode, int nDist, int nSeed, int fVerbose);
|
||||
Mini_Aig_t *MiniAig_ManRewireInt(Mini_Aig_t *pAig, int nIters, float levelGrowRatio, int nExpands, int nGrowth, int nDivs, int nFaninMax, int nTimeOut, int nMode, int nMappedMode, int nDist, int nSeed, int fVerbose);
|
||||
|
||||
ABC_NAMESPACE_HEADER_END
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue