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2928 Commits

Author SHA1 Message Date
Alan Mishchenko 6d1d52deaa Adding an option to read the RTL elaboration library from the current directory. 2024-01-30 20:22:55 -08:00
Alan Mishchenko d6555f48dd Adding a switch to not write the timestamp in the AIGER file. 2024-01-26 07:31:20 -08:00
Alan Mishchenko 8da884de85 Switch to reverse the order of bits. 2024-01-18 18:23:11 -08:00
Baruch Sterin 234af64a8c Workaround for C++17 compilation (on clang) 2024-01-18 09:58:18 -08:00
aletempiac d223898f3d Merge remote-tracking branch 'origin/master' into acd 2024-01-16 17:44:45 +01:00
Alan Mishchenko dc68fe27f9 Saving module interface. 2024-01-11 19:45:42 -08:00
Alan Mishchenko 5978ccdb52 Updating sleep command to wait for file. 2023-12-21 12:16:33 +09:00
Alan Mishchenko 7fe92148cc New command to put computation to sleep. 2023-12-18 21:04:31 +09:00
aletempiac b3d2419d9a Formatting, renaming, and cleaning code 2023-11-27 13:38:36 +01:00
aletempiac 1d7dfd25c6 Improving ACD mapping 2023-11-17 16:58:17 +01:00
aletempiac 1632dc0d4e First version of ACD 2023-11-15 18:38:00 +01:00
Alan Mishchenko 6ca7eab466 Prototype of integrating decomposition into "if". 2023-11-14 12:58:03 -08:00
Alan Mishchenko eb264c5d22 Suggested fixes. 2023-11-13 17:19:54 -08:00
Alan Mishchenko 5de12aa6b3 Experiments with SAT solving. 2023-10-23 11:30:44 -07:00
Alan Mishchenko 76e8d21aaf Printout changes. 2023-10-23 10:48:43 -07:00
Alan Mishchenko 01ad71b26f Experiments with verification. 2023-10-23 09:38:08 -07:00
Alan Mishchenko 8dbf8965fd Adding batch option to "scrgen". 2023-10-23 09:37:04 -07:00
Alan Mishchenko 652a0aaef7 Compiler warning. 2023-10-20 22:42:40 -07:00
Alan Mishchenko 72b423ba14 Experiments with SAT solving. 2023-10-20 20:53:43 -07:00
Alan Mishchenko 3c4c558656 Experiment with script generation. 2023-10-02 16:47:37 -07:00
Alan Mishchenko 65ccd3cc69 Enabled literal remapping. 2023-09-29 16:07:29 -07:00
Alan Mishchenko cc636a0d83 Experiments with verification. 2023-09-28 06:40:57 -07:00
Alan Mishchenko 4d1618f600 Enable dumping Verilog with assign-statements. 2023-09-21 11:08:43 +08:00
Alan Mishchenko 7fd4b01fb3 Automatic script file generation. 2023-09-18 16:30:09 +08:00
Alan Mishchenko 09b0295c1a Adding aliases for some commands. 2023-09-18 16:27:54 +08:00
Alan Mishchenko 9399faac48 Improvements to &gen_hie. 2023-09-17 12:40:33 +08:00
Alan Mishchenko 2f5b81119b Experiments with retiming. 2023-09-17 12:17:27 +08:00
Alan Mishchenko 475c8dad8e Compiler problem. 2023-09-16 07:13:10 +08:00
Cunxi Yu 1261f71248
Merge branch 'berkeley-abc:master' into master 2023-09-15 13:25:27 -07:00
Alan Mishchenko 57cc2bd089 Compiler problem. 2023-09-15 22:51:11 +08:00
Alan Mishchenko 09013f3a6e New command &gen_hie to generate hierarchical designs. 2023-09-15 22:44:31 +08:00
Alan Mishchenko 1ffdbbbebe Corner-case bug fix. 2023-09-11 10:46:38 +07:00
Alan Mishchenko 588122dc72 Writing an interface module when dumping Verilog. 2023-09-11 09:44:22 +07:00
Alan Mishchenko a4755a37cb Experiments with CEC. 2023-09-08 22:42:41 +07:00
Alan Mishchenko f844fb1057 Command to add one flop to the design. 2023-09-08 16:46:14 +07:00
Alan Mishchenko 0c719ab69e Adding procedure to merge two libraries. 2023-09-08 14:23:14 +07:00
alanminko 00fa1e3714
Merge pull request #241 from wjrforcyber/typo 
Refactor(Typo):Typo currently exists
 2023-09-05 14:09:40 +07:00
alanminko 4c718f7b50
Merge pull request #218 from seccipon/master 
1. Fix bug (using pDesign without check if == NULL) 2. Switch type of variables containing file size to (int => long)
 2023-09-05 14:08:51 +07:00
alanminko 7f22cc07b8
Merge pull request #194 from jamesjer/badfile 
Do not pass NULL to fprintf
 2023-09-05 14:07:35 +07:00
alanminko 1cd5a2ce04
Merge pull request #156 from Teemperor/FixMemoryLeak 
Fix some memory leaks
 2023-09-05 14:05:09 +07:00
alanminko 3daa630a03
Merge pull request #242 from DanielG/spelling-fixes 
treewide: Fix spelling mistakes
 2023-09-05 13:31:50 +07:00
Alan Mishchenko 167fceac37 Enabling command history on Linux. 2023-09-05 11:11:18 +07:00
Alan Mishchenko a13dae7a4a Corner-case bug in truth table reading. 2023-09-04 08:18:02 +07:00
wjrforcyber 1a525c57a6 Merge remote-tracking branch 'upstream/master' into typo 2023-08-29 10:57:06 +08:00
wjrforcyber b8f5708ec1 Refactor(Typo):Expends->Expands 2023-08-29 10:46:57 +08:00
Cunxi Yu 3488a35472
Merge branch 'berkeley-abc:master' into master 2023-08-27 10:21:43 -07:00
CUNXI YU 855976c61d correct the naming of augmentation 2023-08-27 11:19:26 -06:00
CUNXI YU 0fe977a33c correct the naming of augmentation 2023-08-27 11:18:35 -06:00
Daniel Gröber b7d1435db1 treewide: Fix spelling mistakes 
A particularly pedantic set of changes currently used in Debian

Authored-By: Ruben Undheim <ruben.undheim@gmail.com>
 2023-08-27 14:13:20 +02:00
Alan Mishchenko 3309ccabd4 Cleaning up AIG output in EQN format. 2023-08-26 17:12:50 +07:00