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1,250 Commits 27 Branches 57 Tags 58 MiB
Commit Graph

711 Commits

Author SHA1 Message Date
Alan Mishchenko a92c41f767 Removing print-out message in bridge mode. 2012-07-09 22:16:52 -07:00
Alan Mishchenko 637736827a Adding several command-line arguments to 'dsat'. 2012-07-09 19:24:39 -07:00
Alan Mishchenko 685faae8e2 Added command &gla_purify. 2012-07-08 17:56:49 -07:00
Alan Mishchenko ff0ec52d4d Updating memory print-out of &vta and &gla. 2012-07-08 14:01:28 -07:00
Alan Mishchenko d533f18219 Adding printout to report command line executed in batch mode. 2012-07-08 13:23:29 -07:00
Alan Mishchenko 6c3363f777 Adding restart to rarity simulation in sim3 and &sim3. 2012-07-08 13:23:05 -07:00
Alan Mishchenko 1c33107cbb Updating project settings to have simpler include paths. 2012-07-07 20:14:12 -07:00
Alan Mishchenko ea98a2497e Fixing time primtouts throughout the code. 2012-07-07 18:41:02 -07:00
Alan Mishchenko 4760983a46 Fixing time primtouts throughout the code. 2012-07-07 18:15:08 -07:00
Alan Mishchenko 3aab724573 Fixing time primtouts throughout the code. 2012-07-07 17:46:54 -07:00
Alan Mishchenko 5fb7c676c2 Procedure to compute truth tables for POs of GIA. 2012-07-07 13:13:32 -07:00
Alan Mishchenko bea33c0584 Diabling compact AIGER writing by default. 2012-07-07 12:23:03 -07:00
Alan Mishchenko 8b881d235a Making 'pdr', &gla, &vta print correctly in batch mode. 2012-07-07 10:44:34 -07:00
Alan Mishchenko 5008b1a4f3 Commands &fla_gla/&gla_fla to convert between flop-level and gate-level abstraction. 2012-07-06 20:41:11 -07:00
Alan Mishchenko e879f0f6d1 Tentatively retiring command &abs_start, &abs_cba, &abs_pba, &gla_cba, &gla_pba. 2012-07-06 18:50:50 -07:00
Alan Mishchenko 23467b83b6 Setting infinite default conflict limits in 'bmc', 'int', 'pdr'. 2012-07-06 18:48:35 -07:00
Alan Mishchenko 8b0302cdab Changing default conflict limits in bmc2 and bmc3 to be 0 (no limit). 2012-07-05 13:32:52 -07:00
Alan Mishchenko 3c43fbba1a Other improvements to &vta and &gla. 2012-07-05 13:09:41 -07:00
Alan Mishchenko ce6e6551c3 Other improvements to &vta and &gla. 2012-07-04 18:23:33 -07:00
Alan Mishchenko d3c018cd23 Reducing memory usage in bmc2 and bmc3. 2012-07-01 02:19:19 -07:00
Alan Mishchenko a4908534f1 Bug fix in &vta. 2012-06-29 15:17:03 -07:00
Alan Mishchenko 051cc64ee2 Gate level abstraction (command &gla). 2012-06-28 23:06:07 -07:00
Alan Mishchenko 520c436d28 Gate level abstraction (command &gla). 2012-06-28 16:44:03 -07:00
Alan Mishchenko 7629fd6aea Added min-cut-based refinement of gate-level abstraction (command &gla_refine). 2012-06-24 18:45:42 -07:00
Alan Mishchenko 3c0a9e0862 Switch -A <file_name> to specify file name for dumping abstrated model with &vta -d. 2012-06-21 20:20:26 -07:00
Alan Mishchenko 98d9d5a61f Added warning when a command is missing 2012-06-15 08:37:56 -07:00
Alan Mishchenko c6af9094c0 Changing 'if' to allow for delay optimization on sequential paths only. 2012-05-20 17:27:53 +07:00
Alan Mishchenko 37a3e07d91 Prevent network from being unmapped after equivalence checking. 2012-05-15 15:36:51 +07:00
Alan Mishchenko 54670783e0 Better resolution of CO drivers. Should impact the QoR after 'if'. 2012-05-15 15:28:42 +07:00
Alan Mishchenko 76539c1956 Added generation of multipliers in 'gen'. 2012-05-15 09:34:24 +07:00
Alan Mishchenko 675437b214 Preventing 'show' from unmapping the network. 2012-05-14 19:55:40 +07:00
Alan Mishchenko e37fb952da Included copyright statement into 'main.c'. 2012-05-11 09:26:36 +07:00
Alan Mishchenko 7452455155 Changing the rules of assigning the names when AIG is converted into a logic network. 2012-05-11 08:35:54 +07:00
Alan Mishchenko aa087d2513 Making sure cec -n and dsec -n do not remove the I/O names in the current network. 2012-05-08 13:37:19 +08:00
Alan Mishchenko 50fac8a098 Bug fix in fraig_restore. 2012-05-06 22:52:56 +08:00
Alan Mishchenko 959ac60956 Misc changes. 2012-05-01 08:04:31 +08:00
Alan Mishchenko 2c6faa0607 Compilation problem caused by multiple declarations. 2012-04-28 16:04:17 +07:00
Alan Mishchenko 78855cc952 Added supporting dual-output seq miters in &trim. 2012-04-28 04:19:26 +07:00
Alan Mishchenko 2bf7454b41 Added supporting dual-output seq miters in &iso. 2012-04-28 02:21:06 +07:00
Alan Mishchenko a4baba2c83 Misc changes. 2012-04-27 16:26:41 +07:00
Alan Mishchenko 590202e327 Set the failed output index if ORing of outputs was done in 'int'. 2012-04-27 16:14:40 +07:00
Alan Mishchenko 5f5dda9030 Updating the counter of finished frames when dumping intermediate abstraction in &vta. 2012-04-27 07:46:02 +07:00
Alan Mishchenko 5c683fc164 Adding iterative refinement to 'addbuffs'. 2012-04-14 15:06:41 -07:00
Alan Mishchenko 92ad58ffa2 Adding iterative refinement to 'addbuffs'. 2012-04-13 18:20:44 -07:00
Alan Mishchenko 7e21f01269 Updated used message for 'back_reach'. 2012-04-13 15:41:31 -07:00
Alan Mishchenko b1a57b2ae9 Adding iterative refinement to 'addbuffs'. 2012-04-11 16:29:08 -07:00
Alan Mishchenko 0184dab4de Adding iterative refinement to 'addbuffs'. 2012-04-11 16:00:09 -07:00
Alan Mishchenko 0d802453e4 Adding reverse order to 'addbuffs'. 2012-04-11 08:09:31 -07:00
Alan Mishchenko f380bb5ac1 Improving printouts of critical path. 2012-04-09 20:01:40 -07:00
Alan Mishchenko b9913732c4 Improving printouts of critical path. 2012-04-09 18:59:36 -07:00
Alan Mishchenko 0509440a45 Improving printouts of critical path. 2012-04-09 15:06:33 -07:00
Alan Mishchenko e908ff1cb9 Improving printouts of critical path. 2012-04-09 11:46:42 -07:00
Alan Mishchenko 48b47300e3 Added dumping abstracted model in &vta. 2012-04-07 12:43:17 -07:00
Alan Mishchenko c3d3ccf349 Better interface with the new code. 2012-04-06 22:03:00 -07:00
Alan Mishchenko 2c21e2de0d Improving printouts of critical path. 2012-04-06 13:31:03 -07:00
Alan Mishchenko 5de8e60b9f Improving printouts of critical path. 2012-04-06 12:52:26 -07:00
Alan Mishchenko 8c1513dfbc Improving printouts of critical path. 2012-04-06 00:45:58 -07:00
Alan Mishchenko 9eb1be8e53 Bug fix in 'addbuffs'. 2012-03-29 15:48:45 -07:00
Alan Mishchenko 3992e344ea Logic sharing for multi-input gates (silencing a warning). 2012-03-27 21:59:13 -07:00
Alan Mishchenko a21f2986aa Enabling mapping into multi-input AND/OR gates. 2012-03-27 20:15:02 -07:00
Alan Mishchenko 08253a50eb Logic sharing for multi-input gates (bug fix). 2012-03-26 20:21:05 -07:00
Alan Mishchenko a4144cf0d1 Making demiter dump files in the current directory. 2012-03-26 12:55:58 -07:00
Alan Mishchenko 16cf6bf1ca Logic sharing for multi-input gates. 2012-03-26 12:55:20 -07:00
Alan Mishchenko 45f07795ef Logic sharing for multi-input gates. 2012-03-25 23:10:35 -07:00
Alan Mishchenko 8ed3e40a52 Logic sharing for multi-input gates. 2012-03-25 22:47:08 -07:00
Alan Mishchenko 5f075adc19 Logic sharing for multi-input gates. 2012-03-25 16:58:40 -07:00
Alan Mishchenko b4df114e4a Logic sharing for multi-input gates. 2012-03-25 16:49:29 -07:00
Alan Mishchenko 309bcf2dec Logic sharing for multi-input gates. 2012-03-25 01:24:26 -07:00
Alan Mishchenko abb889fe6e Improving printouts of gates and support. 2012-03-24 13:15:37 -07:00
Alan Mishchenko aede5026b3 Silencing a gcc warning. 2012-03-23 22:55:45 -07:00
Alan Mishchenko 3abd9773a4 Enabled demitering dual-output miters. 2012-03-23 22:52:30 -07:00
Alan Mishchenko 1c31dbe786 Added command 'addbuffs' to create balanced CI/CO paths. 2012-03-23 22:29:25 -07:00
Alan Mishchenko 0792ab0eb6 Additional features for delay optimization 2012-03-21 23:19:49 -07:00
Alan Mishchenko f50ce3dbd9 Switching to a variable-page-size memory manager for clauses and proofs. 2012-03-21 17:13:39 -07:00
Alan Mishchenko 8f91b30a67 Bug fix to prevent crashing when Abc_Print() is called while ABC is not initialized. 2012-03-20 09:35:33 -07:00
Alan Mishchenko c347f2b90b Alternative way of computing delay in SOP balancing. 2012-03-16 15:43:08 -07:00
Alan Mishchenko aeedc6ace5 Exploration of ISO and minor changes. 2012-03-13 16:12:16 -07:00
Alan Mishchenko 795b5a6ce7 Added command 'nodedup' to duplicate nodes with high fanout. 2012-03-11 23:06:14 -07:00
Alan Mishchenko fec988f619 Renamed Aig_ObjPioNum to be Aig_ObjCioId. 2012-03-09 19:59:35 -08:00
Alan Mishchenko c46c957a07 Renamed Aig_ObjIsPi/Po to be ...Ci/Co and Aig_Man(Pi/Po)Num to be ...(Ci/Co)... 2012-03-09 19:50:18 -08:00
Alan Mishchenko 2c8f1a67ec Renamed Aig_ManForEachPi/Po to be ...Ci/Co and Aig_ObjCreatePi/Po to be ...Ci/Co. 2012-03-09 19:32:44 -08:00
Alan Mishchenko f7c7cb5c65 Adding switch '-n' to 'permute' to derive random topological ordering of internal nodes. 2012-03-06 11:53:07 +01:00
Alan Mishchenko eb4aa42577 Enabling user-specified required times in 'map'. 2012-03-02 13:50:28 -08:00
Alan Mishchenko 7fa9de2da4 Redirecting printf messages. 2012-03-02 01:31:44 -08:00
Alan Mishchenko 7926d75ecb Adding features related to the communication bridge. 2012-03-02 00:57:48 -08:00
Alan Mishchenko 3e5e7a2544 Added skipping &iso when there is only one PO. 2012-02-29 10:51:05 -08:00
Alan Mishchenko 1bf2b0351a Added skipping &iso when there is only one PO. 2012-02-29 10:38:18 -08:00
Alan Mishchenko 0b1cfe886e Added switch -z to command 'removepo' to enable removing const1 outputs. 2012-02-27 17:50:48 -08:00
Alan Mishchenko b06908d1e8 Making BMC engines (bmc2, bmc3) to perform OR-decomposition by default (bug fix). 2012-02-25 15:54:11 -08:00
Alan Mishchenko b4fe108d86 Making BMC engines (bmc2, bmc3) to perform OR-decomposition by default. 2012-02-24 16:11:49 -08:00
Alan Mishchenko 3552d39b71 Making BMC engines (bmc2, bmc3) to perform OR-decomposition by default. 2012-02-24 13:37:31 -08:00
Alan Mishchenko d80f43a185 Making BMC engines (bmc2, bmc3) to perform OR-decomposition by default. 2012-02-24 13:21:32 -08:00
Alan Mishchenko 8f4457772a Added a way to disable support for dynamic linking. 2012-02-24 09:44:16 -08:00
Alan Mishchenko c20d29e7e7 Silenced a gcc warning. 2012-02-23 13:49:49 -08:00
Baruch Sterin f42131935e pyabc: silnce more warnings 2012-02-23 13:45:51 -08:00
Alan Mishchenko 1d25ae3b1a Experiment with technology mapping. 2012-02-22 17:54:24 -08:00
Alan Mishchenko d2cab85976 Adding flag -s to &put to disable status clearing. 2012-02-22 08:06:22 -08:00
Alan Mishchenko 8ba2398138 Undoing a previuos change to not reset the status after &put. 2012-02-22 00:46:52 -08:00
Alan Mishchenko db3a005402 Experiment with technology mapping. 2012-02-20 21:34:50 -08:00
Alan Mishchenko e60d6c94a3 Experiment with technology mapping. 2012-02-20 21:33:51 -08:00