James Cherry
|
9b1dc880f5
|
rm Debug::print
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2020-12-29 10:33:22 -08:00 |
|
James Cherry
|
78d29c8f90
|
error/warn IDs
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2020-12-13 18:21:35 -07:00 |
|
James Cherry
|
bcd40ad42f
|
ArrayTable don't use std::vector for thread safety
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2020-05-03 14:35:58 -07:00 |
|
James Cherry
|
7e12a99f9b
|
Vertex::deletePaths()
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2020-04-20 10:07:14 -07:00 |
|
James Cherry
|
f4d833f1b5
|
vertex arrivals lock
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2020-04-19 15:23:16 -07:00 |
|
James Cherry
|
ee326f165c
|
public headers in include/sta
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2020-04-05 14:53:44 -07:00 |
|
James Cherry
|
804953e317
|
mv public headers to include/sta
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2020-04-05 11:35:51 -07:00 |
|
James Cherry
|
4a017e86eb
|
update copyright
|
2020-03-06 18:50:37 -08:00 |
|
James Cherry
|
cc1bd6b5ab
|
TransRiseFall -> RiseFall
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2019-11-11 15:30:19 -07:00 |
|
James Cherry
|
c018cb212b
|
graph no counts needed
|
2019-11-11 11:16:24 -07:00 |
|
James Cherry
|
3076b8d2ff
|
VertexIndex -> VertexId
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2019-11-11 09:38:25 -07:00 |
|
James Cherry
|
184d044b02
|
replace Pool with ObjectTable
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2019-11-11 08:28:42 -07:00 |
|
James Cherry
|
30a5abebc6
|
Hash -> size_t
|
2019-08-08 14:13:02 -07:00 |
|
James Cherry
|
db6b650a52
|
splash include git sha1
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2019-07-07 09:58:47 -07:00 |
|
James Cherry
|
5f3b10bdf2
|
mv GraphDelayCalc1::isDriver to Vertex
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2019-06-12 21:41:33 -07:00 |
|
James Cherry
|
a8e15ae64f
|
bullet proof for missing tcl unknown proc
|
2019-05-03 21:23:12 -07:00 |
|
James Cherry
|
2d519b4740
|
ucsd 20190410 seg fault accessing/setting power_default_signal_toggle_rate
|
2019-04-10 20:36:48 -07:00 |
|
James Cherry
|
e5c9bc43fd
|
2.0.10
|
2019-03-12 17:25:53 -07:00 |
|
James Cherry
|
0f2dba7eff
|
sync
|
2019-02-26 08:26:12 -08:00 |
|
James Cherry
|
316742202f
|
sync
|
2019-01-16 15:37:31 -08:00 |
|
James Cherry
|
b075ccc783
|
update copyright
|
2019-01-01 12:26:11 -08:00 |
|
James Cherry
|
f49dc75d32
|
sync
|
2018-12-05 14:18:41 -08:00 |
|
James Cherry
|
ddf897d4e6
|
report_power, pocv support
|
2018-11-26 09:15:52 -08:00 |
|
James Cherry
|
9071a01306
|
leaks
|
2018-11-09 11:57:44 -08:00 |
|
James Cherry
|
e9bde796ec
|
2018/11/08 corners > 2 causes internal error, 2018/11/09 Verilog ignore attributes (* blah *)
|
2018-11-09 10:04:16 -08:00 |
|
James Cherry
|
1154fb89fd
|
and then there was light...
|
2018-09-28 08:54:21 -07:00 |