OpenRAM/compiler/pgates
Joey Kunzler ee1de9ac8c Merge branch 's8_update' of github.com:VLSIDA/PrivateRAM into s8_update 2020-04-20 22:14:09 -07:00
..
pand2.py Clean up and generalize layer rules. 2019-12-17 11:03:36 -08:00
pand3.py Clean up and generalize layer rules. 2019-12-17 11:03:36 -08:00
pbuf.py Clean up and generalize layer rules. 2019-12-17 11:03:36 -08:00
pdriver.py Clean up and generalize layer rules. 2019-12-17 11:03:36 -08:00
pgate.py fix minimum pinv sizing 2020-04-18 05:51:21 -07:00
pinv.py fix pinv drc bug 2020-04-18 05:34:55 -07:00
pinvbuf.py Clean up and generalize layer rules. 2019-12-17 11:03:36 -08:00
pnand2.py merge dev in to disc... 2020-04-16 02:18:39 -07:00
pnand3.py merge dev in to disc... 2020-04-16 02:18:39 -07:00
pnor2.py add missing import 2020-04-17 14:24:52 -07:00
precharge.py revert units on sp_lib, begin discrete tx simulation 2020-04-09 19:39:21 -07:00
ptristate_inv.py Cleanup and rename vias. 2020-01-30 01:45:33 +00:00
ptx.py Move pnand outputs to M1. Debug hierarchical decoder multirow. 2020-04-14 10:52:25 -07:00
pwrite_driver.py Nwell fixes in pgates. 2020-02-06 16:20:09 +00:00
single_level_column_mux.py col_mux.py update with correct contacts 2020-04-20 22:08:29 -07:00