Matt Guthaus e97644c424 Only do reverse lookup on valid interconnect layers since layer numbers can be shared.

2020-06-29 14:42:24 -07:00

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base

Only do reverse lookup on valid interconnect layers since layer numbers can be shared.

2020-06-29 14:42:24 -07:00

bitcells

Error out on single port in sky130

2020-06-22 15:41:59 -07:00

characterizer

ngspice raw save doesn't work with measures

2020-06-19 07:09:15 -07:00

custom

Change s8 to sky130

2020-06-12 14:23:26 -07:00

datasheet

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drc

PEP8 cleanup

2020-04-15 11:24:28 -07:00

example_configs

revert example scn4m to non netlist only

2020-02-09 23:52:11 -08:00

gdsMill

added purposes to addText(), removed reference to specific tech from gdsMill

2020-02-19 16:26:52 -08:00

modules

Only copy end-cap pins to the bank level

2020-06-29 11:46:59 -07:00

pgates

Simplify precharge pin layer

2020-06-27 08:22:16 -07:00

router

Changes to simplify metal preferred directions and pitches.

2020-05-10 11:32:45 -07:00

sram

Compute bus size separately for ports

2020-06-29 05:54:30 -07:00

tests

Skip riscv func test for time sake

2020-06-26 06:50:45 -07:00

verify

Disable magic filter in sky130

2020-06-22 16:58:01 -07:00

debug.py

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gen_stimulus.py

Fixed errors in extra rows characterization

2020-03-22 20:54:49 +00:00

globals.py

Change s8 to sky130

2020-06-12 14:23:26 -07:00

Makefile

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openram.py

Characterization for extra rows

2020-02-20 17:01:52 +00:00

options.py

move accuracy_requirement from techfile to config

2020-06-25 06:44:07 -07:00

run_profile.sh

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sram_factory.py

Auto-generate port dependent cell names.

2020-06-05 15:09:22 -07:00

view_profile.py

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