OpenRAM/compiler/modules
mrg cf03454ecf Don't add wdriver_sel_n pins which aren't used. 2022-06-10 09:18:40 -07:00
..
and2_dec.py Remove add_mod and add module whenever calling add_inst. 2021-11-22 11:33:27 -08:00
and3_dec.py Remove add_mod and add module whenever calling add_inst. 2021-11-22 11:33:27 -08:00
and4_dec.py Remove add_mod and add module whenever calling add_inst. 2021-11-22 11:33:27 -08:00
bank.py Add column decoder module with power supply straps. 2022-05-17 13:32:19 -07:00
bank_select.py Remove add_mod and add module whenever calling add_inst. 2021-11-22 11:33:27 -08:00
bitcell_array.py New power strapping mostly working. 2022-04-05 13:51:55 -07:00
bitcell_base_array.py New power strapping mostly working. 2022-04-05 13:51:55 -07:00
col_cap_array.py Rework replica_bitcell_array supplies 2022-04-19 08:50:11 -07:00
column_decoder.py Update column decoder and dff array supplies 2022-05-17 15:49:50 -07:00
column_mux_array.py Fix a couple supply routing issues. 2022-05-03 11:45:51 -07:00
control_logic.py Reimplement off grid pins. 2022-05-02 15:43:14 -07:00
delay_chain.py Move delay line supply strap for pin access. 2022-05-02 16:42:14 -07:00
dff_array.py Update power layer on li for sky130 2022-06-08 17:19:26 -07:00
dff_buf.py Remove add_mod and add module whenever calling add_inst. 2021-11-22 11:33:27 -08:00
dff_buf_array.py Remove experimental power option. 2022-05-23 10:08:35 -07:00
dff_inv.py Remove add_mod and add module whenever calling add_inst. 2021-11-22 11:33:27 -08:00
dff_inv_array.py Update power layer on li for sky130 2022-06-08 17:19:26 -07:00
dummy_array.py New power strapping mostly working. 2022-04-05 13:51:55 -07:00
global_bitcell_array.py Remove add_mod and add module whenever calling add_inst. 2021-11-22 11:33:27 -08:00
hierarchical_decoder.py Reimplement off grid pins. 2022-05-02 15:43:14 -07:00
hierarchical_predecode.py Update versions of tools. Fix supply bug in predecode. 2022-06-08 13:50:25 -07:00
hierarchical_predecode2x4.py Skywater changes. 2021-03-22 15:48:14 -07:00
hierarchical_predecode3x8.py Skywater changes. 2021-03-22 15:48:14 -07:00
hierarchical_predecode4x16.py Skywater changes. 2021-03-22 15:48:14 -07:00
local_bitcell_array.py Fix offsets for local bitcell arrays. 2022-05-13 10:46:00 -07:00
module_type.py Update copyright year. 2021-01-22 11:23:28 -08:00
multibank.py Remove add_mod and add module whenever calling add_inst. 2021-11-22 11:33:27 -08:00
orig_bitcell_array.py Remove add_mod and add module whenever calling add_inst. 2021-11-22 11:33:27 -08:00
port_address.py Reimplement off grid pins. 2022-05-02 15:43:14 -07:00
port_data.py Don't add wdriver_sel_n pins which aren't used. 2022-06-10 09:18:40 -07:00
precharge_array.py Reimplement off grid pins. 2022-05-02 15:43:14 -07:00
replica_bitcell_array.py Add layer and directions to pbitcell 2022-05-16 16:11:13 -07:00
replica_column.py New power strapping mostly working. 2022-04-05 13:51:55 -07:00
row_cap_array.py Rework replica_bitcell_array supplies 2022-04-19 08:50:11 -07:00
sense_amp_array.py Leave supply routing to new helper functions. 2022-05-11 11:01:14 -07:00
tri_gate_array.py Remove add_mod and add module whenever calling add_inst. 2021-11-22 11:33:27 -08:00
wordline_buffer_array.py Fix offsets for local bitcell arrays. 2022-05-13 10:46:00 -07:00
wordline_driver_array.py Reimplement off grid pins. 2022-05-02 15:43:14 -07:00
write_driver_array.py Remove experimental power option. 2022-05-23 10:08:35 -07:00
write_mask_and_array.py Remove add_mod and add module whenever calling add_inst. 2021-11-22 11:33:27 -08:00