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luke
/
OpenRAM
mirror of
https://github.com/VLSIDA/OpenRAM.git
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c117238fa7
OpenRAM
/
compiler
History
…
..
base
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bitcells
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characterizer
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custom
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datasheet
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drc
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example_configs
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gdsMill
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model_configs
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modules
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pgates
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router
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sram
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tests
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verify
Initial klayout DRC/LVS options
2021-08-03 14:41:09 -07:00
Makefile
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debug.py
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gen_stimulus.py
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globals.py
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model_data_util.py
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openram.py
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options.py
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printGDS.py
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processGDS.py
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run_profile.sh
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sram_factory.py
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uniquifyGDS.py
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view_profile.py
…