| .. |
|
base
|
Change to callable DRC rule. Use bottom coordinate for bus offsets.
|
2020-04-15 15:29:55 -07:00 |
|
bitcells
|
Small format cleanup
|
2020-04-01 11:15:29 -07:00 |
|
characterizer
|
Merge branch 'dev' into custom_mod
|
2020-04-03 17:05:56 -07:00 |
|
datasheet
|
Convert capital names to lower case for consistency
|
2019-08-21 13:45:34 -07:00 |
|
drc
|
PEP8 cleanup
|
2020-04-15 11:24:28 -07:00 |
|
example_configs
|
revert example scn4m to non netlist only
|
2020-02-09 23:52:11 -08:00 |
|
gdsMill
|
added purposes to addText(), removed reference to specific tech from gdsMill
|
2020-02-19 16:26:52 -08:00 |
|
modules
|
PEP8 cleanup
|
2020-04-15 14:29:43 -07:00 |
|
pgates
|
Move pnand outputs to M1. Debug hierarchical decoder multirow.
|
2020-04-14 10:52:25 -07:00 |
|
router
|
tech: Make power_grid configurable
|
2020-01-28 12:06:34 +01:00 |
|
sram
|
Fix lvs_write in sram class
|
2020-04-06 15:20:59 -07:00 |
|
tests
|
First pass of multiple bitcells per decoder row
|
2020-04-10 13:29:41 -07:00 |
|
verify
|
Don't force check in lib characterization. PEP8 formatting.
|
2020-04-02 12:52:42 -07:00 |
|
Makefile
|
Clean up Makefile for unit tests
|
2018-12-05 12:58:10 -08:00 |
|
debug.py
|
Add layer-purpose GDS support. Various PEP8 fixes.
|
2019-11-14 18:17:20 +00:00 |
|
gen_stimulus.py
|
Remove some flake8 errors/warnings.
|
2019-10-02 23:26:02 +00:00 |
|
globals.py
|
Remove dynamic bitcell multiple detection.
|
2020-04-09 11:38:18 -07:00 |
|
openram.py
|
Only setup bitcell when running top-level OpenRAM
|
2019-11-26 13:54:37 -08:00 |
|
options.py
|
Blackbox option for DRC waivers
|
2019-11-29 15:50:32 -08:00 |
|
run_profile.sh
|
Convert pin map to a set for faster membership.
|
2019-04-01 15:45:44 -07:00 |
|
sram_factory.py
|
sram_factory: Add check for duplicate module name
|
2019-12-19 16:31:52 +01:00 |
|
view_profile.py
|
Remove some flake8 errors/warnings.
|
2019-10-02 23:26:02 +00:00 |