OpenRAM/compiler
Michael Timothy Grimes e118cc2d5c Merge branch 'dev' of https://github.com/VLSIDA/PrivateRAM into multiport 2018-08-29 16:06:50 -07:00
..
base Clean up GdsMill. Fix rotate bug I introduced in transFlags! 2018-08-29 15:34:45 -07:00
characterizer Remove OEB signal since we split DIN/DOUT ports 2018-08-13 14:09:49 -07:00
gdsMill Remove setting of rotate transflag. Not supported in Calibre? 2018-08-29 16:04:15 -07:00
modules Rewrite blockage routines in router. Clean up GdsMill code. 2018-08-29 15:34:45 -07:00
pgates Further changes to pbitcell so that it passes unit tests for bitcell_array 2018-08-29 15:54:49 -07:00
router Merge branch 'supply_routing' of https://github.com/VLSIDA/PrivateRAM into supply_routing 2018-08-29 15:40:04 -07:00
tests Merge branch 'dev' of https://github.com/VLSIDA/PrivateRAM into multiport 2018-08-29 16:06:50 -07:00
verify Merge branch 'dev' of https://github.com/VLSIDA/PrivateRAM into multiport 2018-08-29 16:06:50 -07:00
Makefile Add Makefile for parallel test execution. 2018-01-22 13:39:07 -08:00
debug.py Output debug warnings and errors to stderr. Clean up regress script a bit. 2018-07-11 09:51:28 -07:00
example_config_freepdk45.py Clean up new code for add_modules, add_pins and netlist/layouts. 2018-08-28 10:24:09 -07:00
example_config_scn3me_subm.py Clean up new code for add_modules, add_pins and netlist/layouts. 2018-08-28 10:24:09 -07:00
gen_stimulus.py Convert entire OpenRAM to use python3. Works with Python 3.6. 2018-05-14 16:15:45 -07:00
globals.py Add sketch for power grid routing code 2018-08-29 15:34:16 -07:00
openram.py Added netlist only configuration option. 2018-08-27 14:33:02 -07:00
options.py Add parameters to give preference to DRC/LVS/PEX tools like we do for spice. 2018-08-28 13:41:26 -07:00
sram.py Converted all modules to not run create_layout when netlist_only 2018-08-27 16:42:48 -07:00
sram_1bank.py Add sketch for power grid routing code 2018-08-29 15:34:16 -07:00
sram_2bank.py Add LVS correspondence points to each bank type 2018-07-18 14:29:04 -07:00
sram_4bank.py Add LVS correspondence points to each bank type 2018-07-18 14:29:04 -07:00
sram_base.py Move place function to instance class rather than hierarchy. 2018-08-27 17:25:39 -07:00