OpenRAM/compiler/pgates
mrg c7bc01c3a9 Clean up binning. Fix mults to 1 for certain gates. 2020-07-15 17:15:42 -07:00
..
pand2.py Thin-cell decoder changes. 2020-05-29 10:36:07 -07:00
pand3.py Vertical gates need both well contacts. 2020-05-13 16:54:35 -07:00
pbuf.py Add no well option. Add stack gates vertical option. 2020-05-11 16:22:08 -07:00
pdriver.py Thin-cell decoder changes. 2020-05-29 10:36:07 -07:00
pgate.py Clean up binning. Fix mults to 1 for certain gates. 2020-07-15 17:15:42 -07:00
pinv.py Clean up binning. Fix mults to 1 for certain gates. 2020-07-15 17:15:42 -07:00
pinv_dec.py Clean up binning. Fix mults to 1 for certain gates. 2020-07-15 17:15:42 -07:00
pinvbuf.py Fix pinvbuf layers 2020-06-09 17:16:35 -07:00
pnand2.py Clean up binning. Fix mults to 1 for certain gates. 2020-07-15 17:15:42 -07:00
pnand3.py Clean up binning. Fix mults to 1 for certain gates. 2020-07-15 17:15:42 -07:00
pnor2.py Clean up binning. Fix mults to 1 for certain gates. 2020-07-15 17:15:42 -07:00
precharge.py Clean up binning. Fix mults to 1 for certain gates. 2020-07-15 17:15:42 -07:00
ptristate_inv.py Changes to simplify metal preferred directions and pitches. 2020-05-10 11:32:45 -07:00
ptx.py Clean up binning. Fix mults to 1 for certain gates. 2020-07-15 17:15:42 -07:00
pwrite_driver.py Modifications for min area metal. 2020-06-30 15:07:34 -07:00
single_level_column_mux.py Place before computing height of col mux. 2020-07-13 15:51:46 -07:00
wordline_driver.py Change s8 to sky130 2020-06-12 14:23:26 -07:00