Michael Timothy Grimes
|
766042fe69
|
changed case of handmade bitcell pins from upper case to lower case. Made changes in other modules that are affected by this case. Only for SCMOS for this commit
|
2018-05-22 14:16:51 -07:00 |
Michael Timothy Grimes
|
b5df0cc30a
|
Merging branch with PrivateRAM dev
|
2018-05-18 15:15:31 -07:00 |
Michael Timothy Grimes
|
3971835f24
|
changed pbitcell_array tests in regards to addition of read/write ports in pbitcell
|
2018-05-10 09:40:43 -07:00 |
Michael Timothy Grimes
|
7f46a0dead
|
merging changes in bitcell.py
|
2018-04-03 09:46:12 -07:00 |
Michael Timothy Grimes
|
0cc077598e
|
Added member functions to bitcell.py and pbitcell.py for use in bitcell_array.py. bitcell_array now used only one function for every type of bitcell.
|
2018-03-15 12:02:38 -07:00 |
Hunter Nichols
|
d0dcd9f34b
|
Fixed comment style on power functions. Also added power parameters to scn3me_subm tech file and tested functionality.
|
2018-03-01 23:34:15 -08:00 |
Hunter Nichols
|
d0e6dc9ce7
|
First version of analytical power models. Still huge room for improvement. Analytical power printed with 1 verbose level.
|
2018-02-26 16:32:28 -08:00 |
Hunter Nichols
|
62ad30e741
|
Added initial version of analytical power esitmation. Loops through instances but power estimate is not accurate.
|
2018-02-22 19:35:54 -08:00 |
Hunter Nichols
|
179a27b0e3
|
Added some power functions.
|
2018-02-20 18:22:23 -08:00 |
Hunter Nichols
|
8ea384a761
|
Fixed merging issues with power branch
|
2018-02-14 15:21:42 -08:00 |
Matt Guthaus
|
7100d6f904
|
Organize top-level files into subdirs.
|
2018-02-09 10:25:24 -08:00 |