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luke/OpenRAM
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mirror of https://github.com/VLSIDA/OpenRAM.git synced 2026-08-29 17:39:02 +02:00
Code Issues Packages Projects Releases Wiki Activity
439 Commits 5 Branches 63 Tags
cb449a1cd20dc3fcdbd10acffc1022652ffd6310
Commit Graph
8 Commits
Author SHA1 Message Date
Matt Guthaus 2e3e95efda Change ratio of delay line and RBL size. Need to tune it better automatically. 2018-02-14 16:50:08 -08:00
Matt Guthaus 9559421ca8 Connect dff array clk in rows and columns. 2018-02-14 16:46:26 -08:00
Matt Guthaus 2d87dcda46 dff array done except for clock net 2018-02-14 16:03:29 -08:00
Matt Guthaus 0804a1eceb Add new DFF. Create DFF module. Start dff_array, not tested. 2018-02-14 15:16:28 -08:00
mguthaus 767990ca3b Update golden lib tests. Add new generic SCMOS models. Fix tech error with new msflop_in_cap name. 2018-02-13 15:54:50 -08:00
Matt Guthaus f457091bba Fix typo in precharge. 2018-02-12 15:34:01 -08:00
Matt Guthaus e32b0b8f7a Change precharge input from clk to en 2018-02-12 15:32:47 -08:00
Matt Guthaus 7100d6f904 Organize top-level files into subdirs. 2018-02-09 10:25:24 -08:00
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