mirror of https://github.com/VLSIDA/OpenRAM.git
Fix typo in precharge.
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@ -35,7 +35,7 @@ class precharge(pgate.pgate):
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self.create_ptx()
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self.add_ptx()
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self.connect_poly()
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self.add_enk()
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self.add_en()
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self.add_nwell_and_contact()
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self.add_vdd_rail()
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self.add_bitlines()
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