luke
/
OpenRAM
mirror of https://github.com/VLSIDA/OpenRAM.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity
4,886 Commits 4 Branches 63 Tags 78 MiB
Commit Graph

4886 Commits

Author SHA1 Message Date
Marti Alonso 4f976bb9bd
Merge 21868f9de7 into c99b134deb 2026-01-22 14:29:50 +08:00
Matt Guthaus c99b134deb
Merge pull request #280 from Aurora7913/issue279 
Fix compatibility with numpy>=2.4.0
 2026-01-16 06:24:55 -08:00
Maarten Boersma e32f3164e4
fix typo 2026-01-16 15:05:30 +01:00
Maarten Boersma 7382ea7dda
fix #279: expliticly extract single number from numpy array to meet stricter numpy>=2.4.0 code hygiene 2026-01-16 15:05:28 +01:00
Matt Guthaus ce5595adf1
Merge pull request #275 from vikashpatel24/dev 
Fix for Missing lef_rom_interconnect in tech.py
 2025-10-17 09:46:49 -07:00
Vikash Patel b9bb6898af Fix for Missing lef_rom_interconnect in tech.py 2025-10-17 14:40:03 +05:30
Marti Alonso 21868f9de7 Consider spare columns when building liberty file 
Spare columns are considered as extra data bits, thus extra pins are
added. However, the data bus size on the liberty file only accounted for
the real data bits. This would cause pin size mismatch issues when using
such macros in OpenROAD and left the whole data port disconnected.

Fix it by properly setting the data bus size. Additionally, add the
spare_wen pins which were also missing.
 2025-08-15 23:48:31 +00:00
Matt Guthaus ea15a81443
Merge pull request #270 from hpretl/stable 
Switching from `volare` to `ciel` and bumping the version number
 2025-06-26 13:15:50 -07:00
Harald Pretl 9492349d7a Bump version 2025-06-26 21:21:13 +02:00
Harald Pretl 01686a2005 Switch from `volare` to `ciel` 2025-06-26 21:21:06 +02:00
Matthew Guthaus e63f70da5e Update README by removing slack and email group. Update website. 2025-04-01 10:44:49 -07:00
Jesse Cirimelli-Low 8104a42f0e
Update artifact action 2024-11-13 22:45:31 -08:00
mrg bc1cc36ade Merge branch 'whitespace_fix' of github.com:TristanRobitaille/OpenRAM into dev 2024-11-12 09:49:00 -08:00
mrg 3184e1d0e4 Merge branch 'add-doc' of github.com:FriedrichWu/OpenRAM into dev 2024-11-12 09:47:57 -08:00
FriedrichWu 7ec407314a add documentation 2024-11-11 16:18:45 +01:00
Tristan Robitaille 1f5fe62456 Added whitespace between : and 'minimum_period', '1kOhm' and 'min_pulse_width' as required by Liberty file standard 2024-11-10 14:31:52 +01:00
mrg 3f1f58065d Add nand4 leakage to sky130 tech 2024-07-01 10:14:43 -07:00
mole99 0937f86761 Disable check_lvsdrc for gf180mcu 2024-02-03 12:15:11 +01:00
mole99 85e242fa27 Add gf180mcu ROM example 2024-02-03 11:31:58 +01:00
vlsida-bot b6a6f12642 Bump version: 1.2.47 -> 1.2.48 2024-01-21 17:32:32 +00:00
Eren Dogan 306da8a895 Merge branch 'sky130_regress' into dev 2024-01-20 21:05:22 -08:00
Eren Dogan 0cf60a6a18 Give u+x permissions for rom tests 2024-01-20 17:49:52 -08:00
Eren Dogan 55e5c425e9 Fix same file error and enable passing tests 2024-01-20 08:38:18 -08:00
Eren Dogan 14c219d9f1 Enable working tests from disabled stamps 2024-01-19 15:16:30 -08:00
Eren Dogan 855139bc4e Add Makefile target to run broken tests only 2024-01-19 15:15:52 -08:00
vlsida-bot 0423f10926 Bump version: 1.2.46 -> 1.2.47 2024-01-19 15:39:54 +00:00
Eren Dogan 156eb4f0f7 Force install requirements in miniconda 2024-01-18 20:17:14 -08:00
Eren Dogan 18b19b8d9d Install dependencies before running regression 2024-01-18 14:59:33 -08:00
Eren Dogan 5081cf2383 Fix make target in regression 2024-01-18 14:45:44 -08:00
mole99 84020f13c6 Clarify OpenRAM installation 2024-01-18 23:24:22 +01:00
mole99 0861ea5632 Update documentation 2024-01-18 18:48:11 +01:00
mole99 daa6286a3a Use volare as PDK version manager 2024-01-18 18:44:03 +01:00
vlsida-bot e7dbf7443e Bump version: 1.2.45 -> 1.2.46 2024-01-04 11:31:14 +00:00
Eren Dogan 0a1de57cae Update copyright year 2024-01-03 14:32:44 -08:00
vlsida-bot fc37bf6859 Bump version: 1.2.44 -> 1.2.45 2023-12-21 20:03:42 +00:00
mole99 8032fa75a4 Add LEF output for ROM 2023-12-21 08:07:49 +01:00
vlsida-bot 05884cf6a7 Bump version: 1.2.43 -> 1.2.44 2023-12-21 01:03:55 +00:00
Hadir Khan 9d6052b86c fix for matching the layout vs verilog port names for rom 2023-12-20 15:30:07 -08:00
vlsida-bot caa9b2a2d8 Bump version: 1.2.42 -> 1.2.43 2023-12-20 18:07:25 +00:00
Eren Dogan e35f060d32 Use newer builds for trilinos and xyce 2023-12-20 08:30:36 -08:00
Eren Dogan efd43c3191 Merge branch 'dev' into issue_fix 2023-12-06 13:30:22 -08:00
Eren Dogan 7531e38cad Remove unused local variable 2023-12-05 11:18:58 -08:00
Eren Dogan 39a66fcb87 Fix some lint errors 2023-12-05 11:16:22 -08:00
Eren Dogan 6cfb22959c Remove unused imports 2023-12-05 11:08:32 -08:00
Eren Dogan 02810a0740 Prevent import error 2023-12-05 10:31:18 -08:00
vlsida-bot e73ff401fb Bump version: 1.2.41 -> 1.2.42 2023-11-08 03:28:12 +00:00
SWalker 6bd437cfa8 Fixed bug that made metal-metal vias think they were well contacts 2023-11-07 14:27:11 -08:00
SWalker d59a60eaf3 Update gitignore for gf180 2023-11-07 01:18:21 -08:00
SWalker b9570b8ddf removed gf180 specific code from ptx 2023-11-07 01:01:05 -08:00
SWalker 6e2dadeff5 added some documentation for GF180 usage 2023-11-07 01:00:44 -08:00