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4,998 Commits 5 Branches 63 Tags
4c93ec5608b2fb4e59139fcb902d8e13d559e92c
Commit Graph
10 Commits
Author SHA1 Message Date
Jesse Cirimelli-Low f3c1c5fbb2 Merge branch 'singleport_refactor' into array_gen 2025-02-24 23:26:28 -08:00
Eren Dogan 0a1de57cae Update copyright year 2024-01-03 14:32:44 -08:00
Jesse Cirimelli-Low 5a6c78865d singleport bitcell array laying out 2023-08-21 19:24:06 -07:00
mrg 56e14113aa Change rom_base_bank name and top pin names 2023-03-30 11:30:50 -07:00
Jacob Walker 41f0b9a412 rom compiler top level 2023-03-30 11:30:50 -07:00
Eren Dogan e5fc25da6f Update copyright year 2023-01-28 22:56:27 -08:00
Eren Dogan 6a4f6cbbed Move sram and sram_config to openram namespace 2022-12-02 15:28:06 -08:00
Eren Dogan 96e57507bf Add copyright check to code format test 2022-11-30 14:50:43 -08:00
Jesse Cirimelli-Low 3b02a8846d sky130 rba passing :) 2022-09-12 16:07:00 -07:00
mrg d92c7a634d Use packages for imports. 
Must set PYTHONPATH to include OPENRAM_HOME now.
Reorganizes subdirs as packages.
Rewrites unit tests to use packages.
Update README.md with instructions, dependencies etc.
Update sky130 module imports.
Change tech specific package from modules to custom.
 2022-07-13 15:55:57 -07:00