mrg
617bf302d1
Add option to remove wells. Save area in pgates with redundant wells.
2020-05-13 14:46:42 -07:00
mrg
c96a6d0b9d
Add no well option. Add stack gates vertical option.
2020-05-11 16:22:08 -07:00
mrg
b7c66d7e07
Changes to simplify metal preferred directions and pitches.
...
Changes to allow decoder height to be a 2x multiple of bitcell height.
Split of control logic tests.
Fixed track spacing in SRAM and channel router
PEP8 cleanup.
2020-05-10 11:32:45 -07:00
mrg
dd73afc983
Changes to allow decoder height to be a 2x multiple of bitcell height.
...
Convert to use li layer in pgates.
Fix multifinger devices with li layers.
Simplify wordline driver input routing.
Fix power pin direction option update.
PEP8 cleanup
Changes to simplify metal preferred directions and pitches.
Split of control logic tests.
2020-05-10 06:56:22 -07:00
mrg
fc85dfe29f
Add boundary to all pgates
2020-04-21 15:21:57 -07:00
Matt Guthaus
ed28b4983b
Clean up and generalize layer rules.
...
Convert metalN to mN.
Generalize helper constants in modules for
space, width, enclose, etc.
Use layer stacks whever possible.
Try to remove drc() calls in liu of helper constants.
2019-12-17 11:03:36 -08:00
Matt Guthaus
84c7146792
Fix some pep8 errors/warnings in pgate and examples.
2019-10-06 17:30:16 +00:00
Matt Guthaus
2b7025335c
Use pand2 of correct size. Simplify width checking of AND array.
2019-08-21 11:20:35 -07:00
Hunter Nichols
2ce7323838
Removed all unused analytical delay functions.
2019-08-06 17:09:25 -07:00
Matt Guthaus
ad35f8745e
Add direction to pins of all modules
2019-08-06 14:14:09 -07:00
Matt Guthaus
a234b0af88
Fix space before comment
2019-06-14 08:43:41 -07:00
Matt Guthaus
0f03553689
Update copyright to correct years.
2019-05-06 06:50:15 -07:00
Matt Guthaus
3f9a987e51
Update copyright. Add header to all OpenRAM files.
2019-04-26 12:33:53 -07:00
Matt Guthaus
05ad4285af
Cleanup pgate code.
...
Moved create_netlist and create_layout to the pgate class
from which everything is derived. Modified all pgates
to have consistent debug output and order of init function.
2019-04-26 12:30:42 -07:00
Hunter Nichols
1438519495
Added check to pdriver for 0 fanout which can break compute_sizes.
2019-04-03 17:53:28 -07:00
Hunter Nichols
97777475b4
Added additions to account for custom delay chains.
2019-03-28 17:16:23 -07:00
Hunter Nichols
0e96648211
Added linear corner factors in analytical delay model.
2019-03-04 00:42:18 -08:00
Hunter Nichols
5f01a52113
Fixed some delay model bugs.
2019-02-05 21:15:12 -08:00
Matt Guthaus
18805423e3
Simplify pdriver code.
2019-01-25 17:18:12 -08:00
Matt Guthaus
beceb3fb60
Fix buggy analytical delay in pdriver
2019-01-25 16:22:59 -08:00
Matt Guthaus
6f32bac1a2
Use rx of last pdriver instance after placing instances
2019-01-25 14:17:37 -08:00
Matt Guthaus
614aa54f17
Move clkbuf output lower to avoid dff outputs
2019-01-25 14:03:52 -08:00
Matt Guthaus
ddf734891a
Fix pdriver width error
2019-01-25 10:26:31 -08:00
Matt Guthaus
091b4e4c62
Add size commments to spize. Change pdriver stage effort.
2019-01-23 17:27:15 -08:00
Matt Guthaus
b58fd03083
Change pbuf/pinv to pdriver in control logic.
2019-01-23 12:03:52 -08:00
Matt Guthaus
a418431a42
First draft of sram_factory code
2019-01-16 16:15:38 -08:00
Jennifer Eve Sowash
bc44c80d40
Added height to init in pdriver.py
2018-12-13 19:03:31 -08:00
Jennifer Eve Sowash
a51aacfa90
Added corner case for 1 inv pos polarity and renamed variables.
2018-12-07 19:42:11 -08:00
Jennifer Eve Sowash
a6eec10f41
Passed freepdk45 tests with pdriver.py
2018-12-07 12:58:05 -08:00
Jennifer Eve Sowash
a24e5229cb
Fixed method of determining inverter number.
2018-12-07 10:19:18 -08:00
Jennifer Eve Sowash
653ab3eda4
Changed method of determining number of inverters.
2018-12-06 19:34:19 -08:00
Jennifer Eve Sowash
5e19cf1e24
Updated naming, added compute_sizes(), and fixed sizing function.
2018-12-06 14:36:01 -08:00
Jennifer Eve Sowash
2534a32e20
pdriver.py passes resgression tests. Size and number of inverters has been added.
2018-12-03 12:55:48 -08:00
Jennifer Sowash
887674aa85
Added pdriver.py for testing.
2018-12-03 09:11:12 -08:00