Emil J. Tywoniak f925de7dc4 techlibs, ffinit: signorm fixes

2026-09-18 17:37:03 +02:00

..

achronix

synth_achronix: remove classic ABC mapping

2026-08-19 11:42:59 +01:00

analogdevices

synth_analogdevices: remove classic ABC mapping

2026-08-19 11:42:59 +01:00

anlogic

synth_anlogic: remove classic ABC mapping

2026-08-19 11:42:59 +01:00

common

techlibs, ffinit: signorm fixes

2026-09-18 17:37:03 +02:00

easic

Migrate build system to CMake

2026-06-03 08:58:10 +00:00

efinix

synth_efinix: remove classic ABC mapping

2026-08-19 11:42:59 +01:00

fabulous

synth_fabulous: remove classic ABC mapping

2026-08-19 11:42:59 +01:00

gatemate

synth_gatemate: remove classic ABC mapping for LUTs

2026-08-20 09:33:47 +01:00

gowin

gowin: replace positional arguments in cells_sim.v with named

2026-09-17 15:43:54 +02:00

ice40

techlibs, ffinit: signorm fixes

2026-09-18 17:37:03 +02:00

intel

Revert "intel: register bram celltypes"

2026-09-17 15:43:55 +02:00

intel_alm

Revert "intel: register bram celltypes"

2026-09-17 15:43:55 +02:00

lattice

pmgen: hold sigmap pointer instead of owning it

2026-09-17 15:43:54 +02:00

microchip

pmgen: hold sigmap pointer instead of owning it

2026-09-17 15:43:54 +02:00

nanoxplore

synth_nanoxplore: remove classic ABC mapping

2026-08-19 11:42:59 +01:00

quicklogic

memory: declare blackbox ports for generated RAM cells

2026-09-18 17:29:46 +02:00

sf2

synth_sf2: remove classic ABC mapping

2026-08-19 11:42:59 +01:00

xilinx

xilinx_dsp: signorm compatibility

2026-09-17 15:43:54 +02:00

CMakeLists.txt

Merge pull request #6132 from YosysHQ/lofty/abc-refactor-12

2026-08-19 10:19:14 +00:00

fix_mod.py

Remove trailing whitespaces

2026-06-23 07:24:59 +02:00