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1798 Commits
Author SHA1 Message Date
nella c3c5388ed9 Clean up after bufnorm. 2026-09-21 16:57:53 +02:00
nella 5726f981fa Keep keep wires in abc. 2026-09-21 16:57:41 +02:00
nella c0f8629f7c Keep scopeinfo. 2026-09-21 16:57:41 +02:00
Lofty d85872386a Merge pull request #6174 from YosysHQ/lofty/abc-refactor-16 
abc9: migrate to write_xaiger2
 2026-09-14 16:25:07 +00:00
Miodrag Milanović ae86bbb130 Revert "Temporarily revert #6101 and #6077" 2026-09-10 09:09:13 +02:00
Miodrag Milanovic 9f75ca1f98 Release version 0.69 2026-09-09 07:26:44 +02:00
Miodrag Milanović f1442ce42e Merge pull request #6182 from YosysHQ/lofty/revert-read_xaiger2 
Temporarily revert #6101 and #6077
 2026-09-08 04:53:08 +00:00
Lofty 51583d854a Revert "Merge pull request #6077 from YosysHQ/lofty/abc-refactor-8" 
This reverts commit fd6367405e, reversing
changes made to 0f2bcb94b7.
 2026-09-07 17:29:08 +01:00
Lofty c53d452134 Revert "Merge pull request #6101 from YosysHQ/lofty/abc-refactor-10" 
This reverts commit 621d943ac8, reversing
changes made to 598862f45b.
 2026-09-04 11:16:11 +01:00
nella 0757499542 Handle inout and unresolved box port dirs. 2026-09-02 13:49:01 +02:00
Lofty b91ba79819 add comment 2026-09-02 11:23:05 +01:00
Lofty 07a1097f47 improve wording 2026-09-02 11:10:11 +01:00
Lofty 24c39f1121 clarify bad connection error message 2026-09-02 11:08:17 +01:00
nella 286ce13ff2 Use pre-bufnorm net name. 2026-09-02 11:47:24 +02:00
nick 3deb8f313e fix 6151 - adding error cases to formal backends / also adding test 
cases
 2026-09-01 14:34:28 -06:00
nella 262b9f59f6 Quieten box connection warnings. 2026-09-01 12:47:01 +01:00
nella 98dcab773b Lazy mux selects, detect cycles. 2026-09-01 12:47:01 +01:00
nella e741bd009f Add shift, mul, eqx to aiger2. 2026-09-01 12:47:01 +01:00
nella 569e454ccf Fix box models and output order. 2026-09-01 12:47:01 +01:00
nella 9a86e65d80 Order carry ports last. 2026-09-01 12:47:01 +01:00
nella 567a0f95de Emit a bit index on map2 box records. 2026-09-01 12:47:01 +01:00
Lofty a24214a38a fill out some scratchpad fields 2026-09-01 12:47:01 +01:00
nella 7cdcf7e3e0 Handle boxes without a whitebox model. 2026-09-01 12:47:01 +01:00
Zane Hambly bec454465f Merge branch 'main' into check-cells-backends 2026-08-20 21:42:56 +12:00
Lofty 621d943ac8 Merge pull request #6101 from YosysHQ/lofty/abc-refactor-10 
read_xaiger2: remove
 2026-08-17 17:42:25 +00:00
Catherine 81b04d3029 Merge pull request #6119 from Wren6991/fix-cxxrtl-looprotate 
CXXRTL: workaround LLVM regression in LoopRotatePass (fixes #4419)
 2026-08-14 15:05:07 +00:00
Luke Wren 2b96cc5d38 CXXRTL: workaround LLVM regression in LoopRotatePass (fixes #4419) 
Problem: LoopRotatePass applies a transformation to each loop which
has O(function size) cost due to invalidating some bookkeeping. CXXRTL
output is one huge function with thousands of loops. Most of these loops
are 1-trip but that doesn't help because loop elimination is after loop
rotation.

Fix is to add an `if` (with constexpr condition) for the common 1-word
case, to cause the loop to be DCE'd long before LoopRotatePass. This
does not seem to affect performance (at -O2) but reduces compile time
for Hazard by around 7.5x. Do this for the worst offenders: trunc, zext,
sext, rtrunc, rzext, which are used everywhere in slice and concat.

Arguably an upstream LLVM bug but it has been present since v18 at
least, so affects a lot of users.
 2026-08-14 14:25:30 +01:00
ZaneHam b7b8ea9784 smt2, btor: error on $check cells instead of dropping them 
Both backends only looked for $assert/$assume/$cover, so a $check cell was
never visited and the resulting formal output carried no proof obligations at
all. write_smv already errors via its catch-all; this follows its message.
 2026-08-14 00:15:34 +12:00
Emil J. Tywoniak 0253911ee2 opt_clean: move unused_bits analysis to kernel/unused_bits.h 2026-08-12 11:42:50 +02:00
Lofty 1dce7895e0 read_xaiger2: remove 2026-08-11 08:56:55 +01:00
Lofty fd6367405e Merge pull request #6077 from YosysHQ/lofty/abc-refactor-8 
abc_ops_reintegrate: xaiger2 compatibility
 2026-08-10 13:14:40 +00:00
Loftyandnella 7c7bc0c617 write_xaiger2: don't skip adding POs to map file 
Co-authored-by: nella <[email protected]>
 2026-08-05 11:48:31 +01:00
Janeczko Jakub d840a852a9 Fix typo in comment about address collision pattern 2026-08-04 06:44:05 +02:00
Jakub Janeczko 0b0f5cbf26 remove generic path width 2026-08-04 06:44:05 +02:00
Jakub Janeczko 533899ca7e format 2026-08-04 06:44:05 +02:00
Jakub Janeczko a95d626691 cleaner assign with transparency 2026-08-04 06:44:05 +02:00
Jakub Janeczko 2047506440 bypass part width is 1 2026-08-04 06:44:05 +02:00
Jakub Janeczko cf40dfabf5 new transparent memory verilog pattern 2026-08-04 06:44:05 +02:00
Miodrag Milanović 0955fcadab Merge pull request #5983 from YosysHQ/nak/write_btor_bweqx 
handle $bweqx in btor backend
 2026-08-03 14:34:39 +00:00
Lofty 6d9f5d1b0c wip 2026-08-03 12:34:01 +01:00
Miodrag Milanovic 2cb3d671d6 yosys-witness: give error on justice property, support only 'b' 2026-07-07 12:19:38 +02:00
N. Engelhardt b2fccbb52f handle $bewqx in btor backend 2026-06-23 08:57:09 +02:00
Miodrag Milanovic a689342207 Remove trailing whitespaces 2026-06-23 07:24:59 +02:00
Miodrag Milanovic 48a3dcc02a End of file fix 2026-06-23 07:23:41 +02:00
KrystalDelusion e20a9168fb Merge pull request #5971 from YosysHQ/krys/upto_indexing 
write_verilog: Fix upto indexing for single bit
 2026-06-22 23:04:16 +00:00
Miodrag Milanovic ebcbc06951 smtbmc: support latest bitwuzla 2026-06-22 08:40:16 +02:00
Krystine Sherwin 338d4adef2 write_verilog: Fix upto indexing for single bit 2026-06-19 10:18:27 +12:00
nella 5d7486115a Merge pull request #5887 from YosysHQ/nella/fix-signedness-4402 
Fix: `read_verilog` doesn't respect `signed` keyword
 2026-06-18 16:53:37 +00:00
N. Engelhardt 06201b857e Merge pull request #5892 from gipsyh/smt2 
smt2: use canonical SMT names in memory metadata
 2026-06-09 12:49:11 +00:00
Miodrag Milanović 78e05dfb00 Merge pull request #5894 from YosysHQ/gcc_16 
Bump CI to gcc-16 and fix warnings
 2026-06-03 12:07:45 +00:00