Source locations move off the attribute dict into a dedicated SrcRef on
AttrObject, interned in a per-design SrcPool that hash-conses sets of
location twines. Locations share their file prefix with each other through
the twine pool, and objects that fuse (opt_merge, share, ff/mem rewrites)
carry the union of their inputs' locations instead of a '|'-joined string.
write_rtlil emits an `srcs` section of location sets alongside `twines`;
read_rtlil resolves `\src "@N"` back to a handle and still accepts a plain
location string. -readable renders the locations as text.
run_fixed inferred a fixed length shift register from a chain of FDRE
flops but assigned it ENPOL 2, which the cells_map template reads as no
enable and ties the enable high. FDRE has an active high clock enable, so
the shift register shifted every cycle and ignored stalls. Give FDRE and
FDRE_1 chains ENPOL 1 so the active high enable is kept.
Add tests/arch/xilinx/xilinx_srl_enable.ys covering the FDRE path.
Move the operand commute that puts the wider operand on A ahead of the
min-width checks. Checking the min-widths first made an asymmetric rule
(DSP_A_MINWIDTH != DSP_B_MINWIDTH) match only products that already had the
wider operand on A; a product in the other order was rejected before the
normalization.
- with PCF support in nextpnr fabulous, `-iopad` is now the default
- supply further mapping using `-extra-plib`
Signed-off-by: Leo Moser <[email protected]>
- this allows to map to any memories
- to map legacy register files, use: `-extra-plib regfile.v -extra-mlibmap ram_regfile.txt -extra-map regfile_map.v`
Signed-off-by: Leo Moser <[email protected]>
The concept of 'COMPLEX_DFF' is deprecated. Instead, simply specify the supported flip-flops using `-ff <cell_type_pattern> <init_values>` and supply the mapping file.
Signed-off-by: Leo Moser <[email protected]>
Emil J. Tywoniak
nella
nella
Lofty
drewbabel
myrtle
Johan Olby
Leo Moser
Miodrag Milanovic
Catherine
Patrick Urban