Stefan Frederik 5b7cf39ead removed test structure in mos_power_ampli.sch		2020-12-14 16:37:23 +01:00
..
binto7seg	populating xschem git repo	2020-08-08 15:47:34 +02:00
devices	more consistent get_tok_value() regarding escaping	2020-11-29 01:59:17 +01:00
examples	removed test structure in mos_power_ampli.sch	2020-12-14 16:37:23 +01:00
gschem_import	populating xschem git repo	2020-08-08 15:47:34 +02:00
logic	cleanup in print_spice_element(), print_verilog_primitive(), print_vhdl_primitive(), print_tedax_element(), parselabel allows ~ in node names (XSPICE inversion operator)	2020-10-13 02:52:37 +02:00
ngspice	added flatten_savenodes.awk for flattening in-subcircuit .save instructions	2020-12-14 16:31:20 +01:00
pcb	allow ! in net names, it got deleted after the parselabel rework.	2020-12-13 20:26:39 +01:00
rom8k	some clarifications of steps to be taken to simulate example rom8k circuit	2020-10-08 23:24:27 +02:00
rulz-r8c33	"@#n:net_name" attribute (n = pin name or number) in symbols translates to net name attached to pin. "lab_show.sym" component that shows (does not assign) net name. "highlight=true" attribute can be given on instances in addition to symbols	2020-09-30 00:30:48 +02:00
symgen	removed unused files	2020-08-24 10:01:41 +02:00
xTAG	populating xschem git repo	2020-08-08 15:47:34 +02:00
Makefile	populating xschem git repo	2020-08-08 15:47:34 +02:00