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A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.
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Stefan Frederik dfef332fb5 Replace *.ipin/*.opin/*.iopin info lines with *.PININFO.... if LVS netlist is selected. Use absolute path of symbols in check_lib function. Make PNG export work if destination path contains spaces. 2021-06-12 00:54:09 +02:00
XSchemWin make_sym_lcc.awk: declare "value" as local variable inside process_box_line() to avoid clashes with global "value" 2021-06-05 08:58:38 +02:00
doc removed/updated obsolete keybinding descriptions, removed status check on Delete key events 2021-01-13 13:44:57 +01:00
scconfig make_sym_lcc.awk: declare "value" as local variable inside process_box_line() to avoid clashes with global "value" 2021-06-05 08:58:38 +02:00
src Replace *.ipin/*.opin/*.iopin info lines with *.PININFO.... if LVS netlist is selected. Use absolute path of symbols in check_lib function. Make PNG export work if destination path contains spaces. 2021-06-12 00:54:09 +02:00
tests redraw wire/line/rect/arc/poly rubbers after changing zoom/panning; do not wait for Motion events 2020-12-29 03:45:12 +01:00
xschem_library Joanne fixes for potential crash in align_sch_pins_with_sym() if there is a sym/sch pin number mismatch. Moved box declaration to beginning of scope block for C89 compatibility 2021-03-07 00:15:16 +01:00
.gitignore changed .gitignore for specific xschem files 2020-08-08 23:25:43 +02:00
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README.md

xschem

A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.

Manual and instructions