Replace *.ipin/*.opin/*.iopin info lines with *.PININFO.... if LVS netlist is selected. Use absolute path of symbols in check_lib function. Make PNG export work if destination path contains spaces.
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88456ca382
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dfef332fb5
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@ -354,7 +354,7 @@ void hash_wires(void)
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}
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/* return 0 if library path of s matches any lib name in tcl variable $xschem_libs */
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int check_lib(char *s)
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int check_lib(const char *s)
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{
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int range,i, found;
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char str[200]; /* overflow safe 20161122 */
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@ -177,7 +177,7 @@ void global_spice_netlist(int global) /* netlister driver */
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{
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if( strcmp(get_tok_value(xctx->sym[i].prop_ptr,"spice_ignore",0),"true")==0 ) continue;
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if(!xctx->sym[i].type) continue;
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if(strcmp(xctx->sym[i].type,"subcircuit")==0 && check_lib(xctx->sym[i].name))
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if(strcmp(xctx->sym[i].type,"subcircuit")==0 && check_lib(abs_sym_path(xctx->sym[i].name, "")))
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{
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/* xctx->sym can be SCH or SYM, use hash to avoid writing duplicate subckt */
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my_strdup(391, &subckt_name, get_cell(xctx->sym[i].name, 0));
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@ -372,7 +372,7 @@ void spice_block_netlist(FILE *fd, int i)
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void spice_netlist(FILE *fd, int spice_stop )
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{
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int i;
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int i, flag = 0;
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char *type=NULL;
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if(!spice_stop) {
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@ -388,9 +388,22 @@ void spice_netlist(FILE *fd, int spice_stop )
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}
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my_strdup(388, &type,(xctx->inst[i].ptr+ xctx->sym)->type);
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if( type && IS_PIN(type) ) {
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print_spice_element(fd, i) ; /* this is the element line */
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if(top_subckt && !flag) {
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fprintf(fd, "*.PININFO ");
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flag = 1;
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}
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if(top_subckt) {
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int d;
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if(!strcmp(type, "ipin")) d = 'I';
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if(!strcmp(type, "opin")) d = 'O';
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if(!strcmp(type, "iopin")) d = 'B';
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fprintf(fd, "%s:%c ",get_tok_value(xctx->inst[i].prop_ptr, "lab",0), d);
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} else {
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print_spice_element(fd, i) ; /* this is the element line */
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}
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}
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}
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if(top_subckt) fprintf(fd, "\n");
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for(i=0;i<xctx->instances;i++) /* ... then print other lines */
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{
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if( strcmp(get_tok_value(xctx->inst[i].prop_ptr,"spice_ignore",0),"true")==0 ) continue;
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@ -102,7 +102,7 @@ void global_tedax_netlist(int global) /* netlister driver */
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{
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if( strcmp(get_tok_value(xctx->sym[i].prop_ptr,"tedax_ignore",0),"true")==0 ) continue;
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if(!xctx->sym[i].type) continue;
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if(strcmp(xctx->sym[i].type,"subcircuit")==0 && check_lib(xctx->sym[i].name))
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if(strcmp(xctx->sym[i].type,"subcircuit")==0 && check_lib(abs_sym_path(xctx->sym[i].name, "")))
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{
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tedax_block_netlist(fd, i);
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}
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@ -293,7 +293,7 @@ void global_verilog_netlist(int global) /* netlister driver */
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{
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if( strcmp(get_tok_value(xctx->sym[i].prop_ptr,"verilog_ignore",0),"true")==0 ) continue;
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if(!xctx->sym[i].type) continue;
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if(strcmp(xctx->sym[i].type,"subcircuit")==0 && check_lib(xctx->sym[i].name)) {
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if(strcmp(xctx->sym[i].type,"subcircuit")==0 && check_lib(abs_sym_path(xctx->sym[i].name, ""))) {
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/* xctx->sym can be SCH or SYM, use hash to avoid writing duplicate subckt */
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my_strdup(328, &subckt_name, get_cell(xctx->sym[i].name, 0));
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if (str_hash_lookup(subckt_table, subckt_name, "", XLOOKUP)==NULL)
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@ -252,7 +252,7 @@ void global_vhdl_netlist(int global) /* netlister driver */
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if((
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strcmp(xctx->sym[j].type,"subcircuit")==0 ||
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strcmp(xctx->sym[j].type,"primitive")==0
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) && check_lib(xctx->sym[j].name)
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) && check_lib(abs_sym_path(xctx->sym[j].name, ""))
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)
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{
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/* xctx->sym can be SCH or SYM, use hash to avoid writing duplicate subckt */
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@ -345,7 +345,7 @@ void global_vhdl_netlist(int global) /* netlister driver */
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{
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if( strcmp(get_tok_value(xctx->sym[i].prop_ptr,"vhdl_ignore",0),"true")==0 ) continue;
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if(!xctx->sym[i].type) continue;
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if(strcmp(xctx->sym[i].type,"subcircuit")==0 && check_lib(xctx->sym[i].name))
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if(strcmp(xctx->sym[i].type,"subcircuit")==0 && check_lib(abs_sym_path(xctx->sym[i].name, "")))
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{
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/* xctx->sym can be SCH or SYM, use hash to avoid writing duplicate subckt */
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my_strdup(327, &subckt_name, get_cell(xctx->sym[i].name, 0));
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@ -526,7 +526,7 @@ void vhdl_block_netlist(FILE *fd, int i)
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strcmp(xctx->sym[j].type,"subcircuit")!=0))
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continue;
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if(( strcmp(xctx->sym[j].type,"subcircuit")==0 || strcmp(xctx->sym[j].type,"primitive")==0) &&
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check_lib(xctx->sym[j].name)
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check_lib(abs_sym_path(xctx->sym[j].name, ""))
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) {
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/* only print component declaration if used in current subcircuit */
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@ -843,7 +843,7 @@ extern void here(int i);
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extern void print_version(void);
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extern int set_netlist_dir(int force, char *dir);
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extern void netlist_options(int i);
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extern int check_lib(char * s);
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extern int check_lib(const char * s);
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extern void select_all(void);
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extern void change_linewidth(double w);
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extern void schematic_in_new_window(void);
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@ -194,14 +194,14 @@ proc netlist {source_file show netlist_file} {
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# 20161121
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proc convert_to_pdf {filename dest} {
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global to_pdf
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# puts "convert_to_pdf: $filename --> $dest"
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if { [regexp -nocase {\.pdf$} $dest] } {
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set pdffile [file rootname $filename].pdf
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set cmd "exec $to_pdf $filename $pdffile"
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# puts "---> $to_pdf $filename $pdffile"
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set cmd "exec $to_pdf \$filename \$pdffile"
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if {$::OS == "Windows"} {
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set cmd "exec $to_pdf $pdffile $filename"
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set cmd "exec $to_pdf \$pdffile \$filename"
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}
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if { ![catch $cmd msg] } {
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if { ![catch {eval $cmd} msg] } {
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file rename -force $pdffile $dest
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# ps2pdf succeeded, so remove original .ps file
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if { ![xschem get debug_var] } {
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@ -218,12 +218,12 @@ proc convert_to_pdf {filename dest} {
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# 20161121
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proc convert_to_png {filename dest} {
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global to_png tcl_debug
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# puts "---> $to_png $filename $destfile"
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set cmd "exec $to_png $filename png:$dest"
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# puts "---> $to_png $filename $dest"
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set cmd "exec $to_png \$filename png:\$dest"
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if {$::OS == "Windows"} {
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set cmd "exec $to_png $dest $filename"
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set cmd "exec $to_png \$dest \$filename"
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}
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if { ![catch $cmd msg] } {
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if { ![catch {eval $cmd} msg] } {
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# conversion succeeded, so remove original .xpm file
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if { ![xschem get debug_var] } {
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file delete $filename
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