Version bump

* Tests: use defined() to accept $expvalue==0

* Tests: Update expected stats of t_cast_huge in --vltmt mode

.github/ISSUE_TEMPLATE/bug_report.md

@@ -1,6 +1,6 @@
 ---
 name: Bug report
-about: Something isn't working as expected, and it isn't "Unsupported." (Note our contributor agreement at https://github.com/verilator/verilator/blob/master/docs/CONTRIBUTING.rst)
+about: Use this to report that something isn't working as expected, and it isn't "Unsupported." (Note our contributor agreement at https://github.com/verilator/verilator/blob/master/docs/CONTRIBUTING.rst)
 title: ''
 labels: new
 assignees: ''
@@ -15,4 +15,4 @@ What 'verilator --version' are you using?  Did you try it with the git master ve
 
 What OS and distribution are you using?
 
-Would you be willing to try to fix Verilator yourself with assistance?
+May we assist you in trying to fix this in Verilator yourself?

.github/ISSUE_TEMPLATE/feature.md

@@ -1,6 +1,6 @@
 ---
 name: Feature Request
-about: Request something should be supported, or a new feature added. (Note our contributor agreement at https://github.com/verilator/verilator/blob/master/docs/CONTRIBUTING.rst)
+about: Use this to request something should be supported, or a new feature added. (Note our contributor agreement at https://github.com/verilator/verilator/blob/master/docs/CONTRIBUTING.rst)
 title: ''
 labels: new
 assignees: ''
@@ -13,4 +13,4 @@ What would you like added/supported?
 
 Can you attach an example that runs on other simulators?  (Must be openly licensed, ideally in test_regress format.)
 
-May we assist you in trying to fix this yourself?
+May we assist you in trying to fix this in Verilator yourself?

.github/ISSUE_TEMPLATE/questions.md

@@ -1,6 +1,6 @@
 ---
 name: Q and A, or Other
-about: Ask a question, not related to a specific bug or feature request. (Note our contributor agreement at https://github.com/verilator/verilator/blob/master/docs/CONTRIBUTING.rst)
+about: Use this to ask a question, not related to a specific bug nor feature request. (Note our contributor agreement at https://github.com/verilator/verilator/blob/master/docs/CONTRIBUTING.rst)
 title: ''
 labels: new
 assignees: ''

CPPLINT.cfg

@@ -0,0 +1,17 @@
+set noparent
+linelength=100
+filter=-build/c++11
+filter=-build/header_guard
+filter=-build/include_order
+filter=-build/include_subdir
+filter=-readability/inheritance
+filter=-readability/nolint
+filter=-readability/todo
+filter=-runtime/references
+filter=-whitespace/blank_line
+filter=-whitespace/empty_if_body
+filter=-whitespace/indent
+filter=-whitespace/newline
+filter=-whitespace/braces
+filter=-whitespace/parens
+filter=-whitespace/todo

Changes

@@ -8,6 +8,72 @@ The changes in each Verilator version are described below.  The
 contributors that suggested a given feature are shown in []. Thanks!
 
 
+Verilator 4.220 2022-03-12
+==========================
+
+**Minor:**
+
+* Removed the deprecated lint_off flag -msg; use -rule instead.
+* Removed the deprecated "fl" attribute in XML output; use "loc" attribute instead.
+* Suppress WIDTH warning on negate using carry bit (#3295). [Peter Monsson]
+* Add trace dumpvars() call for selective runtime tracing (#3322). [Shunyao CAD]
+* Add VERILATOR_VERSION_INTEGER for determining API (#3343). [Larry Doolittle]
+* Improve various V3Combine algorithm details (#3328). [Yutetsu TAKATSUKASA]
+* Improve various V3Order algorithm details. [Geza Lore]
+* Fix macOS arm64 build (#3285) (#3291). [Guokai Chen]
+* Fix signed number operation (#3294) (#3308). [Raynard Qiao]
+* Fix FST traces to include vector range (#3296) (#3297). [Jamie Iles]
+* Fix skipping public enum values with four-state values (#3303).
+* Fix $readmem file not found to be warning not error (#3310). [Alexander Grobman]
+* Fix class stringification on wide arrays (#3312). [Iru Cai]
+* Fix $fscanf etc to return -1 on EOF (#3313). [Jose Tejada]
+* Fix public function arguments that are arrayed (#3316). [pawel256]
+* Fix unnamedblk error on foreach (#3321). [Aliaksei Chapyzhenka]
+* Fix crash in recursive module inlining (#3324). [Larry Doolittle]
+* Fix VL_RESTORER behavior on passing a lvalue reference (#3326). [HungMingWu]
+* Fix compile error with --trace-fst --sc (#3332). [leavinel]
+* Fix cast to array types (#3333). [Todd Strader]
+* Fix Vdeeptemp error with --threads and --compiler clang (#3338). [Per Karlsson]
+
+
+Verilator 4.218 2022-01-17
+==========================
+
+**Major:**
+
+* Primary inputs and outputs (VL_INW/VL_OUTW) now use VlWide type.
+  In general this should be backward compatible, but may lead to some
+  wrapper code needing changes.
+* Option --cdc is deprecated and is planned for removal,
+  file a bug if this is still being used.
+
+**Minor:**
+
+* Support class static members (#2233).
+* Support force/release (#2431) (#2593). [Shunyao CAD]
+* Add 'forceable' attribute to allow forcing from C++. (#3272). [Geza Lore, Shunyao CAD]
+* Support lower dimension looping in foreach loops (#3172). [Ehab Ibrahim]
+* Support up to 64 bit enums for .next/.prev/.name (#3244). [Alexander Grobman]
+* Reduce .rodata footprint of trace initialization (#3250). [Geza Lore, Shunyao CAD]
+* Support FST tracing in hierarchical Verilation (#3251). [Yutetsu TAKATSUKASA]
+* Use C++11 standard types for MacOS portability (#3254) (#3257). [Adrien Le Masle]
+* Fix make support for BSD ar (#2999) (#3256). [Julie Schwartz]
+* Fix bad ending address on $readmem (#3205). [Julie Schwartz]
+* Fix MSWIN compile error (#2681). [Unai Martinez-Corral]
+* Fix break under foreach loop (#3230).
+* Fix VL_STREAML_FAST_QQI with 64 bit left-hand-side (#3232) (#3235). [Adrien Le Masle]
+* Fix $sformat of inputs/outputs (#3236). [Adrien Le Masle]
+* Fix associative array first method as statement (#3228). [Adrien Le Masle]
+* Fix associative array foreach loop (#3229).
+* Fix $fclose not accepting expressions (#3237). [Julie Schwartz]
+* Fix $random not updating seed (#3238). [Julie Schwartz]
+* Fix top level param overwrite when package has same param (#3241) (#3247). [Adrien Le Masle]
+* Fix spurious UNUSED by ignoring inout pin connections (#3242). [Julie Schwartz]
+* Fix splitting of _eval and other top level functions. [Geza Lore, Shunyao CAD]
+* Fix internal error by inout port (#3258). [Yutetsu TAKATSUKASA]
+* Fix GCC 11 compile error (#3273). [HungMingWu]
+
+
 Verilator 4.216 2021-12-05
 ==========================
 
@@ -3762,7 +3828,7 @@ Verilator 0.0 1994-07-08
 Copyright
 =========
 
-Copyright 2001-2021 by Wilson Snyder. This program is free software; you
+Copyright 2001-2022 by Wilson Snyder. This program is free software; you
 can redistribute it and/or modify it under the terms of either the GNU
 Lesser General Public License Version 3 or the Perl Artistic License
 Version 2.0.

Makefile.in

@@ -7,7 +7,7 @@
 #
 #*****************************************************************************
 #
-# Copyright 2003-2021 by Wilson Snyder. This program is free software; you
+# Copyright 2003-2022 by Wilson Snyder. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.

README.rst

@@ -137,7 +137,7 @@ Related Projects
 Open License
 ============
 
-Verilator is Copyright 2003-2021 by Wilson Snyder. (Report bugs to
+Verilator is Copyright 2003-2022 by Wilson Snyder. (Report bugs to
 `Verilator Issues <https://verilator.org/issues>`_.)
 
 Verilator is free software; you can redistribute it and/or modify it under

bin/verilator

@@ -1,7 +1,7 @@
 #!/usr/bin/env perl
 ######################################################################
 #
-# Copyright 2003-2021 by Wilson Snyder. This program is free software; you
+# Copyright 2003-2022 by Wilson Snyder. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
@@ -459,7 +459,7 @@ description of these arguments.
 
 The latest version is available from L<https://verilator.org>.
 
-Copyright 2003-2021 by Wilson Snyder. This program is free software; you can
+Copyright 2003-2022 by Wilson Snyder. This program is free software; you can
 redistribute it and/or modify the Verilator internals under the terms of
 either the GNU Lesser General Public License Version 3 or the Perl Artistic
 License Version 2.0.

bin/verilator_ccache_report

@@ -14,7 +14,7 @@ parser = argparse.ArgumentParser(
     formatter_class=argparse.RawDescriptionHelpFormatter,
     description="""Report ccache behavior of a Verilated model build.""",
     epilog=
-    """Copyright 2002-2021 by Wilson Snyder. This program is free software; you
+    """Copyright 2002-2022 by Wilson Snyder. This program is free software; you
 can redistribute it and/or modify it under the terms of either the GNU
 Lesser General Public License Version 3 or the Perl Artistic License
 Version 2.0.

bin/verilator_coverage

@@ -1,7 +1,7 @@
 #!/usr/bin/env perl
 ######################################################################
 #
-# Copyright 2003-2021 by Wilson Snyder. This program is free software; you
+# Copyright 2003-2022 by Wilson Snyder. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
@@ -187,7 +187,7 @@ L<https://verilator.org/guide/latest/exe_verilator_coverage.html>.
 
 The latest version is available from L<https://verilator.org>.
 
-Copyright 2003-2021 by Wilson Snyder. This program is free software; you
+Copyright 2003-2022 by Wilson Snyder. This program is free software; you
 can redistribute it and/or modify the Verilator internals under the terms
 of either the GNU Lesser General Public License Version 3 or the Perl
 Artistic License Version 2.0.

bin/verilator_difftree

@@ -38,10 +38,10 @@ def diff_dir(a, b):
 
     anyfile = False
     for base in sorted(files.keys()):
+        if (not 'a' in files[base]) or (not 'b' in files[base]):
+            continue
         a = files[base]['a']
         b = files[base]['b']
-        if not a or not b:
-            continue
         print("=" * 70)
         print("= %s <-> %s" % (a, b))
         diff_file(a, b)
@@ -113,7 +113,7 @@ directories, ignoring irrelevant pointer differences.
 For documentation see
 https://verilator.org/guide/latest/exe_verilator_difftree.html
 
-Copyright 2005-2021 by Wilson Snyder. This program is free software; you
+Copyright 2005-2022 by Wilson Snyder. This program is free software; you
 can redistribute it and/or modify it under the terms of either the GNU
 Lesser General Public License Version 3 or the Perl Artistic License
 Version 2.0.

bin/verilator_gantt

@@ -463,7 +463,7 @@ parser = argparse.ArgumentParser(
 For documentation see
 https://verilator.org/guide/latest/exe_verilator_gantt.html
 
-Copyright 2018-2021 by Wilson Snyder. This program is free software; you
+Copyright 2018-2022 by Wilson Snyder. This program is free software; you
 can redistribute it and/or modify it under the terms of either the GNU
 Lesser General Public License Version 3 or the Perl Artistic License
 Version 2.0.

bin/verilator_includer

@@ -1,7 +1,7 @@
 #!/usr/bin/env perl
 # DESCRIPTION: Print include statements for each ARGV
 #
-# Copyright 2003-2021 by Wilson Snyder. This program is free software; you
+# Copyright 2003-2022 by Wilson Snyder. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.

bin/verilator_profcfunc

@@ -182,7 +182,7 @@ in each Verilog block.
 For documentation see
 https://verilator.org/guide/latest/exe_verilator_profcfunc.html
 
-Copyright 2002-2021 by Wilson Snyder. This program is free software; you
+Copyright 2002-2022 by Wilson Snyder. This program is free software; you
 can redistribute it and/or modify it under the terms of either the GNU
 Lesser General Public License Version 3 or the Perl Artistic License
 Version 2.0.

codecov.yml

@@ -1,6 +1,6 @@
 # DESCRIPTION: codecov.io config
 #
-# Copyright 2020-2021 by Wilson Snyder. This program is free software; you
+# Copyright 2020-2022 by Wilson Snyder. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.

configure.ac

@@ -1,13 +1,13 @@
 # DESCRIPTION: Process this file with autoconf to produce a configure script.
 #
-# Copyright 2003-2021 by Wilson Snyder. Verilator is free software; you
+# Copyright 2003-2022 by Wilson Snyder. Verilator is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU Lesser
 # General Public License Version 3 or the Perl Artistic License Version 2.0.
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 #AC_INIT([Verilator],[#.### YYYY-MM-DD])
 #AC_INIT([Verilator],[#.### devel])
-AC_INIT([Verilator],[4.216 2021-12-05],
+AC_INIT([Verilator],[4.220 2022-03-12],
         [https://verilator.org],
         [verilator],[https://verilator.org])
 # When releasing, also update header of Changes file
@@ -22,6 +22,8 @@ AC_MSG_RESULT([configuring for $PACKAGE_STRING])
 PACKAGE_VERSION_NUMBER=`AS_ECHO("$PACKAGE_VERSION") | sed 's/ .*//g'`
 AC_SUBST(PACKAGE_VERSION_NUMBER)
 AC_DEFINE_UNQUOTED([PACKAGE_VERSION_NUMBER_STRING],["$PACKAGE_VERSION_NUMBER"],[Package version as a number])
+VERILATOR_VERSION_INTEGER=`AS_ECHO("$PACKAGE_VERSION") | [sed 's/\([0-9]\)\.\([0-9][0-9][0-9]\) .*/\1\2000/g']`
+AC_SUBST(VERILATOR_VERSION_INTEGER)
 
 # Ignore automake flags passed by Ubuntu builds
 AC_ARG_ENABLE([dependency-tracking],
@@ -143,10 +145,10 @@ AC_SUBST(CFG_WITH_LONGTESTS)
 AC_MSG_RESULT($CFG_WITH_LONGTESTS)
 
 # Compiler flags (ensure they are not empty to avoid configure defaults)
-CFLAGS+=" "
-CPPFLAGS+=" "
-CXXFLAGS+=" "
-LDFLAGS+=" "
+CFLAGS="$CFLAGS "
+CPPFLAGS="$CPPFLAGS "
+CXXFLAGS="$CXXFLAGS "
+LDFLAGS="$LDFLAGS "
 
 # Checks for programs.
 AC_PROG_CC

docs/CONTRIBUTORS

@@ -3,12 +3,14 @@ under the Developer Certificate of Origin (https://developercertificate.org/).
 
 Please see the Verilator manual for 200+ additional contributors. Thanks to all.
 
+Adrien Le Masle
 Ahmed El-Mahmoudy
 Alex Chadwick
 Àlex Torregrosa
 Ameya Vikram Singh
 Andreas Kuster
 Chris Randall
+Chuxuan Wang
 Conor McCullough
 Dan Petrisko
 Daniel Bates
@@ -16,6 +18,7 @@ David Horton
 David Metz
 David Stanford
 David Turner
+Drew Ranck
 Drew Taussig
 Driss Hafdi
 Edgar E. Iglesias
@@ -27,9 +30,11 @@ Geza Lore
 Gianfranco Costamagna
 Glen Gibb
 Graham Rushton
+Guokai Chen
 Harald Heckmann
 Howard Su
 Huang Rui
+HungMingWu
 HyungKi Jeong
 Iru Cai
 Ivan Vnučec
@@ -38,6 +43,7 @@ James Hanlon
 James Hutchinson
 James Pallister
 Jamey Hicks
+Jamie Iles
 Jan Van Winkel
 Jean Berniolles
 Jeremy Bennett
@@ -53,6 +59,7 @@ Keith Colbert
 Kevin Kiningham
 Krzysztof Bieganski
 Kuba Ober
+Larry Doolittle
 Ludwig Rogiers
 Lukasz Dalek
 Maarten De Braekeleer
@@ -81,6 +88,7 @@ Pieter Kapsenberg
 Piotr Binkowski
 Qingyao Sun
 Rafal Kapuscik
+Raynard Qiao
 Richard Myers
 Rupert Swarbrick
 Samuel Riedel

docs/Makefile

@@ -5,7 +5,7 @@
 #
 # Code available from: https://verilator.org
 #
-# Copyright 2003-2021 by Wilson Snyder. This program is free software; you
+# Copyright 2003-2022 by Wilson Snyder. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.

docs/bin/vl_sphinx_extract

@@ -40,7 +40,7 @@ parser = argparse.ArgumentParser(
     formatter_class=argparse.RawDescriptionHelpFormatter,
     description="""Read a file and extract documentation data.""",
     epilog=
-    """ Copyright 2021-2021 by Wilson Snyder.  This package is free software;
+    """ Copyright 2021-2022 by Wilson Snyder.  This package is free software;
 you can redistribute it and/or modify it under the terms of either the GNU
 Lesser General Public License Version 3 or the Perl Artistic License
 Version 2.0.

docs/bin/vl_sphinx_fix

@@ -55,7 +55,7 @@ parser = argparse.ArgumentParser(
     formatter_class=argparse.RawDescriptionHelpFormatter,
     description="""Post-process Sphinx HTML.""",
     epilog=
-    """ Copyright 2021-2021 by Wilson Snyder.  This package is free software;
+    """ Copyright 2021-2022 by Wilson Snyder.  This package is free software;
 you can redistribute it and/or modify it under the terms of either the GNU
 Lesser General Public License Version 3 or the Perl Artistic License
 Version 2.0.

docs/guide/changes.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2021 by Wilson Snyder.
+.. Copyright 2003-2022 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 ****************

docs/guide/conf.py

@@ -36,7 +36,7 @@ def setup(app):
 # -- Project information
 
 project = 'Verilator'
-copyright = '2021 by Wilson Snyder, under LGPL-3.0 or Artistic-2.0'
+copyright = '2022 by Wilson Snyder, under LGPL-3.0 or Artistic-2.0'
 author = 'Wilson Snyder'
 
 # The master toctree document.

docs/guide/connecting.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2021 by Wilson Snyder.
+.. Copyright 2003-2022 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 .. _Connecting:
@@ -422,7 +422,7 @@ accesses the above signal "readme" would be:
 
 .. code-block:: bash
 
-     cat >sim_main.cpp <<'<<EOF'
+     cat >sim_main.cpp <<'EOF'
        #include "Vour.h"
        #include "verilated.h"
        #include "verilated_vpi.h"  // Required to get definitions

docs/guide/contributing.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2021 by Wilson Snyder.
+.. Copyright 2003-2022 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 *******************************

docs/guide/contributors.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2021 by Wilson Snyder.
+.. Copyright 2003-2022 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 ************************

docs/guide/copyright.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2021 by Wilson Snyder.
+.. Copyright 2003-2022 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 *********
@@ -8,7 +8,7 @@ Copyright
 The latest version of Verilator is available from `https://verilator.org
 <https://verilator.org>`_.
 
-Copyright 2003-2021 by Wilson Snyder. This program is free software; you
+Copyright 2003-2022 by Wilson Snyder. This program is free software; you
 can redistribute it and/or modify the Verilator internals under the terms
 of either the GNU Lesser General Public License Version 3 or the Perl
 Artistic License Version 2.0.

docs/guide/deprecations.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2021 by Wilson Snyder.
+.. Copyright 2003-2022 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 Deprecations
@@ -16,10 +16,6 @@ Verilated_heavy.h
   "verilated.h". Verilated_heavy.h is planned for removal no sooner than
   July 2022.
 
-Configuration File -msg
-  The :vlopt:`lint_off` "-msg" option has been replaced with the "-rule"
-  option.  "-msg" is planned for removal no sooner than January 2021.
-
-XML locations
-  The XML "fl" attribute has been replaced with the "loc" attribute.  "fl"
-  is planned for removal no sooner than January 2021.
+Option `--cdc`
+  The experimental `--cdc` option is believed to be generally unused and is
+  planned for removal no sooner than January 2023.

docs/guide/environment.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2021 by Wilson Snyder.
+.. Copyright 2003-2022 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 Environment

docs/guide/example_cc.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2021 by Wilson Snyder.
+.. Copyright 2003-2022 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 .. _Example C++ Execution:

docs/guide/example_common_install.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2021 by Wilson Snyder.
+.. Copyright 2003-2022 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 First you need Verilator installed, see :ref:`Installation`. In brief, if

docs/guide/example_dist.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2021 by Wilson Snyder.
+.. Copyright 2003-2022 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 .. _Examples in the Distribution:

docs/guide/example_sc.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2021 by Wilson Snyder.
+.. Copyright 2003-2022 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 .. _Example SystemC Execution:

docs/guide/examples.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2021 by Wilson Snyder.
+.. Copyright 2003-2022 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 .. _Examples:

docs/guide/exe_sim.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2021 by Wilson Snyder.
+.. Copyright 2003-2022 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 .. _Simulation Runtime Arguments:

docs/guide/exe_verilator.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2021 by Wilson Snyder.
+.. Copyright 2003-2022 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 verilator Arguments
@@ -884,7 +884,7 @@ Summary:
 
    Using DPI imports/exports is allowed and generally relatively safe in
    terms of information disclosed, which is limited to the DPI function
-   prototyptes.  Use of the VPI is not recommended as many design details
+   prototypes.  Use of the VPI is not recommended as many design details
    may be exposed, and an INSECURE warning will be issued.
 
 .. option:: --protect-lib <name>
@@ -1364,9 +1364,10 @@ Summary:
    .. note::
 
       This option applies only to values which are explicitly written as X
-      in the Verilog source code. Initial values of clocks are set to 0
-      unless `--x-initial-edge` is specified. Initial values of all other
-      state holding variables are controlled with `--x-initial`.
+      in modules (not classes) in the Verilog source code. Initial values
+      of clocks are set to 0 unless `--x-initial-edge` is
+      specified. Initial values of all other state holding variables are
+      controlled with `--x-initial`.
 
 .. option:: --x-initial 0
 
@@ -1513,7 +1514,7 @@ The grammar of configuration commands is as follows:
 .. option:: no_clocker -module "<modulename>" [-function "<funcname>"] -var "<signame>"
 
    Indicates that the signal is used as clock or not. This information is
-   used by Verilator to mark the signal and any derrived signals as
+   used by Verilator to mark the signal and any derived signals as
    clocker.  See :vlopt:`--clk`.
 
    Same as :option:`/*verilator&32;clocker*/` metacomment.
@@ -1528,6 +1529,14 @@ The grammar of configuration commands is as follows:
 
    Same as :option:`/*verilator&32;coverage_block_off*/` metacomment.
 
+.. option:: forceable -module "<modulename>" -var "<signame>"
+
+   Generate public `<signame>__VforceEn` and `<signame>__VforceVal` signals
+   that can be used to force/release a signal from C++ code. The force control
+   signals are created as :option:`public_flat` signals.
+
+   Same as :option:`/*verilator&32;forceable*/` metacomment.
+
 .. option:: full_case -file "<filename>" -lines <lineno>
 
 .. option:: parallel_case -file "<filename>" -lines <lineno>

docs/guide/exe_verilator_coverage.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2021 by Wilson Snyder.
+.. Copyright 2003-2022 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 verilator_coverage
@@ -67,7 +67,7 @@ which have low coverage are written to the output directory.
 
 Specifies if the coverage point does not include the count number of
 coverage hits, then the coverage point will be considered above the
-threashold, and the coverage report will put a "%" to indicate the coverage
+threshold, and the coverage report will put a "%" to indicate the coverage
 is not sufficient.  Defaults to 10.
 
 .. option:: --help

docs/guide/exe_verilator_gantt.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2021 by Wilson Snyder.
+.. Copyright 2003-2022 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 verilator_gantt
@@ -13,7 +13,7 @@ For an overview of use of verilator_gantt, see :ref:`Profiling`.
 Gantt Chart VCD
 ---------------
 
-Verilated_gnatt creates a value change dump (VCD) format dump file which
+Verilated_gantt creates a value change dump (VCD) format dump file which
 may be viewed in a waveform viewer (e.g. C<GTKWave>):
 
 .. figure:: figures/fig_gantt_min.png

docs/guide/exe_verilator_profcfunc.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2021 by Wilson Snyder.
+.. Copyright 2003-2022 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 verilator_profcfunc

docs/guide/executables.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2021 by Wilson Snyder.
+.. Copyright 2003-2022 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 *********************************

docs/guide/extensions.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2021 by Wilson Snyder.
+.. Copyright 2003-2022 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 *******************
@@ -185,7 +185,7 @@ or "`ifdef`"'s may break other tools.
 .. option:: /*verilator&32;no_clocker*/
 
    Specifies that the signal is used as clock or not. This information is
-   used by Verilator to mark the signal and any derrived signals as
+   used by Verilator to mark the signal and any derived signals as
    clocker.  See :vlopt:`--clk`.
 
    Same as :option:`clocker` and :option:`no_clocker` in configuration
@@ -209,6 +209,20 @@ or "`ifdef`"'s may break other tools.
    (if appropriate :vlopt:`--coverage` flags are passed) after being
    disabled earlier with :option:`/*verilator&32;coverage_off*/`.
 
+.. option:: /*verilator&32;forceable*/
+
+   Specifies that the signal (net or variable) should be made forceable from
+   C++ code by generating public `<signame>__VforceEn` and
+   `<signame>__VforceVal` signals The force control signals are created as
+   :option:`public_flat` signals.
+
+   To force a marked signal from C++, set the corresponding `__VforceVal`
+   variable to the desired value, and the `__VforceEn` signal to the bitmask
+   indicating which bits of the signal to force. To force all bits of the
+   target signal, set `__VforceEn` to all ones. To release the signal (or part
+   thereof), set appropriate bits of the `__VforceEn` signal to zero.
+
+   Same as :option:`forceable` in configuration  files.
 
 .. _verilator_hier_block:
 

docs/guide/faq.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2021 by Wilson Snyder.
+.. Copyright 2003-2022 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 ******************************
@@ -37,15 +37,15 @@ Does Verilator run under Windows?
 
 Yes, ideally run Ubuntu under Windows Subsystem for Linux (WSL2).
 Alternatively use Cygwin, though this tends to be slower and is not
-regurally tested.  Verilated output also compiles under Microsoft Visual
-C++, but this is also not regurally tested.
+regularly tested.  Verilated output also compiles under Microsoft Visual
+C++, but this is also not regularly tested.
 
 
 Can you provide binaries?
 """""""""""""""""""""""""
 
 You can install Verilator via the system package manager (apt, yum, etc.)
-on many Linux distributions, including Debian, Ubuntu, SuSE, RedHat, and
+on many Linux distributions, including Debian, Ubuntu, SuSE, Red Hat, and
 others.  These packages are provided by the Linux distributions and
 generally will lag the version of the mainline Verilator repository.  If no
 binary package is available for your distribution, how about you set one
@@ -134,7 +134,8 @@ B. Or, for finer-grained control, or C++ files with multiple Verilated
           ...
           Verilated::traceEverOn(true);
           VerilatedVcdC* tfp = new VerilatedVcdC;
-          topp->trace(tfp, 99);  // Trace 99 levels of hierarchy
+          topp->trace(tfp, 99);  // Trace 99 levels of hierarchy (or see below)
+          // tfp->dumpvars(1, "t");  // trace 1 level under "t"
           tfp->open("obj_dir/t_trace_ena_cc/simx.vcd");
           ...
           while (contextp->time() < sim_time && !contextp->gotFinish()) {

docs/guide/files.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2021 by Wilson Snyder.
+.. Copyright 2003-2022 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 *****
@@ -157,7 +157,7 @@ The Verilated executable may produce the following:
    * - profile.vlt
      - -profile data file for :ref:`Thread PGO`
    * - profile_threads.dat
-     - -profile-threads data file for :command:`verilator_gnatt`
+     - -profile-threads data file for :command:`verilator_gantt`
 
 Verilator_gantt may produce the following:
 

docs/guide/index.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2021 by Wilson Snyder.
+.. Copyright 2003-2022 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 ######################

docs/guide/install.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2021 by Wilson Snyder.
+.. Copyright 2003-2022 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 .. _Installation:
@@ -77,7 +77,7 @@ OS Requirements
 ---------------
 
 Verilator is developed and has primary testing on Ubuntu, with additional
-testing on FreeBSD and Apple OS-X. Versions have also built on Redhat
+testing on FreeBSD and Apple OS-X. Versions have also built on Red Hat
 Linux, and other flavors of GNU/Linux-ish platforms. Verilator also works
 on Windows Subsystem for Linux (WSL2), Windows under Cygwin, and Windows
 under MinGW (gcc -mno-cygwin). Verilated output (not Verilator itself)

docs/guide/languages.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2021 by Wilson Snyder.
+.. Copyright 2003-2022 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 ***************
@@ -136,7 +136,7 @@ ___05F (5F is the hex code of an underscore.)
 Bind
 ----
 
-sVerilator only supports bind to a target module name, not to an
+Verilator only supports bind to a target module name, not to an
 instance path.
 
 
@@ -336,6 +336,24 @@ Verilator does not support SEREs yet.  All assertion and coverage
 statements must be simple expressions that complete in one cycle.
 
 
+Force statement
+---------------
+
+Verilator supports the procedural `force` (and corresponding `release`)
+statement. The behavior of the `force` statement however does not entirely
+comply with the IEEE 1800 SystemVerilog standard. According to the standard,
+when a procedural statement of the form `force a = b;` is executed, the
+simulation should behave as if from that point onwards, a continuous
+assignment `assign a = b;` have been added to override the drivers of `a`.
+More specifically: the value of `a` should be updated, whenever the value of
+`b` changes, all the way until a `release a;` statement is executed.
+Verilator instead evaluates the current value of `b` at the time the `force`
+statement is executed, and forces `a` to that value, without updating it
+until a new `force` or `release` statement is encountered that applies to
+`a`. This non-standard behavior is nevertheless consistent with some other
+simulators.
+
+
 Encrypted Verilog
 -----------------
 

docs/guide/overview.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2021 by Wilson Snyder.
+.. Copyright 2003-2022 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 ********

docs/guide/simulating.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2021 by Wilson Snyder.
+.. Copyright 2003-2022 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 .. _Simulating:

docs/guide/verilating.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2021 by Wilson Snyder.
+.. Copyright 2003-2022 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 **********
@@ -68,7 +68,7 @@ multi-core SoC.
 
 Verilator is run in hierarchical mode on the whole SoC.  Verilator will
 make two models, one for the CPU hierarchy block, and one for the SoC.  The
-Verialted code for the SoC will automatically call the CPU Verilated model.
+Verilated code for the SoC will automatically call the CPU Verilated model.
 
 The current hierarchical Verilation is based on :vlopt:`--lib-create`. Each
 hierarchy block is Verilated into a library. User modules of the hierarchy

docs/guide/warnings.rst

@@ -1,4 +1,4 @@
-.. Copyright 2003-2021 by Wilson Snyder.
+.. Copyright 2003-2022 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
 *******************
@@ -447,7 +447,7 @@ List Of Warnings
               p0();
          endmodule
 
-   Other tools with similar warnings: Veriable's forbid_defparam_rule.
+   Other tools with similar warnings: Verible's forbid_defparam_rule.
 
 
 .. option:: DEPRECATED
@@ -518,7 +518,7 @@ List Of Warnings
    Another way DIDNOTCONVERGE may occur is if # delays are used to generate
    clocks.  Verilator ignores the delays and gives an :option:`ASSIGNDLY`
    or :option:`STMTDLY` warning.  If these were suppressed, due to the
-   absense of the delay, the code may now oscillate.
+   absence of the delay, the code may now oscillate.
 
    Finally, rare, more difficult cases can be debugged like a C++ program;
    either enter :command:`gdb` and use its tracing facilities, or edit the
@@ -528,7 +528,7 @@ List Of Warnings
 .. option:: ENDCAPSULATED
 
    Warns that a class member is declared is local or protected, but is
-   being accessed from outside that class (if local) or a derrived class
+   being accessed from outside that class (if local) or a derived class
    (if protected).
 
    Ignoring this warning will only suppress the lint check, it will
@@ -924,7 +924,7 @@ List Of Warnings
    simulate correctly.
 
    Other tools with similar warnings: Icarus Verilog's portbind, "warning:
-   Instantiating module ... with dangling impot port (...)". Slang's
+   Instantiating module ... with dangling input port (...)". Slang's
    unconnected-port, "port '...' has no connection".
 
 
@@ -1217,7 +1217,7 @@ List Of Warnings
    used to cause some important action at a later time, it might be an
    important difference.
 
-   Some possible work arounds:
+   Some possible workarounds:
 
    * Move the delayed statement into the C++ wrapper file, where the
      stimulus and clock generation can be done in C++.

docs/internals.rst

@@ -114,11 +114,11 @@ By convention, each function/method uses the variable ``nodep`` as a
 pointer to the ``AstNode`` currently being processed.
 
 
-``AstNVisitor``
+``VNVisitor``
 ^^^^^^^^^^^^^^^
 
 The passes are implemented by AST visitor classes. These are implemented by
-subclasses of the abstract class, ``AstNVisitor``. Each pass creates an
+subclasses of the abstract class, ``VNVisitor``. Each pass creates an
 instance of the visitor class, which in turn implements a method to perform
 the pass.
 
@@ -523,10 +523,10 @@ optimization passes. This allows separation of the pass algorithm from the
 AST on which it operates. Wikipedia provides an introduction to the concept
 at https://en.wikipedia.org/wiki/Visitor_pattern.
 
-As noted above, all visitors are derived classes of ``AstNVisitor``. All
+As noted above, all visitors are derived classes of ``VNVisitor``. All
 derived classes of ``AstNode`` implement the ``accept`` method, which takes
-as argument a reference to an instance or a ``AstNVisitor`` derived class
-and applies the visit method of the ``AstNVisitor`` to the invoking AstNode
+as argument a reference to an instance or a ``VNVisitor`` derived class
+and applies the visit method of the ``VNVisitor`` to the invoking AstNode
 instance (i.e. ``this``).
 
 One possible difficulty is that a call to ``accept`` may perform an edit
@@ -604,8 +604,8 @@ There are three ways data is passed between visitor functions.
 Iterators
 ---------
 
-``AstNVisitor`` provides a set of iterators to facilitate walking over
-the tree. Each operates on the current ``AstNVisitor`` class (as this)
+``VNVisitor`` provides a set of iterators to facilitate walking over
+the tree. Each operates on the current ``VNVisitor`` class (as this)
 and takes an argument type ``AstNode*``.
 
 ``iterate``
@@ -1183,7 +1183,7 @@ Verilator ideally would support all of IEEE, and has the goal to get close
 to full support. However the following IEEE sections and features are not
 anticipated to be ever implemented for the reasons indicated.
 
-IEEE 1800-2017 3.3 recursive modules
+IEEE 1800-2017 3.3 modules within modules
     Little/no tool support, and arguably not a good practice.
 IEEE 1800-2017 6.12 "shortreal"
     Little/no tool support, and easily simply promoted to real.
@@ -1208,7 +1208,7 @@ IEEE 1800-2017 33 Config
 Distribution
 ============
 
-Copyright 2008-2021 by Wilson Snyder. Verilator is free software; you can
+Copyright 2008-2022 by Wilson Snyder. Verilator is free software; you can
 redistribute it and/or modify it under the terms of either the GNU Lesser
 General Public License Version 3 or the Perl Artistic License Version 2.0.
 

docs/xml.rst

@@ -46,9 +46,6 @@ The XML document consists of 4 sections within the top level
    hierarchy. Each instance is represented with the ``<cell>`` element
    with the following attributes:
 
-   -  ``fl`` (deprecated): The file id and line number where the module
-      was instanced. Use ``loc`` instead.
-
    -  ``loc``: The file id, first line number, last line number, first
       column number and last column number of the identifier where the
       module was instanced, separated by commas.
@@ -73,7 +70,7 @@ The XML document consists of 4 sections within the top level
 Distribution
 ============
 
-Copyright 2020-2021 by Wilson Snyder. Verilator is free software; you can
+Copyright 2020-2022 by Wilson Snyder. Verilator is free software; you can
 redistribute it and/or modify it under the terms of either the GNU Lesser
 General Public License Version 3 or the Perl Artistic License Version 2.0.
 

examples/make_tracing_c/sim_main.cpp

@@ -103,8 +103,8 @@ int main(int argc, char** argv, char** env) {
         top->eval();
 
         // Read outputs
-        VL_PRINTF("[%" VL_PRI64 "d] clk=%x rstl=%x iquad=%" VL_PRI64 "x"
-                  " -> oquad=%" VL_PRI64 "x owide=%x_%08x_%08x\n",
+        VL_PRINTF("[%" PRId64 "] clk=%x rstl=%x iquad=%" PRIx64 " -> oquad=%" PRIx64
+                  " owide=%x_%08x_%08x\n",
                   contextp->time(), top->clk, top->reset_l, top->in_quad, top->out_quad,
                   top->out_wide[2], top->out_wide[1], top->out_wide[0]);
     }

include/gtkwave/fstapi.c

@@ -140,6 +140,10 @@ void **JenkinsIns(void *base_i, const unsigned char *mem, uint32_t length, uint3
 #include <sys/sysctl.h>
 #endif
 
+#if defined(FST_MACOSX) || defined(__MINGW32__) || defined(__OpenBSD__) || defined(__FreeBSD__)
+#define FST_UNBUFFERED_IO
+#endif
+
 #ifdef __GNUC__
 /* Boolean expression more often true than false */
 #define FST_LIKELY(x) __builtin_expect(!!(x), 1)
@@ -4577,12 +4581,11 @@ if(sectype == FST_BL_ZWRAPPER)
                 if(!fcomp) { tmpfile_close(&fcomp, &xc->f_nam); return(0); }
                 }
 
-#if defined(FST_MACOSX)
+#if defined(FST_UNBUFFERED_IO)
         setvbuf(fcomp, (char *)NULL, _IONBF, 0);   /* keeps gzip from acting weird in tandem with fopen */
 #endif
 
 #ifdef __MINGW32__
-        setvbuf(fcomp, (char *)NULL, _IONBF, 0);   /* keeps gzip from acting weird in tandem with fopen */
         xc->filename_unpacked = hf;
 #else
         if(hf)
@@ -4880,7 +4883,7 @@ if((!nam)||(!(xc->f=fopen(nam, "rb"))))
         char *hf = (char *)calloc(1, flen + 6);
         int rc;
 
-#if defined(__MINGW32__) || defined(FST_MACOSX)
+#if defined(FST_UNBUFFERED_IO)
         setvbuf(xc->f, (char *)NULL, _IONBF, 0);   /* keeps gzip from acting weird in tandem with fopen */
 #endif
 

include/verilated.cpp

@@ -3,7 +3,7 @@
 //
 // Code available from: https://verilator.org
 //
-// Copyright 2003-2021 by Wilson Snyder. This program is free software; you can
+// Copyright 2003-2022 by Wilson Snyder. This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.
@@ -168,6 +168,19 @@ void vl_stop_maybe(const char* filename, int linenum, const char* hier, bool may
 }
 #endif
 
+#ifndef VL_USER_WARN  ///< Define this to override the vl_warn function
+void vl_warn(const char* filename, int linenum, const char* hier, const char* msg) VL_MT_UNSAFE {
+    if (false && hier) {}
+    if (filename && filename[0]) {
+        // Not VL_PRINTF_MT, already on main thread
+        VL_PRINTF("%%Warning: %s:%d: %s\n", filename, linenum, msg);
+    } else {
+        VL_PRINTF("%%Warning: %s\n", msg);
+    }
+    Verilated::runFlushCallbacks();
+}
+#endif
+
 //===========================================================================
 // Wrapper to call certain functions via messages when multithreaded
 
@@ -201,6 +214,16 @@ void VL_FATAL_MT(const char* filename, int linenum, const char* hier, const char
 #endif
 }
 
+void VL_WARN_MT(const char* filename, int linenum, const char* hier, const char* msg) VL_MT_SAFE {
+#ifdef VL_THREADED
+    VerilatedThreadMsgQueue::post(VerilatedMsg{[=]() {  //
+        vl_warn(filename, linenum, hier, msg);
+    }});
+#else
+    vl_warn(filename, linenum, hier, msg);
+#endif
+}
+
 //===========================================================================
 // Debug prints
 
@@ -248,13 +271,13 @@ void VL_DBG_MSGF(const char* formatp, ...) VL_MT_SAFE {
     va_start(ap, formatp);
     const std::string out = _vl_string_vprintf(formatp, ap);
     va_end(ap);
-    // printf("-imm-V{t%d,%" VL_PRI64 "d}%s", VL_THREAD_ID(), _vl_dbg_sequence_number(),
+    // printf("-imm-V{t%d,%" PRId64 "}%s", VL_THREAD_ID(), _vl_dbg_sequence_number(),
     // out.c_str());
 
     // Using VL_PRINTF not VL_PRINTF_MT so that we can call VL_DBG_MSGF
     // from within the guts of the thread execution machinery (and it goes
     // to the screen and not into the queues we're debugging)
-    VL_PRINTF("-V{t%u,%" VL_PRI64 "u}%s", VL_THREAD_ID(), _vl_dbg_sequence_number(), out.c_str());
+    VL_PRINTF("-V{t%u,%" PRIu64 "}%s", VL_THREAD_ID(), _vl_dbg_sequence_number(), out.c_str());
 }
 
 #ifdef VL_THREADED
@@ -314,11 +337,17 @@ WDataOutP VL_RANDOM_W(int obits, WDataOutP outwp) VL_MT_SAFE {
     return outwp;
 }
 
-IData VL_RANDOM_SEEDED_II(IData seed) VL_MT_SAFE {
+IData VL_RANDOM_SEEDED_II(IData& seedr) VL_MT_SAFE {
+    // $random - seed is a new seed to apply, then we return new seed
+    Verilated::threadContextp()->randSeed(static_cast<int>(seedr));
+    seedr = VL_RANDOM_I();
+    return VL_RANDOM_I();
+}
+IData VL_URANDOM_SEEDED_II(IData seed) VL_MT_SAFE {
+    // $urandom - seed is a new seed to apply
     Verilated::threadContextp()->randSeed(static_cast<int>(seed));
     return VL_RANDOM_I();
 }
-
 IData VL_RAND_RESET_I(int obits) VL_MT_SAFE {
     if (Verilated::threadContextp()->randReset() == 0) return 0;
     IData data = ~0;
@@ -678,18 +707,17 @@ std::string _vl_vsformat_time(char* tmp, T ld, int timeunit, bool left, size_t w
             if (!fracDigits) {
                 digits = VL_SNPRINTF(tmp, VL_VALUE_STRING_MAX_WIDTH, "%s%s", ptr, suffix.c_str());
             } else {
-                digits = VL_SNPRINTF(tmp, VL_VALUE_STRING_MAX_WIDTH, "%s.%0*" VL_PRI64 "u%s", ptr,
+                digits = VL_SNPRINTF(tmp, VL_VALUE_STRING_MAX_WIDTH, "%s.%0*" PRIu64 "%s", ptr,
                                      fracDigits, VL_SET_QW(frac), suffix.c_str());
             }
         } else {
             const vluint64_t integer64 = VL_SET_QW(integer);
             if (!fracDigits) {
-                digits = VL_SNPRINTF(tmp, VL_VALUE_STRING_MAX_WIDTH, "%" VL_PRI64 "u%s", integer64,
+                digits = VL_SNPRINTF(tmp, VL_VALUE_STRING_MAX_WIDTH, "%" PRIu64 "%s", integer64,
                                      suffix.c_str());
             } else {
-                digits = VL_SNPRINTF(tmp, VL_VALUE_STRING_MAX_WIDTH,
-                                     "%" VL_PRI64 "u.%0*" VL_PRI64 "u%s", integer64, fracDigits,
-                                     VL_SET_QW(frac), suffix.c_str());
+                digits = VL_SNPRINTF(tmp, VL_VALUE_STRING_MAX_WIDTH, "%" PRIu64 ".%0*" PRIu64 "%s",
+                                     integer64, fracDigits, VL_SET_QW(frac), suffix.c_str());
             }
         }
     } else {
@@ -851,7 +879,7 @@ void _vl_vsformat(std::string& output, const char* formatp, va_list ap) VL_MT_SA
                     std::string append;
                     if (lbits <= VL_QUADSIZE) {
                         digits = VL_SNPRINTF(
-                            t_tmp, VL_VALUE_STRING_MAX_WIDTH, "%" VL_PRI64 "d",
+                            t_tmp, VL_VALUE_STRING_MAX_WIDTH, "%" PRId64,
                             static_cast<vlsint64_t>(VL_EXTENDS_QQ(lbits, lbits, ld)));
                         append = t_tmp;
                     } else {
@@ -880,8 +908,7 @@ void _vl_vsformat(std::string& output, const char* formatp, va_list ap) VL_MT_SA
                     int digits = 0;
                     std::string append;
                     if (lbits <= VL_QUADSIZE) {
-                        digits
-                            = VL_SNPRINTF(t_tmp, VL_VALUE_STRING_MAX_WIDTH, "%" VL_PRI64 "u", ld);
+                        digits = VL_SNPRINTF(t_tmp, VL_VALUE_STRING_MAX_WIDTH, "%" PRIu64, ld);
                         append = t_tmp;
                     } else {
                         append = VL_DECIMAL_NW(lbits, lwp);
@@ -1157,7 +1184,7 @@ IData _vl_vsscanf(FILE* fp,  // If a fscanf
                     _vl_vsss_read_str(fp, floc, fromp, fstr, t_tmp, "0123456789+-xXzZ?_");
                     if (!t_tmp[0]) goto done;
                     vlsint64_t ld = 0;
-                    std::sscanf(t_tmp, "%30" VL_PRI64 "d", &ld);
+                    std::sscanf(t_tmp, "%30" PRId64, &ld);
                     VL_SET_WQ(owp, ld);
                     break;
                 }
@@ -1182,7 +1209,7 @@ IData _vl_vsscanf(FILE* fp,  // If a fscanf
                     _vl_vsss_read_str(fp, floc, fromp, fstr, t_tmp, "0123456789+-xXzZ?_");
                     if (!t_tmp[0]) goto done;
                     QData ld = 0;
-                    std::sscanf(t_tmp, "%30" VL_PRI64 "u", &ld);
+                    std::sscanf(t_tmp, "%30" PRIu64, &ld);
                     VL_SET_WQ(owp, ld);
                     break;
                 }
@@ -1470,7 +1497,7 @@ void VL_FWRITEF(IData fpi, const char* formatp, ...) VL_MT_SAFE {
 IData VL_FSCANF_IX(IData fpi, const char* formatp, ...) VL_MT_SAFE {
     // While threadsafe, each thread can only access different file handles
     FILE* const fp = VL_CVT_I_FP(fpi);
-    if (VL_UNLIKELY(!fp)) return 0;
+    if (VL_UNLIKELY(!fp)) return ~0U;  // -1
 
     va_list ap;
     va_start(ap, formatp);
@@ -1616,7 +1643,7 @@ IData VL_VALUEPLUSARGS_INW(int rbits, const std::string& ld, WDataOutP rwp) VL_M
     switch (std::tolower(fmt)) {
     case 'd': {
         vlsint64_t lld = 0;
-        std::sscanf(dp, "%30" VL_PRI64 "d", &lld);
+        std::sscanf(dp, "%30" PRId64, &lld);
         VL_SET_WQ(rwp, lld);
         break;
     }
@@ -1817,7 +1844,7 @@ VlReadMem::VlReadMem(bool hex, int bits, const std::string& filename, QData star
     m_fp = std::fopen(filename.c_str(), "r");
     if (VL_UNLIKELY(!m_fp)) {
         // We don't report the Verilog source filename as it slow to have to pass it down
-        VL_FATAL_MT(filename.c_str(), 0, "", "$readmem file not found");
+        VL_WARN_MT(filename.c_str(), 0, "", "$readmem file not found");
         // cppcheck-suppress resourceLeak  // m_fp is nullptr - bug in cppcheck
         return;
     }
@@ -1876,6 +1903,7 @@ bool VlReadMem::get(QData& addrr, std::string& valuer) {
                 ignore_to_eol = true;
             } else if (c == '@') {
                 reading_addr = true;
+                m_anyAddr = true;
                 m_addr = 0;
             }
             // Check for hex or binary digits as file format requests
@@ -1902,9 +1930,9 @@ bool VlReadMem::get(QData& addrr, std::string& valuer) {
         lastc = c;
     }
 
-    if (VL_UNLIKELY(m_end != ~0ULL && m_addr <= m_end)) {
-        VL_FATAL_MT(m_filename.c_str(), m_linenum, "",
-                    "$readmem file ended before specified final address (IEEE 2017 21.4)");
+    if (VL_UNLIKELY(m_end != ~0ULL && m_addr <= m_end && !m_anyAddr)) {
+        VL_WARN_MT(m_filename.c_str(), m_linenum, "",
+                   "$readmem file ended before specified final address (IEEE 2017 21.4)");
     }
 
     return false;  // EOF
@@ -1969,7 +1997,7 @@ VlWriteMem::~VlWriteMem() {
 void VlWriteMem::print(QData addr, bool addrstamp, const void* valuep) {
     if (VL_UNLIKELY(!m_fp)) return;
     if (addr != m_addr && addrstamp) {  // Only assoc has time stamps
-        fprintf(m_fp, "@%" VL_PRI64 "x\n", addr);
+        fprintf(m_fp, "@%" PRIx64 "\n", addr);
     }
     m_addr = addr + 1;
     if (m_bits <= 8) {
@@ -2625,14 +2653,11 @@ void Verilated::debug(int level) VL_MT_SAFE {
     }
 }
 
-const char* Verilated::catName(const char* n1, const char* n2, int scopet,
-                               const char* delimiter) VL_MT_SAFE {
-    // Returns new'ed data
+const char* Verilated::catName(const char* n1, const char* n2, const char* delimiter) VL_MT_SAFE {
     // Used by symbol table creation to make module names
     static VL_THREAD_LOCAL char* t_strp = nullptr;
     static VL_THREAD_LOCAL size_t t_len = 0;
-    const size_t newlen
-        = std::strlen(n1) + std::strlen(n2) + std::strlen(delimiter) + (scopet > 0 ? 2 : 1);
+    const size_t newlen = std::strlen(n1) + std::strlen(n2) + std::strlen(delimiter) + 1;
     if (VL_UNLIKELY(!t_strp || newlen > t_len)) {
         if (t_strp) delete[] t_strp;
         t_strp = new char[newlen];
@@ -2640,8 +2665,6 @@ const char* Verilated::catName(const char* n1, const char* n2, int scopet,
     }
     char* dp = t_strp;
     for (const char* sp = n1; *sp;) *dp++ = *sp++;
-    // Add scope type
-    if (scopet) *dp++ = (char)(0x80 + scopet);
     for (const char* sp = delimiter; *sp;) *dp++ = *sp++;
     for (const char* sp = n2; *sp;) *dp++ = *sp++;
     *dp++ = '\0';

include/verilated.h

@@ -3,7 +3,7 @@
 //
 // Code available from: https://verilator.org
 //
-// Copyright 2003-2021 by Wilson Snyder. This program is free software; you can
+// Copyright 2003-2022 by Wilson Snyder. This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.
@@ -33,6 +33,7 @@
 
 // clang-format off
 #include "verilatedos.h"
+#include "verilated_config.h"
 #if VM_SC
 # include "verilated_sc.h"  // Get SYSTEMC_VERSION and time declarations
 #endif
@@ -86,6 +87,7 @@ class VerilatedCovContext;
 class VerilatedEvalMsgQueue;
 class VerilatedFst;
 class VerilatedFstC;
+class VerilatedFstSc;
 class VerilatedScope;
 class VerilatedScopeNameMap;
 class VerilatedVar;
@@ -823,8 +825,8 @@ public:
 public:
     // METHODS - INTERNAL USE ONLY (but public due to what uses it)
     // Internal: Create a new module name by concatenating two strings
-    static const char* catName(const char* n1, const char* n2, int scopet = 0,
-                               const char* delimiter = ".");  // Returns static data
+    // Returns pointer to thread-local static data (overwritten on next call)
+    static const char* catName(const char* n1, const char* n2, const char* delimiter = ".");
 
     // Internal: Throw signal assertion
     static void nullPointerError(const char* filename, int linenum) VL_ATTR_NORETURN VL_MT_SAFE;

include/verilated.mk.in

@@ -2,7 +2,7 @@
 ######################################################################
 # DESCRIPTION: Makefile commands for all verilated target files
 #
-# Copyright 2003-2021 by Wilson Snyder. This program is free software; you
+# Copyright 2003-2022 by Wilson Snyder. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
@@ -223,7 +223,9 @@ endif
 	$(info Archive $(AR) -rcs $@ $^)
 	$(foreach L, $(filter-out %.a,$^), $(shell echo $L >>[email protected]_deplist.tmp))
 	@if test $(words $(filter %.a,$^)) -eq 0; then \
-		$(AR) -rcs $@ @[email protected]_deplist.tmp; \
+		$(RM) -f $@; \
+		cat [email protected]_deplist.tmp | xargs $(AR) -rc $@; \
+		$(AR) -s $@; \
 	else \
 		$(RM) -rf [email protected]; \
 		for archive in $(filter %.a,$^); do \
@@ -232,7 +234,9 @@ endif
 			$(AR) -x ../../$${archive}; \
 			cd ../..; \
 		done; \
-		$(AR) -rcs $@ @[email protected]_deplist.tmp [email protected]/*/*.o; \
+		$(RM) -f $@; \
+		cat [email protected]_deplist.tmp | xargs $(AR) -rc $@; \
+		$(AR) -rcs $@ [email protected]/*/*.o; \
 	fi \
 	; $(RM) -rf [email protected]_deplist.tmp [email protected]
 

include/verilated.v

@@ -2,7 +2,7 @@
 //
 // Code available from: https://verilator.org
 //
-// Copyright 2003-2021 by Wilson Snyder. This program is free software; you can
+// Copyright 2003-2022 by Wilson Snyder. This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.

include/verilated_config.h.in

@@ -3,7 +3,7 @@
 //
 // Code available from: https://verilator.org
 //
-// Copyright 2003-2021 by Wilson Snyder. This program is free software; you can
+// Copyright 2003-2022 by Wilson Snyder. This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.
@@ -20,6 +20,11 @@
 // Autoconf substitutes this with the strings from AC_INIT.
 #define VERILATOR_PRODUCT "@PACKAGE_NAME@"
 
-/// Verilator version name, e.g. "1.000 2000-01-01"
+/// Verilator version name, e.g. "1.002 2000-01-01"
 // Autoconf substitutes this with the strings from AC_INIT.
 #define VERILATOR_VERSION "@PACKAGE_VERSION@"
+
+/// Verilator version number as integer
+/// As major * 100000 + minor * 1000, e.g. 1002000 == 1.002
+// Autoconf substitutes this with the strings from AC_INIT.
+#define VERILATOR_VERSION_INTEGER @VERILATOR_VERSION_INTEGER@

include/verilated_cov.cpp

@@ -3,7 +3,7 @@
 //
 // Code available from: https://verilator.org
 //
-// Copyright 2001-2021 by Wilson Snyder. This program is free software; you
+// Copyright 2001-2022 by Wilson Snyder. This program is free software; you
 // can redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.
@@ -29,6 +29,7 @@
 #include <deque>
 #include <fstream>
 #include <map>
+#include <utility>
 
 //=============================================================================
 // VerilatedCovConst
@@ -231,7 +232,7 @@ private:
         // Little selftest
 #define SELF_CHECK(got, exp) \
     do { \
-        if ((got) != (exp)) VL_FATAL_MT(__FILE__, __LINE__, "", "%Error: selftest\n"); \
+        if ((got) != (exp)) VL_FATAL_MT(__FILE__, __LINE__, "", "%Error: selftest"); \
     } while (0)
         SELF_CHECK(combineHier("a.b.c", "a.b.c"), "a.b.c");
         SELF_CHECK(combineHier("a.b.c", "a.b"), "a.b*");
@@ -358,7 +359,7 @@ public:
         Verilated::quiesce();
         const VerilatedLockGuard lock{m_mutex};
 #ifndef VM_COVERAGE
-        VL_FATAL_MT("", 0, "", "%Error: Called VerilatedCov::write when VM_COVERAGE disabled\n");
+        VL_FATAL_MT("", 0, "", "%Error: Called VerilatedCov::write when VM_COVERAGE disabled");
 #endif
         selftest();
 

include/verilated_cov.h

@@ -3,7 +3,7 @@
 //
 // Code available from: https://verilator.org
 //
-// Copyright 2001-2021 by Wilson Snyder. This program is free software; you
+// Copyright 2001-2022 by Wilson Snyder. This program is free software; you
 // can redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.

include/verilated_cov_key.h

@@ -3,7 +3,7 @@
 //
 // Code available from: https://verilator.org
 //
-// Copyright 2001-2021 by Wilson Snyder. This program is free software; you
+// Copyright 2001-2022 by Wilson Snyder. This program is free software; you
 // can redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.

include/verilated_dpi.cpp

@@ -3,7 +3,7 @@
 //
 // Code available from: https://verilator.org
 //
-// Copyright 2009-2021 by Wilson Snyder. This program is free software; you can
+// Copyright 2009-2022 by Wilson Snyder. This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.

include/verilated_dpi.h

@@ -3,7 +3,7 @@
 //
 // Code available from: https://verilator.org
 //
-// Copyright 2003-2021 by Wilson Snyder. This program is free software; you can
+// Copyright 2003-2022 by Wilson Snyder. This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.

include/verilated_fst_c.cpp

@@ -3,7 +3,7 @@
 //
 // Code available from: https://verilator.org
 //
-// Copyright 2001-2021 by Wilson Snyder. This program is free software; you
+// Copyright 2001-2022 by Wilson Snyder. This program is free software; you
 // can redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.
@@ -122,7 +122,7 @@ void VerilatedFst::open(const char* filename) VL_MT_SAFE_EXCLUDES(m_mutex) {
 
     // convert m_code2symbol into an array for fast lookup
     if (!m_symbolp) {
-        m_symbolp = new fstHandle[nextCode()];
+        m_symbolp = new fstHandle[nextCode()]{0};
         for (const auto& i : m_code2symbol) m_symbolp[i.first] = i.second;
     }
     m_code2symbol.clear();
@@ -158,18 +158,20 @@ void VerilatedFst::declDTypeEnum(int dtypenum, const char* name, vluint32_t elem
 }
 
 void VerilatedFst::declare(vluint32_t code, const char* name, int dtypenum, fstVarDir vardir,
-                           fstVarType vartype, bool array, int arraynum, int msb, int lsb) {
+                           fstVarType vartype, bool array, int arraynum, bool bussed, int msb,
+                           int lsb) {
     const int bits = ((msb > lsb) ? (msb - lsb) : (lsb - msb)) + 1;
 
-    VerilatedTrace<VerilatedFst>::declCode(code, bits, false);
+    const bool enabled = VerilatedTrace<VerilatedFst>::declCode(code, name, bits, false);
+    if (!enabled) return;
 
-    std::istringstream nameiss{name};
+    std::string nameasstr = namePrefix() + name;
+    std::istringstream nameiss{nameasstr};
     std::istream_iterator<std::string> beg(nameiss);
     std::istream_iterator<std::string> end;
     std::list<std::string> tokens(beg, end);  // Split name
     std::string symbol_name{tokens.back()};
     tokens.pop_back();  // Remove symbol name from hierarchy
-    tokens.insert(tokens.begin(), moduleName());  // Add current module to the hierarchy
     std::string tmpModName;
 
     // Find point where current and new scope diverge
@@ -195,9 +197,9 @@ void VerilatedFst::declare(vluint32_t code, const char* name, int dtypenum, fstV
             // If the scope ends with a non-ascii character, it will be 0x80 + fstScopeType
             fstWriterSetScope(m_fst, static_cast<fstScopeType>(new_it->back() & 0x7f),
                               tmpModName.c_str(), nullptr);
-        } else
+        } else {
             fstWriterSetScope(m_fst, FST_ST_VCD_SCOPE, new_it->c_str(), nullptr);
-
+        }
         m_curScope.push_back(*new_it);
         new_it = tokens.erase(new_it);
     }
@@ -205,6 +207,7 @@ void VerilatedFst::declare(vluint32_t code, const char* name, int dtypenum, fstV
     std::stringstream name_ss;
     name_ss << symbol_name;
     if (array) name_ss << "[" << arraynum << "]";
+    if (bussed) name_ss << " [" << msb << ":" << lsb << "]";
     std::string name_str = name_ss.str();
 
     if (dtypenum > 0) {
@@ -223,23 +226,23 @@ void VerilatedFst::declare(vluint32_t code, const char* name, int dtypenum, fstV
 
 void VerilatedFst::declBit(vluint32_t code, const char* name, int dtypenum, fstVarDir vardir,
                            fstVarType vartype, bool array, int arraynum) {
-    declare(code, name, dtypenum, vardir, vartype, array, arraynum, 0, 0);
+    declare(code, name, dtypenum, vardir, vartype, array, arraynum, false, 0, 0);
 }
 void VerilatedFst::declBus(vluint32_t code, const char* name, int dtypenum, fstVarDir vardir,
                            fstVarType vartype, bool array, int arraynum, int msb, int lsb) {
-    declare(code, name, dtypenum, vardir, vartype, array, arraynum, msb, lsb);
+    declare(code, name, dtypenum, vardir, vartype, array, arraynum, true, msb, lsb);
 }
 void VerilatedFst::declQuad(vluint32_t code, const char* name, int dtypenum, fstVarDir vardir,
                             fstVarType vartype, bool array, int arraynum, int msb, int lsb) {
-    declare(code, name, dtypenum, vardir, vartype, array, arraynum, msb, lsb);
+    declare(code, name, dtypenum, vardir, vartype, array, arraynum, true, msb, lsb);
 }
 void VerilatedFst::declArray(vluint32_t code, const char* name, int dtypenum, fstVarDir vardir,
                              fstVarType vartype, bool array, int arraynum, int msb, int lsb) {
-    declare(code, name, dtypenum, vardir, vartype, array, arraynum, msb, lsb);
+    declare(code, name, dtypenum, vardir, vartype, array, arraynum, true, msb, lsb);
 }
 void VerilatedFst::declDouble(vluint32_t code, const char* name, int dtypenum, fstVarDir vardir,
                               fstVarType vartype, bool array, int arraynum) {
-    declare(code, name, dtypenum, vardir, vartype, array, arraynum, 63, 0);
+    declare(code, name, dtypenum, vardir, vartype, array, arraynum, false, 63, 0);
 }
 
 // Note: emit* are only ever called from one place (full* in
@@ -248,12 +251,14 @@ void VerilatedFst::declDouble(vluint32_t code, const char* name, int dtypenum, f
 
 VL_ATTR_ALWINLINE
 void VerilatedFst::emitBit(vluint32_t code, CData newval) {
+    VL_DEBUG_IFDEF(assert(m_symbolp[code]););
     fstWriterEmitValueChange(m_fst, m_symbolp[code], newval ? "1" : "0");
 }
 
 VL_ATTR_ALWINLINE
 void VerilatedFst::emitCData(vluint32_t code, CData newval, int bits) {
     char buf[VL_BYTESIZE];
+    VL_DEBUG_IFDEF(assert(m_symbolp[code]););
     cvtCDataToStr(buf, newval << (VL_BYTESIZE - bits));
     fstWriterEmitValueChange(m_fst, m_symbolp[code], buf);
 }
@@ -261,6 +266,7 @@ void VerilatedFst::emitCData(vluint32_t code, CData newval, int bits) {
 VL_ATTR_ALWINLINE
 void VerilatedFst::emitSData(vluint32_t code, SData newval, int bits) {
     char buf[VL_SHORTSIZE];
+    VL_DEBUG_IFDEF(assert(m_symbolp[code]););
     cvtSDataToStr(buf, newval << (VL_SHORTSIZE - bits));
     fstWriterEmitValueChange(m_fst, m_symbolp[code], buf);
 }
@@ -268,6 +274,7 @@ void VerilatedFst::emitSData(vluint32_t code, SData newval, int bits) {
 VL_ATTR_ALWINLINE
 void VerilatedFst::emitIData(vluint32_t code, IData newval, int bits) {
     char buf[VL_IDATASIZE];
+    VL_DEBUG_IFDEF(assert(m_symbolp[code]););
     cvtIDataToStr(buf, newval << (VL_IDATASIZE - bits));
     fstWriterEmitValueChange(m_fst, m_symbolp[code], buf);
 }
@@ -275,6 +282,7 @@ void VerilatedFst::emitIData(vluint32_t code, IData newval, int bits) {
 VL_ATTR_ALWINLINE
 void VerilatedFst::emitQData(vluint32_t code, QData newval, int bits) {
     char buf[VL_QUADSIZE];
+    VL_DEBUG_IFDEF(assert(m_symbolp[code]););
     cvtQDataToStr(buf, newval << (VL_QUADSIZE - bits));
     fstWriterEmitValueChange(m_fst, m_symbolp[code], buf);
 }

include/verilated_fst_c.h

@@ -3,7 +3,7 @@
 //
 // Code available from: https://verilator.org
 //
-// Copyright 2001-2021 by Wilson Snyder. This program is free software; you
+// Copyright 2001-2022 by Wilson Snyder. This program is free software; you
 // can redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.
@@ -54,7 +54,7 @@ private:
     // CONSTRUCTORS
     VL_UNCOPYABLE(VerilatedFst);
     void declare(vluint32_t code, const char* name, int dtypenum, fstVarDir vardir,
-                 fstVarType vartype, bool array, int arraynum, int msb, int lsb);
+                 fstVarType vartype, bool array, int arraynum, bool bussed, int msb, int lsb);
 
 protected:
     //=========================================================================
@@ -121,6 +121,7 @@ template <> void VerilatedTrace<VerilatedFst>::set_time_unit(const char* unitp);
 template <> void VerilatedTrace<VerilatedFst>::set_time_unit(const std::string& unit);
 template <> void VerilatedTrace<VerilatedFst>::set_time_resolution(const char* unitp);
 template <> void VerilatedTrace<VerilatedFst>::set_time_resolution(const std::string& unit);
+template <> void VerilatedTrace<VerilatedFst>::dumpvars(int level, const std::string& hier);
 #endif
 
 //=============================================================================
@@ -139,7 +140,7 @@ public:
     explicit VerilatedFstC(void* filep = nullptr)
         : m_sptrace{filep} {}
     /// Destruct, flush, and close the dump
-    ~VerilatedFstC() { close(); }
+    virtual ~VerilatedFstC() { close(); }
 
     // METHODS - User called
 
@@ -178,9 +179,14 @@ public:
     void set_time_resolution(const std::string& unit) VL_MT_SAFE {
         m_sptrace.set_time_resolution(unit);
     }
+    // Set variables to dump, using $dumpvars format
+    // If level = 0, dump everything and hier is then ignored
+    void dumpvars(int level, const std::string& hier) VL_MT_SAFE {
+        m_sptrace.dumpvars(level, hier);
+    }
 
     // Internal class access
-    inline VerilatedFst* spTrace() { return &m_sptrace; };
+    inline VerilatedFst* spTrace() { return &m_sptrace; }
 };
 
 #endif  // guard

include/verilated_fst_sc.cpp

@@ -3,7 +3,7 @@
 //
 // THIS MODULE IS PUBLICLY LICENSED
 //
-// Copyright 2001-2021 by Wilson Snyder. This program is free software; you
+// Copyright 2001-2022 by Wilson Snyder. This program is free software; you
 // can redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.
@@ -27,6 +27,17 @@
 //======================================================================
 //======================================================================
 
+void VerilatedFstSc::open(const char* filename) {
+    if (!sc_core::sc_get_curr_simcontext()->elaboration_done()) {
+        vl_fatal(__FILE__, __LINE__, "VerilatedFstSc",
+                 ("%Error: VerilatedFstSc::open(\"" + std::string(filename)
+                  + "\") is called before sc_core::sc_start(). "
+                    "Run sc_core::sc_start(sc_core::SC_ZERO_TIME) before opening a wave file.")
+                     .c_str());
+    }
+    VerilatedFstC::open(filename);
+}
+
 //--------------------------------------------------
 // SystemC 2.1.v1
 // cppcheck-suppress unusedFunction

include/verilated_fst_sc.h

@@ -1,7 +1,7 @@
 // -*- mode: C++; c-file-style: "cc-mode" -*-
 //=============================================================================
 //
-// Copyright 2001-2021 by Wilson Snyder. This program is free software; you can
+// Copyright 2001-2022 by Wilson Snyder. This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.
@@ -26,6 +26,8 @@
 #include "verilated_sc.h"
 #include "verilated_fst_c.h"
 
+#include <string>
+
 //=============================================================================
 // VerilatedFstSc
 ///
@@ -57,6 +59,9 @@ public:
         if (!delta_cycle) { this->dump(sc_time_stamp().to_double()); }
     }
 
+    // Override VerilatedFstC. Must be called after starting simulation.
+    virtual void open(const char* filename) /*override*/ VL_MT_SAFE;
+
 private:
     /// Fake outs for linker
 

include/verilated_funcs.h

@@ -3,7 +3,7 @@
 //
 // Code available from: https://verilator.org
 //
-// Copyright 2003-2021 by Wilson Snyder. This program is free software; you can
+// Copyright 2003-2022 by Wilson Snyder. This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.
@@ -28,6 +28,8 @@
 #error "verilated_funcs.h should only be included by verilated.h"
 #endif
 
+#include <string>
+
 //=========================================================================
 // Extern functions -- User may override -- See verilated.cpp
 
@@ -43,12 +45,17 @@ extern void vl_finish(const char* filename, int linenum, const char* hier);
 /// Verilator internal code must call VL_FINISH_MT instead, which eventually calls this.
 extern void vl_stop(const char* filename, int linenum, const char* hier);
 
-/// Routine to call for a couple of fatal messages
+/// Routine to call for fatal messages
 /// User code may wish to replace this function, to do so, define VL_USER_FATAL.
 /// This code does not have to be thread safe.
 /// Verilator internal code must call VL_FINISH_MT instead, which eventually calls this.
 extern void vl_fatal(const char* filename, int linenum, const char* hier, const char* msg);
 
+/// Routine to call for warning messages
+/// User code may wish to replace this function, to do so, define VL_USER_WARN.
+/// This code does not have to be thread safe.
+extern void vl_warn(const char* filename, int linenum, const char* hier, const char* msg);
+
 //=========================================================================
 // Extern functions -- Slow path
 
@@ -57,9 +64,12 @@ extern void VL_FINISH_MT(const char* filename, int linenum, const char* hier) VL
 /// Multithread safe wrapper for calls to $stop
 extern void VL_STOP_MT(const char* filename, int linenum, const char* hier,
                        bool maybe = true) VL_MT_SAFE;
-/// Multithread safe wrapper to call for a couple of fatal messages
+/// Multithread safe wrapper to call for fatal messages
 extern void VL_FATAL_MT(const char* filename, int linenum, const char* hier,
                         const char* msg) VL_MT_SAFE;
+/// Multithread safe wrapper to call for warning messages
+extern void VL_WARN_MT(const char* filename, int linenum, const char* hier,
+                       const char* msg) VL_MT_SAFE;
 
 // clang-format off
 /// Print a string, multithread safe. Eventually VL_PRINTF will get called.
@@ -77,7 +87,8 @@ extern void VL_DBG_MSGF(const char* formatp, ...) VL_ATTR_PRINTF(1) VL_MT_SAFE;
 inline IData VL_RANDOM_I() VL_MT_SAFE { return vl_rand64(); }
 inline QData VL_RANDOM_Q() VL_MT_SAFE { return vl_rand64(); }
 extern WDataOutP VL_RANDOM_W(int obits, WDataOutP outwp);
-extern IData VL_RANDOM_SEEDED_II(IData seed) VL_MT_SAFE;
+extern IData VL_RANDOM_SEEDED_II(IData& seedr) VL_MT_SAFE;
+extern IData VL_URANDOM_SEEDED_II(IData seed) VL_MT_SAFE;
 inline IData VL_URANDOM_RANGE_I(IData hi, IData lo) {
     const vluint64_t rnd = vl_rand64();
     if (VL_LIKELY(hi > lo)) {
@@ -151,10 +162,6 @@ extern const char* vl_mc_scan_plusargs(const char* prefixp);  // PLIish
 // Base macros
 
 // Return true if data[bit] set; not 0/1 return, but 0/non-zero return.
-#define VL_BITISSET_I(data, bit) ((data) & (VL_UL(1) << VL_BITBIT_I(bit)))
-#define VL_BITISSET_Q(data, bit) ((data) & (1ULL << VL_BITBIT_Q(bit)))
-#define VL_BITISSET_E(data, bit) ((data) & (VL_EUL(1) << VL_BITBIT_E(bit)))
-#define VL_BITISSET_W(data, bit) ((data)[VL_BITWORD_E(bit)] & (VL_EUL(1) << VL_BITBIT_E(bit)))
 #define VL_BITISSETLIMIT_W(data, width, bit) (((bit) < (width)) && VL_BITISSET_W(data, bit))
 
 // Shift appropriate word by bit. Does not account for wrapping between two words
@@ -332,13 +339,19 @@ double vl_time_multiplier(int scale) VL_PURE;
 vluint64_t vl_time_pow10(int n) VL_PURE;
 
 #ifdef VL_DEBUG
-/// Evaluate statement if Verilated::debug() enabled
+/// Evaluate statement if VL_DEBUG defined
+# define VL_DEBUG_IFDEF(stmt) \
+    do { \
+        stmt \
+    } while (false)
+/// Evaluate statement if VL_DEBUG defined and Verilated::debug() enabled
 # define VL_DEBUG_IF(stmt) \
     do { \
         if (VL_UNLIKELY(Verilated::debug())) {stmt} \
     } while (false)
 #else
 // We intentionally do not compile the stmt to improve compile speed
+# define VL_DEBUG_IFDEF(stmt) do {} while (false)
 # define VL_DEBUG_IF(stmt) do {} while (false)
 #endif
 
@@ -1430,7 +1443,7 @@ static inline QData VL_STREAML_FAST_QQI(int lbits, QData ld, IData rd_log2) VL_P
     if (rd_log2) {
         const vluint32_t lbitsFloor = lbits & ~VL_MASK_I(rd_log2);
         const vluint32_t lbitsRem = lbits - lbitsFloor;
-        const QData msbMask = VL_MASK_Q(lbitsRem) << lbitsFloor;
+        const QData msbMask = lbitsFloor == 64 ? 0ULL : VL_MASK_Q(lbitsRem) << lbitsFloor;
         ret = (ret & ~msbMask) | ((ret & msbMask) << ((1ULL << rd_log2) - lbitsRem));
     }
     switch (rd_log2) {
@@ -1781,7 +1794,7 @@ static inline WDataOutP VL_SHIFTRS_WWW(int obits, int lbits, int rbits, WDataOut
                                        WDataInP const lwp, WDataInP const rwp) VL_MT_SAFE {
     EData overshift = 0;  // Huge shift 1>>32 or more
     for (int i = 1; i < VL_WORDS_I(rbits); ++i) overshift |= rwp[i];
-    if (VL_UNLIKELY(overshift || rwp[0] >= obits)) {
+    if (VL_UNLIKELY(overshift || rwp[0] >= static_cast<IData>(obits))) {
         const int lmsw = VL_WORDS_I(obits) - 1;
         const EData sign = VL_SIGNONES_E(lbits, lwp[lmsw]);
         for (int j = 0; j <= lmsw; ++j) owp[j] = sign;
@@ -1800,7 +1813,7 @@ static inline IData VL_SHIFTRS_IIW(int obits, int lbits, int rbits, IData lhs,
                                    WDataInP const rwp) VL_MT_SAFE {
     EData overshift = 0;  // Huge shift 1>>32 or more
     for (int i = 1; i < VL_WORDS_I(rbits); ++i) overshift |= rwp[i];
-    if (VL_UNLIKELY(overshift || rwp[0] >= obits)) {
+    if (VL_UNLIKELY(overshift || rwp[0] >= static_cast<IData>(obits))) {
         const IData sign = -(lhs >> (lbits - 1));  // ffff_ffff if negative
         return VL_CLEAN_II(obits, obits, sign);
     }
@@ -1810,7 +1823,7 @@ static inline QData VL_SHIFTRS_QQW(int obits, int lbits, int rbits, QData lhs,
                                    WDataInP const rwp) VL_MT_SAFE {
     EData overshift = 0;  // Huge shift 1>>32 or more
     for (int i = 1; i < VL_WORDS_I(rbits); ++i) overshift |= rwp[i];
-    if (VL_UNLIKELY(overshift || rwp[0] >= obits)) {
+    if (VL_UNLIKELY(overshift || rwp[0] >= static_cast<IData>(obits))) {
         const QData sign = -(lhs >> (lbits - 1));  // ffff_ffff if negative
         return VL_CLEAN_QQ(obits, obits, sign);
     }
@@ -1962,42 +1975,33 @@ static inline WDataOutP VL_RTOIROUND_W_D(int obits, WDataOutP owp, double lhs) V
 // Range assignments
 
 // EMIT_RULE: VL_ASSIGNRANGE:  rclean=dirty;
-static inline void VL_ASSIGNSEL_IIII(int rbits, int obits, int lsb, CData& lhsr,
-                                     IData rhs) VL_PURE {
+static inline void VL_ASSIGNSEL_II(int rbits, int obits, int lsb, CData& lhsr, IData rhs) VL_PURE {
     _vl_insert_II(lhsr, rhs, lsb + obits - 1, lsb, rbits);
 }
-static inline void VL_ASSIGNSEL_IIII(int rbits, int obits, int lsb, SData& lhsr,
-                                     IData rhs) VL_PURE {
+static inline void VL_ASSIGNSEL_II(int rbits, int obits, int lsb, SData& lhsr, IData rhs) VL_PURE {
     _vl_insert_II(lhsr, rhs, lsb + obits - 1, lsb, rbits);
 }
-static inline void VL_ASSIGNSEL_IIII(int rbits, int obits, int lsb, IData& lhsr,
-                                     IData rhs) VL_PURE {
+static inline void VL_ASSIGNSEL_II(int rbits, int obits, int lsb, IData& lhsr, IData rhs) VL_PURE {
     _vl_insert_II(lhsr, rhs, lsb + obits - 1, lsb, rbits);
 }
-static inline void VL_ASSIGNSEL_QIII(int rbits, int obits, int lsb, QData& lhsr,
-                                     IData rhs) VL_PURE {
+static inline void VL_ASSIGNSEL_QI(int rbits, int obits, int lsb, QData& lhsr, IData rhs) VL_PURE {
     _vl_insert_QQ(lhsr, rhs, lsb + obits - 1, lsb, rbits);
 }
-static inline void VL_ASSIGNSEL_QQII(int rbits, int obits, int lsb, QData& lhsr,
-                                     QData rhs) VL_PURE {
-    _vl_insert_QQ(lhsr, rhs, lsb + obits - 1, lsb, rbits);
-}
-static inline void VL_ASSIGNSEL_QIIQ(int rbits, int obits, int lsb, QData& lhsr,
-                                     QData rhs) VL_PURE {
+static inline void VL_ASSIGNSEL_QQ(int rbits, int obits, int lsb, QData& lhsr, QData rhs) VL_PURE {
     _vl_insert_QQ(lhsr, rhs, lsb + obits - 1, lsb, rbits);
 }
 // static inline void VL_ASSIGNSEL_IIIW(int obits, int lsb, IData& lhsr, WDataInP const rwp)
 // VL_MT_SAFE { Illegal, as lhs width >= rhs width
-static inline void VL_ASSIGNSEL_WIII(int rbits, int obits, int lsb, WDataOutP owp,
-                                     IData rhs) VL_MT_SAFE {
+static inline void VL_ASSIGNSEL_WI(int rbits, int obits, int lsb, WDataOutP owp,
+                                   IData rhs) VL_MT_SAFE {
     _vl_insert_WI(owp, rhs, lsb + obits - 1, lsb, rbits);
 }
-static inline void VL_ASSIGNSEL_WIIQ(int rbits, int obits, int lsb, WDataOutP owp,
-                                     QData rhs) VL_MT_SAFE {
+static inline void VL_ASSIGNSEL_WQ(int rbits, int obits, int lsb, WDataOutP owp,
+                                   QData rhs) VL_MT_SAFE {
     _vl_insert_WQ(owp, rhs, lsb + obits - 1, lsb, rbits);
 }
-static inline void VL_ASSIGNSEL_WIIW(int rbits, int obits, int lsb, WDataOutP owp,
-                                     WDataInP const rwp) VL_MT_SAFE {
+static inline void VL_ASSIGNSEL_WW(int rbits, int obits, int lsb, WDataOutP owp,
+                                   WDataInP const rwp) VL_MT_SAFE {
     _vl_insert_WW(owp, rwp, lsb + obits - 1, lsb, rbits);
 }
 
@@ -2036,40 +2040,40 @@ static inline WDataOutP VL_CONST_W_2X(int obits, WDataOutP o, EData d1, EData d0
 static inline WDataOutP VL_CONST_W_3X(int obits, WDataOutP o, EData d2, EData d1,
                                       EData d0) VL_MT_SAFE {
     o[0] = d0;  o[1] = d1;  o[2] = d2;
-    VL_C_END_(obits,3);
+    VL_C_END_(obits, 3);
 }
 static inline WDataOutP VL_CONST_W_4X(int obits, WDataOutP o,
                                       EData d3, EData d2, EData d1, EData d0) VL_MT_SAFE {
     o[0] = d0;  o[1] = d1;  o[2] = d2;  o[3] = d3;
-    VL_C_END_(obits,4);
+    VL_C_END_(obits, 4);
 }
 static inline WDataOutP VL_CONST_W_5X(int obits, WDataOutP o,
                                       EData d4,
                                       EData d3, EData d2, EData d1, EData d0) VL_MT_SAFE {
     o[0] = d0;  o[1] = d1;  o[2] = d2;  o[3] = d3;
     o[4] = d4;
-    VL_C_END_(obits,5);
+    VL_C_END_(obits, 5);
 }
 static inline WDataOutP VL_CONST_W_6X(int obits, WDataOutP o,
                                       EData d5, EData d4,
                                       EData d3, EData d2, EData d1, EData d0) VL_MT_SAFE {
     o[0] = d0;  o[1] = d1;  o[2] = d2;  o[3] = d3;
     o[4] = d4;  o[5] = d5;
-    VL_C_END_(obits,6);
+    VL_C_END_(obits, 6);
 }
 static inline WDataOutP VL_CONST_W_7X(int obits, WDataOutP o,
                                       EData d6, EData d5, EData d4,
                                       EData d3, EData d2, EData d1, EData d0) VL_MT_SAFE {
     o[0] = d0;  o[1] = d1;  o[2] = d2;  o[3] = d3;
     o[4] = d4;  o[5] = d5;  o[6] = d6;
-    VL_C_END_(obits,7);
+    VL_C_END_(obits, 7);
 }
 static inline WDataOutP VL_CONST_W_8X(int obits, WDataOutP o,
                                       EData d7, EData d6, EData d5, EData d4,
                                       EData d3, EData d2, EData d1, EData d0) VL_MT_SAFE {
     o[0] = d0;  o[1] = d1;  o[2] = d2;  o[3] = d3;
     o[4] = d4;  o[5] = d5;  o[6] = d6;  o[7] = d7;
-    VL_C_END_(obits,8);
+    VL_C_END_(obits, 8);
 }
 //
 static inline WDataOutP VL_CONSTHI_W_1X(int obits, int lsb, WDataOutP obase,

include/verilated_heavy.h

@@ -3,7 +3,7 @@
 //
 // Code available from: https://verilator.org
 //
-// Copyright 2010-2021 by Wilson Snyder. This program is free software; you can
+// Copyright 2010-2022 by Wilson Snyder. This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.

include/verilated_imp.h

@@ -3,7 +3,7 @@
 //
 // Code available from: https://verilator.org
 //
-// Copyright 2009-2021 by Wilson Snyder. This program is free software; you can
+// Copyright 2009-2022 by Wilson Snyder. This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.
@@ -32,10 +32,14 @@
 #include "verilated.h"
 #include "verilated_syms.h"
 
+#include <algorithm>
 #include <deque>
-#include <set>
-#include <vector>
+#include <map>
 #include <numeric>
+#include <set>
+#include <string>
+#include <utility>
+#include <vector>
 #ifdef VL_THREADED
 # include <functional>
 # include <queue>
@@ -312,14 +316,14 @@ public:  // But only for verilated*.cpp
     IData fdSeek(IData fdi, IData offset, IData origin) VL_MT_SAFE_EXCLUDES(m_fdMutex) {
         const VerilatedLockGuard lock{m_fdMutex};
         const VerilatedFpList fdlist = fdToFpList(fdi);
-        if (VL_UNLIKELY(fdlist.size() != 1)) return 0;
+        if (VL_UNLIKELY(fdlist.size() != 1)) return ~0U;  // -1
         return static_cast<IData>(
             std::fseek(*fdlist.begin(), static_cast<long>(offset), static_cast<int>(origin)));
     }
     IData fdTell(IData fdi) VL_MT_SAFE_EXCLUDES(m_fdMutex) {
         const VerilatedLockGuard lock{m_fdMutex};
         const VerilatedFpList fdlist = fdToFpList(fdi);
-        if (VL_UNLIKELY(fdlist.size() != 1)) return 0;
+        if (VL_UNLIKELY(fdlist.size() != 1)) return ~0U;  // -1
         return static_cast<IData>(std::ftell(*fdlist.begin()));
     }
     void fdWrite(IData fdi, const std::string& output) VL_MT_SAFE_EXCLUDES(m_fdMutex) {

include/verilated_intrinsics.h

@@ -3,7 +3,7 @@
 //
 // Code available from: https://verilator.org
 //
-// Copyright 2003-2021 by Wilson Snyder. This program is free software; you can
+// Copyright 2003-2022 by Wilson Snyder. This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.

include/verilated_profiler.h

@@ -3,7 +3,7 @@
 //
 // Code available from: https://verilator.org
 //
-// Copyright 2012-2021 by Wilson Snyder. This program is free software; you
+// Copyright 2012-2022 by Wilson Snyder. This program is free software; you
 // can redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.
@@ -25,6 +25,9 @@
 #include "verilatedos.h"
 #include "verilated.h"  // for VerilatedMutex and clang annotations
 
+#include <deque>
+#include <string>
+
 // Profile record, private class used only by this header
 class VerilatedProfilerRec final {
     const std::string m_name;  // Hashed name of mtask/etc
@@ -103,7 +106,7 @@ void VerilatedProfiler<T_Entries>::write(const char* modelp,
 
     for (const auto& it : m_records) {
         const std::string& name = it.name();
-        fprintf(fp, "profile_data -model \"%s\" -mtask \"%s\" -cost 64'd%" VL_PRI64 "u\n", modelp,
+        fprintf(fp, "profile_data -model \"%s\" -mtask \"%s\" -cost 64'd%" PRIu64 "\n", modelp,
                 name.c_str(), m_counters[it.counterNumber()]);
     }
 

include/verilated_save.cpp

@@ -3,7 +3,7 @@
 //
 // Code available from: https://verilator.org
 //
-// Copyright 2001-2021 by Wilson Snyder. This program is free software; you
+// Copyright 2001-2022 by Wilson Snyder. This program is free software; you
 // can redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.

include/verilated_save.h

@@ -3,7 +3,7 @@
 //
 // Code available from: https://verilator.org
 //
-// Copyright 2000-2021 by Wilson Snyder. This program is free software; you
+// Copyright 2000-2022 by Wilson Snyder. This program is free software; you
 // can redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.

include/verilated_sc.h

@@ -3,7 +3,7 @@
 //
 // Code available from: https://verilator.org
 //
-// Copyright 2009-2021 by Wilson Snyder. This program is free software; you can
+// Copyright 2009-2022 by Wilson Snyder. This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.

include/verilated_sym_props.h

@@ -3,7 +3,7 @@
 //
 // Code available from: https://verilator.org
 //
-// Copyright 2003-2021 by Wilson Snyder. This program is free software; you can
+// Copyright 2003-2022 by Wilson Snyder. This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.

include/verilated_syms.h

@@ -3,7 +3,7 @@
 //
 // Code available from: https://verilator.org
 //
-// Copyright 2003-2021 by Wilson Snyder. This program is free software; you can
+// Copyright 2003-2022 by Wilson Snyder. This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.

include/verilated_threads.cpp

@@ -3,7 +3,7 @@
 //
 // Code available from: https://verilator.org
 //
-// Copyright 2012-2021 by Wilson Snyder. This program is free software; you can
+// Copyright 2012-2022 by Wilson Snyder. This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.
@@ -26,6 +26,8 @@
 
 #include <cstdio>
 #include <fstream>
+#include <memory>
+#include <string>
 
 //=============================================================================
 // Globals
@@ -161,12 +163,12 @@ void VlThreadPool::profileDump(const char* filenamep, vluint64_t tickStart, vlui
     // TODO Perhaps merge with verilated_coverage output format, so can
     // have a common merging and reporting tool, etc.
     fprintf(fp, "VLPROFTHREAD 1.1 # Verilator thread profile dump version 1.1\n");
-    fprintf(fp, "VLPROF arg --threads %" VL_PRI64 "u\n", vluint64_t(m_workers.size() + 1));
-    fprintf(fp, "VLPROF arg +verilator+prof+threads+start+%" VL_PRI64 "u\n",
+    fprintf(fp, "VLPROF arg --threads %" PRIu64 "\n", vluint64_t(m_workers.size() + 1));
+    fprintf(fp, "VLPROF arg +verilator+prof+threads+start+%" PRIu64 "\n",
             Verilated::threadContextp()->profThreadsStart());
     fprintf(fp, "VLPROF arg +verilator+prof+threads+window+%u\n",
             Verilated::threadContextp()->profThreadsWindow());
-    fprintf(fp, "VLPROF stat yields %" VL_PRI64 "u\n", VlMTaskVertex::yields());
+    fprintf(fp, "VLPROF stat yields %" PRIu64 "\n", VlMTaskVertex::yields());
 
     // Copy /proc/cpuinfo into this output so verilator_gantt can be run on
     // a different machine
@@ -191,15 +193,14 @@ void VlThreadPool::profileDump(const char* filenamep, vluint64_t tickStart, vlui
             case VlProfileRec::TYPE_EVAL:
                 if (!printing) break;
                 fprintf(fp,
-                        "VLPROF eval start %" VL_PRI64 "u elapsed %" VL_PRI64 "u"
-                        " cpu %u on thread %u\n",
+                        "VLPROF eval start %" PRIu64 " elapsed %" PRIu64 " cpu %u on thread %u\n",
                         ei.m_startTime - tickStart, (ei.m_endTime - ei.m_startTime), ei.m_cpu,
                         thread_id);
                 break;
             case VlProfileRec::TYPE_EVAL_LOOP:
                 if (!printing) break;
                 fprintf(fp,
-                        "VLPROF eval_loop start %" VL_PRI64 "u elapsed %" VL_PRI64 "u"
+                        "VLPROF eval_loop start %" PRIu64 " elapsed %" PRIu64
                         " cpu %u on thread %u\n",
                         ei.m_startTime - tickStart, (ei.m_endTime - ei.m_startTime), ei.m_cpu,
                         thread_id);
@@ -208,7 +209,7 @@ void VlThreadPool::profileDump(const char* filenamep, vluint64_t tickStart, vlui
                 if (!printing) break;
                 fprintf(fp,
                         "VLPROF mtask %d"
-                        " start %" VL_PRI64 "u elapsed %" VL_PRI64 "u"
+                        " start %" PRIu64 " elapsed %" PRIu64
                         " predict_start %u predict_cost %u cpu %u on thread %u\n",
                         ei.m_mtaskId, ei.m_startTime - tickStart, (ei.m_endTime - ei.m_startTime),
                         ei.m_predictStart, ei.m_predictCost, ei.m_cpu, thread_id);
@@ -217,7 +218,7 @@ void VlThreadPool::profileDump(const char* filenamep, vluint64_t tickStart, vlui
             }
         }
     }
-    fprintf(fp, "VLPROF stat ticks %" VL_PRI64 "u\n", tickEnd - tickStart);
+    fprintf(fp, "VLPROF stat ticks %" PRIu64 "\n", tickEnd - tickStart);
 
     std::fclose(fp);
 }

include/verilated_threads.h

@@ -3,7 +3,7 @@
 //
 // Code available from: https://verilator.org
 //
-// Copyright 2012-2021 by Wilson Snyder. This program is free software; you
+// Copyright 2012-2022 by Wilson Snyder. This program is free software; you
 // can redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.
@@ -43,7 +43,7 @@
 #if defined(__linux)
 # include <sched.h>  // For sched_getcpu()
 #endif
-#if defined(__APPLE__)
+#if defined(__APPLE__) && !defined(__arm64__)
 # include <cpuid.h>  // For __cpuid_count()
 #endif
 // clang-format on
@@ -168,7 +168,7 @@ public:
     static int getcpu() {  // Return current executing CPU
 #if defined(__linux)
         return sched_getcpu();
-#elif defined(__APPLE__)
+#elif defined(__APPLE__) && !defined(__arm64__)
         vluint32_t info[4];
         __cpuid_count(1, 0, info[0], info[1], info[2], info[3]);
         // info[1] is EBX, bits 24-31 are APIC ID

include/verilated_trace.h

@@ -3,7 +3,7 @@
 //
 // Code available from: https://verilator.org
 //
-// Copyright 2001-2021 by Wilson Snyder. This program is free software; you
+// Copyright 2001-2022 by Wilson Snyder. This program is free software; you
 // can redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.
@@ -27,6 +27,8 @@
 #include "verilated.h"
 #include "verilated_trace_defs.h"
 
+#include <bitset>
+#include <memory>
 #include <string>
 #include <vector>
 
@@ -141,7 +143,9 @@ private:
     };
 
     vluint32_t* m_sigs_oldvalp;  // Old value store
+    EData* m_sigs_enabledp;  // Bit vector of enabled codes (nullptr = all on)
     vluint64_t m_timeLastDump;  // Last time we did a dump
+    std::vector<bool> m_sigs_enabledVec;  // Staging for m_sigs_enabledp
     std::vector<CallbackRecord> m_initCbs;  // Routines to initialize traciong
     std::vector<CallbackRecord> m_fullCbs;  // Routines to perform full dump
     std::vector<CallbackRecord> m_chgCbs;  // Routines to perform incremental dump
@@ -150,7 +154,8 @@ private:
     vluint32_t m_nextCode;  // Next code number to assign
     vluint32_t m_numSignals;  // Number of distinct signals
     vluint32_t m_maxBits;  // Number of bits in the widest signal
-    std::string m_moduleName;  // Name of module being trace initialized now
+    std::vector<std::string> m_namePrefixStack{""};  // Path prefixes to add to signal names
+    std::vector<std::pair<int, std::string>> m_dumpvars;  // dumpvar() entries
     char m_scopeEscape;
     double m_timeRes;  // Time resolution (ns/ms etc)
     double m_timeUnit;  // Time units (ns/ms etc)
@@ -170,27 +175,22 @@ private:
 #ifdef VL_TRACE_THREADED
     // Number of total trace buffers that have been allocated
     vluint32_t m_numTraceBuffers;
-
     // Size of trace buffers
     size_t m_traceBufferSize;
-
     // Buffers handed to worker for processing
     VerilatedThreadQueue<vluint32_t*> m_buffersToWorker;
     // Buffers returned from worker after processing
     VerilatedThreadQueue<vluint32_t*> m_buffersFromWorker;
+    // Write pointer into current buffer
+    vluint32_t* m_traceBufferWritep;
+    // End of trace buffer
+    vluint32_t* m_traceBufferEndp;
+    // The worker thread itself
+    std::unique_ptr<std::thread> m_workerThread;
 
     // Get a new trace buffer that can be populated. May block if none available
     vluint32_t* getTraceBuffer();
 
-    // Write pointer into current buffer
-    vluint32_t* m_traceBufferWritep;
-
-    // End of trace buffer
-    vluint32_t* m_traceBufferEndp;
-
-    // The worker thread itself
-    std::unique_ptr<std::thread> m_workerThread;
-
     // The function executed by the worker thread
     void workerThreadMain();
 
@@ -213,7 +213,6 @@ protected:
     vluint32_t nextCode() const { return m_nextCode; }
     vluint32_t numSignals() const { return m_numSignals; }
     vluint32_t maxBits() const { return m_maxBits; }
-    const std::string& moduleName() const { return m_moduleName; }
     void fullDump(bool value) { m_fullDump = value; }
     vluint64_t timeLastDump() { return m_timeLastDump; }
 
@@ -223,12 +222,15 @@ protected:
 
     void traceInit() VL_MT_UNSAFE;
 
-    void declCode(vluint32_t code, vluint32_t bits, bool tri);
+    // Declare new signal and return true if enabled
+    bool declCode(vluint32_t code, const char* namep, vluint32_t bits, bool tri);
 
     // Is this an escape?
     bool isScopeEscape(char c) { return std::isspace(c) || c == m_scopeEscape; }
     // Character that splits scopes.  Note whitespace are ALWAYS escapes.
     char scopeEscape() { return m_scopeEscape; }
+    // Prefix to assume in signal declarations
+    const std::string& namePrefix() const { return m_namePrefixStack.back(); }
 
     void closeBase();
     void flushBase();
@@ -257,6 +259,9 @@ public:
     // Set time resolution (s/ms, defaults to ns)
     void set_time_resolution(const char* unitp) VL_MT_SAFE;
     void set_time_resolution(const std::string& unit) VL_MT_SAFE;
+    // Set variables to dump, using $dumpvars format
+    // If level = 0, dump everything and hier is then ignored
+    void dumpvars(int level, const std::string& hier) VL_MT_SAFE;
 
     // Call
     void dump(vluint64_t timeui) VL_MT_SAFE_EXCLUDES(m_mutex);
@@ -269,9 +274,11 @@ public:
     void addChgCb(dumpCb_t cb, void* userp) VL_MT_SAFE;
     void addCleanupCb(dumpCb_t cb, void* userp) VL_MT_SAFE;
 
-    void module(const std::string& name) VL_MT_UNSAFE;
     void scopeEscape(char flag) { m_scopeEscape = flag; }
 
+    void pushNamePrefix(const std::string&);
+    void popNamePrefix(unsigned count = 1);
+
     //=========================================================================
     // Hot path internal interface to Verilator generated code
 

include/verilated_trace_defs.h

@@ -3,7 +3,7 @@
 //
 // Code available from: https://verilator.org
 //
-// Copyright 2001-2021 by Wilson Snyder. This program is free software; you
+// Copyright 2001-2022 by Wilson Snyder. This program is free software; you
 // can redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.

include/verilated_trace_imp.cpp

@@ -3,7 +3,7 @@
 //
 // Code available from: https://verilator.org
 //
-// Copyright 2001-2021 by Wilson Snyder. This program is free software; you
+// Copyright 2001-2022 by Wilson Snyder. This program is free software; you
 // can redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.
@@ -282,6 +282,7 @@ template <> void VerilatedTrace<VL_DERIVED_T>::onExit(void* selfp) {
 template <>
 VerilatedTrace<VL_DERIVED_T>::VerilatedTrace()
     : m_sigs_oldvalp{nullptr}
+    , m_sigs_enabledp{nullptr}
     , m_timeLastDump{0}
     , m_fullDump{true}
     , m_nextCode{0}
@@ -302,6 +303,7 @@ VerilatedTrace<VL_DERIVED_T>::VerilatedTrace()
 
 template <> VerilatedTrace<VL_DERIVED_T>::~VerilatedTrace() {
     if (m_sigs_oldvalp) VL_DO_CLEAR(delete[] m_sigs_oldvalp, m_sigs_oldvalp = nullptr);
+    if (m_sigs_enabledp) VL_DO_CLEAR(delete[] m_sigs_enabledp, m_sigs_enabledp = nullptr);
     Verilated::removeFlushCb(VerilatedTrace<VL_DERIVED_T>::onFlush, this);
     Verilated::removeExitCb(VerilatedTrace<VL_DERIVED_T>::onExit, this);
 #ifdef VL_TRACE_THREADED
@@ -320,9 +322,10 @@ template <> void VerilatedTrace<VL_DERIVED_T>::traceInit() VL_MT_UNSAFE {
     m_nextCode = 1;
     m_numSignals = 0;
     m_maxBits = 0;
+    m_sigs_enabledVec.clear();
 
     // Call all initialize callbacks, which will:
-    // - Call decl* for each signal
+    // - Call decl* for each signal (these eventually call ::declCode)
     // - Store the base code
     for (vluint32_t i = 0; i < m_initCbs.size(); ++i) {
         const CallbackRecord& cbr = m_initCbs[i];
@@ -338,6 +341,23 @@ template <> void VerilatedTrace<VL_DERIVED_T>::traceInit() VL_MT_UNSAFE {
     // holding previous signal values.
     if (!m_sigs_oldvalp) m_sigs_oldvalp = new vluint32_t[nextCode()];
 
+    // Apply enables
+    if (m_sigs_enabledp) VL_DO_CLEAR(delete[] m_sigs_enabledp, m_sigs_enabledp = nullptr);
+    if (!m_sigs_enabledVec.empty()) {
+        // Else if was empty, m_sigs_enabledp = nullptr to short circuit tests
+        // But it isn't, so alloc one bit for each code to indicate enablement
+        // We don't want to still use m_signs_enabledVec as std::vector<bool> is not
+        // guarenteed to be fast
+        m_sigs_enabledp = new vluint32_t[1 + VL_WORDS_I(nextCode())]{0};
+        m_sigs_enabledVec.reserve(nextCode());
+        for (size_t code = 0; code < nextCode(); ++code) {
+            if (m_sigs_enabledVec[code]) {
+                m_sigs_enabledp[VL_BITWORD_I(code)] |= 1U << VL_BITBIT_I(code);
+            }
+        }
+        m_sigs_enabledVec.clear();
+    }
+
     // Set callback so flush/abort will flush this file
     Verilated::addFlushCb(VerilatedTrace<VL_DERIVED_T>::onFlush, this);
     Verilated::addExitCb(VerilatedTrace<VL_DERIVED_T>::onExit, this);
@@ -356,10 +376,38 @@ template <> void VerilatedTrace<VL_DERIVED_T>::traceInit() VL_MT_UNSAFE {
 }
 
 template <>
-void VerilatedTrace<VL_DERIVED_T>::declCode(vluint32_t code, vluint32_t bits, bool tri) {
+bool VerilatedTrace<VL_DERIVED_T>::declCode(vluint32_t code, const char* namep, vluint32_t bits,
+                                            bool tri) {
     if (VL_UNCOVERABLE(!code)) {
         VL_FATAL_MT(__FILE__, __LINE__, "", "Internal: internal trace problem, code 0 is illegal");
     }
+    // To keep it simple, this is O(enables * signals), but we expect few enables
+    std::string declName = namePrefix() + namep;
+    bool enabled = false;
+    if (m_dumpvars.empty()) enabled = true;
+    for (const auto& item : m_dumpvars) {
+        const int dumpvarsLevel = item.first;
+        const char* dvp = item.second.c_str();
+        const char* np = declName.c_str();
+        while (*dvp && *dvp == *np) {
+            ++dvp;
+            ++np;
+        }
+        if (*dvp) continue;  // Didn't match dumpvar item
+        if (*np && *np != ' ') continue;  // e.g. "t" isn't a match for "top"
+        int levels = 0;
+        while (*np) {
+            if (*np++ == ' ') ++levels;
+        }
+        if (levels > dumpvarsLevel) continue;  // Too deep
+        // We only need to set first code word if it's a multicode signal
+        // as that's all we'll check for later
+        if (m_sigs_enabledVec.size() <= code) m_sigs_enabledVec.resize((code + 1024) * 2);
+        m_sigs_enabledVec[code] = true;
+        enabled = true;
+        break;
+    }
+
     // Note: The tri-state flag is not used by Verilator, but is here for
     // compatibility with some foreign code.
     int codesNeeded = VL_WORDS_I(bits);
@@ -367,6 +415,7 @@ void VerilatedTrace<VL_DERIVED_T>::declCode(vluint32_t code, vluint32_t bits, bo
     m_nextCode = std::max(m_nextCode, code + codesNeeded);
     ++m_numSignals;
     m_maxBits = std::max(m_maxBits, bits);
+    return enabled;
 }
 
 //=========================================================================
@@ -392,6 +441,19 @@ template <>
 void VerilatedTrace<VL_DERIVED_T>::set_time_resolution(const std::string& unit) VL_MT_SAFE {
     set_time_resolution(unit.c_str());
 }
+template <>
+void VerilatedTrace<VL_DERIVED_T>::dumpvars(int level, const std::string& hier) VL_MT_SAFE {
+    if (level == 0) {
+        m_dumpvars.clear();  // empty = everything on
+    } else {
+        // Convert Verilog . separators to trace space separators
+        std::string hierSpaced = hier;
+        for (auto& i : hierSpaced) {
+            if (i == '.') i = ' ';
+        }
+        m_dumpvars.push_back(std::make_pair(level, hierSpaced));
+    }
+}
 
 template <>
 void VerilatedTrace<VL_DERIVED_T>::dump(vluint64_t timeui) VL_MT_SAFE_EXCLUDES(m_mutex) {
@@ -400,8 +462,8 @@ void VerilatedTrace<VL_DERIVED_T>::dump(vluint64_t timeui) VL_MT_SAFE_EXCLUDES(m
     // chances are the data being dumped will have other problems
     const VerilatedLockGuard lock{m_mutex};
     if (VL_UNCOVERABLE(m_timeLastDump && timeui <= m_timeLastDump)) {  // LCOV_EXCL_START
-        VL_PRINTF_MT("%%Warning: previous dump at t=%" VL_PRI64 "u, requesting t=%" VL_PRI64
-                     "u, dump call ignored\n",
+        VL_PRINTF_MT("%%Warning: previous dump at t=%" PRIu64 ", requesting t=%" PRIu64
+                     ", dump call ignored\n",
                      m_timeLastDump, timeui);
         return;
     }  // LCOV_EXCL_STOP
@@ -504,9 +566,14 @@ template <> void VerilatedTrace<VL_DERIVED_T>::addCleanupCb(dumpCb_t cb, void* u
     CallbackRecord cbr{cb, userp};
     addCallbackRecord(m_cleanupCbs, cbr);
 }
-template <> void VerilatedTrace<VL_DERIVED_T>::module(const std::string& name) VL_MT_UNSAFE {
-    // Called via callbacks way above in call stack, which already hold m_mutex
-    m_moduleName = name;
+
+template <> void VerilatedTrace<VL_DERIVED_T>::pushNamePrefix(const std::string& prefix) {
+    m_namePrefixStack.push_back(m_namePrefixStack.back() + prefix);
+}
+
+template <> void VerilatedTrace<VL_DERIVED_T>::popNamePrefix(unsigned count) {
+    while (count--) m_namePrefixStack.pop_back();
+    assert(!m_namePrefixStack.empty());
 }
 
 //=========================================================================
@@ -518,44 +585,58 @@ template <> void VerilatedTrace<VL_DERIVED_T>::module(const std::string& name) V
 // the emit* functions can be inlined for performance.
 
 template <> void VerilatedTrace<VL_DERIVED_T>::fullBit(vluint32_t* oldp, CData newval) {
-    *oldp = newval;
-    self()->emitBit(oldp - m_sigs_oldvalp, newval);
+    const uint32_t code = oldp - m_sigs_oldvalp;
+    *oldp = newval;  // Still copy even if not tracing so chg doesn't call full
+    if (VL_UNLIKELY(m_sigs_enabledp && !(VL_BITISSET_W(m_sigs_enabledp, code)))) return;
+    self()->emitBit(code, newval);
 }
 
 template <>
 void VerilatedTrace<VL_DERIVED_T>::fullCData(vluint32_t* oldp, CData newval, int bits) {
-    *oldp = newval;
-    self()->emitCData(oldp - m_sigs_oldvalp, newval, bits);
+    const uint32_t code = oldp - m_sigs_oldvalp;
+    *oldp = newval;  // Still copy even if not tracing so chg doesn't call full
+    if (VL_UNLIKELY(m_sigs_enabledp && !(VL_BITISSET_W(m_sigs_enabledp, code)))) return;
+    self()->emitCData(code, newval, bits);
 }
 
 template <>
 void VerilatedTrace<VL_DERIVED_T>::fullSData(vluint32_t* oldp, SData newval, int bits) {
-    *oldp = newval;
-    self()->emitSData(oldp - m_sigs_oldvalp, newval, bits);
+    const uint32_t code = oldp - m_sigs_oldvalp;
+    *oldp = newval;  // Still copy even if not tracing so chg doesn't call full
+    if (VL_UNLIKELY(m_sigs_enabledp && !(VL_BITISSET_W(m_sigs_enabledp, code)))) return;
+    self()->emitSData(code, newval, bits);
 }
 
 template <>
 void VerilatedTrace<VL_DERIVED_T>::fullIData(vluint32_t* oldp, IData newval, int bits) {
-    *oldp = newval;
-    self()->emitIData(oldp - m_sigs_oldvalp, newval, bits);
+    const uint32_t code = oldp - m_sigs_oldvalp;
+    *oldp = newval;  // Still copy even if not tracing so chg doesn't call full
+    if (VL_UNLIKELY(m_sigs_enabledp && !(VL_BITISSET_W(m_sigs_enabledp, code)))) return;
+    self()->emitIData(code, newval, bits);
 }
 
 template <>
 void VerilatedTrace<VL_DERIVED_T>::fullQData(vluint32_t* oldp, QData newval, int bits) {
+    const uint32_t code = oldp - m_sigs_oldvalp;
     *reinterpret_cast<QData*>(oldp) = newval;
-    self()->emitQData(oldp - m_sigs_oldvalp, newval, bits);
+    if (VL_UNLIKELY(m_sigs_enabledp && !(VL_BITISSET_W(m_sigs_enabledp, code)))) return;
+    self()->emitQData(code, newval, bits);
 }
 
 template <>
 void VerilatedTrace<VL_DERIVED_T>::fullWData(vluint32_t* oldp, const WData* newvalp, int bits) {
+    const uint32_t code = oldp - m_sigs_oldvalp;
     for (int i = 0; i < VL_WORDS_I(bits); ++i) oldp[i] = newvalp[i];
-    self()->emitWData(oldp - m_sigs_oldvalp, newvalp, bits);
+    if (VL_UNLIKELY(m_sigs_enabledp && !(VL_BITISSET_W(m_sigs_enabledp, code)))) return;
+    self()->emitWData(code, newvalp, bits);
 }
 
 template <> void VerilatedTrace<VL_DERIVED_T>::fullDouble(vluint32_t* oldp, double newval) {
-    // cppcheck-suppress invalidPointerCast
+    const uint32_t code = oldp - m_sigs_oldvalp;
     *reinterpret_cast<double*>(oldp) = newval;
-    self()->emitDouble(oldp - m_sigs_oldvalp, newval);
+    if (VL_UNLIKELY(m_sigs_enabledp && !(VL_BITISSET_W(m_sigs_enabledp, code)))) return;
+    // cppcheck-suppress invalidPointerCast
+    self()->emitDouble(code, newval);
 }
 
 //=========================================================================
@@ -655,7 +736,7 @@ static inline void cvtQDataToStr(char* dstp, QData value) {
 void verilated_trace_imp_selftest() {
 #define SELF_CHECK(got, exp) \
     do { \
-        if ((got) != (exp)) VL_FATAL_MT(__FILE__, __LINE__, "", "%Error: selftest\n"); \
+        if ((got) != (exp)) VL_FATAL_MT(__FILE__, __LINE__, "", "%Error: selftest"); \
     } while (0)
 
 #define SELF_CHECK_TS(scale) \

include/verilated_types.h

@@ -3,7 +3,7 @@
 //
 // Code available from: https://verilator.org
 //
-// Copyright 2003-2021 by Wilson Snyder. This program is free software; you can
+// Copyright 2003-2022 by Wilson Snyder. This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.
@@ -28,6 +28,14 @@
 #error "verilated_types.h should only be included by verilated.h"
 #endif
 
+#include <algorithm>
+#include <deque>
+#include <map>
+#include <set>
+#include <string>
+#include <unordered_set>
+#include <utility>
+
 //===================================================================
 // String formatters (required by below containers)
 
@@ -45,22 +53,22 @@ extern std::string VL_TO_STRING_W(int words, const WDataInP obj);
 #define VL_SIG16(name, msb, lsb) SData name  ///< Declare signal, 9-16 bits
 #define VL_SIG64(name, msb, lsb) QData name  ///< Declare signal, 33-64 bits
 #define VL_SIG(name, msb, lsb) IData name  ///< Declare signal, 17-32 bits
-#define VL_SIGW(name, msb, lsb, words) WData name[words]  ///< Declare signal, 65+ bits
+#define VL_SIGW(name, msb, lsb, words) VlWide<words> name  ///< Declare signal, 65+ bits
 #define VL_IN8(name, msb, lsb) CData name  ///< Declare input signal, 1-8 bits
 #define VL_IN16(name, msb, lsb) SData name  ///< Declare input signal, 9-16 bits
 #define VL_IN64(name, msb, lsb) QData name  ///< Declare input signal, 33-64 bits
 #define VL_IN(name, msb, lsb) IData name  ///< Declare input signal, 17-32 bits
-#define VL_INW(name, msb, lsb, words) WData name[words]  ///< Declare input signal, 65+ bits
+#define VL_INW(name, msb, lsb, words) VlWide<words> name  ///< Declare input signal, 65+ bits
 #define VL_INOUT8(name, msb, lsb) CData name  ///< Declare bidir signal, 1-8 bits
 #define VL_INOUT16(name, msb, lsb) SData name  ///< Declare bidir signal, 9-16 bits
 #define VL_INOUT64(name, msb, lsb) QData name  ///< Declare bidir signal, 33-64 bits
 #define VL_INOUT(name, msb, lsb) IData name  ///< Declare bidir signal, 17-32 bits
-#define VL_INOUTW(name, msb, lsb, words) WData name[words]  ///< Declare bidir signal, 65+ bits
+#define VL_INOUTW(name, msb, lsb, words) VlWide<words> name  ///< Declare bidir signal, 65+ bits
 #define VL_OUT8(name, msb, lsb) CData name  ///< Declare output signal, 1-8 bits
 #define VL_OUT16(name, msb, lsb) SData name  ///< Declare output signal, 9-16 bits
 #define VL_OUT64(name, msb, lsb) QData name  ///< Declare output signal, 33-64bits
 #define VL_OUT(name, msb, lsb) IData name  ///< Declare output signal, 17-32 bits
-#define VL_OUTW(name, msb, lsb, words) WData name[words]  ///< Declare output signal, 65+ bits
+#define VL_OUTW(name, msb, lsb, words) VlWide<words> name  ///< Declare output signal, 65+ bits
 
 //===================================================================
 // Shuffle RNG
@@ -86,6 +94,7 @@ class VlReadMem final {
     FILE* m_fp;  // File handle for filename
     QData m_addr;  // Next address to read
     int m_linenum;  // Line number last read from file
+    bool m_anyAddr = false;  // Had address directive in the file
 public:
     VlReadMem(bool hex, int bits, const std::string& filename, QData start, QData end);
     ~VlReadMem();
@@ -848,8 +857,8 @@ template <class T_Value, std::size_t T_Depth> struct VlUnpacked final {
     WData* data() { return &m_storage[0]; }
     const WData* data() const { return &m_storage[0]; }
 
-    T_Value& operator[](size_t index) { return m_storage[index]; };
-    const T_Value& operator[](size_t index) const { return m_storage[index]; };
+    T_Value& operator[](size_t index) { return m_storage[index]; }
+    const T_Value& operator[](size_t index) const { return m_storage[index]; }
 
     // Dumping. Verilog: str = $sformatf("%p", assoc)
     std::string to_string() const {

include/verilated_vcd_c.cpp

@@ -3,7 +3,7 @@
 //
 // Code available from: https://verilator.org
 //
-// Copyright 2001-2021 by Wilson Snyder. This program is free software; you
+// Copyright 2001-2022 by Wilson Snyder. This program is free software; you
 // can redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.
@@ -273,7 +273,7 @@ void VerilatedVcd::printStr(const char* str) {
 void VerilatedVcd::printQuad(vluint64_t n) {
     constexpr size_t LEN_STR_QUAD = 40;
     char buf[LEN_STR_QUAD];
-    VL_SNPRINTF(buf, LEN_STR_QUAD, "%" VL_PRI64 "u", n);
+    VL_SNPRINTF(buf, LEN_STR_QUAD, "%" PRIu64, n);
     printStr(buf);
 }
 
@@ -426,8 +426,9 @@ void VerilatedVcd::dumpHeader() {
                 case VLT_TRACE_SCOPE_UNION: printStr("union "); break;
                 default: printStr("module ");
                 }
-            } else
+            } else {
                 printStr("module ");
+            }
 
             for (; *np && *np != ' ' && *np != '\t'; np++) {
                 if (*np == '[') {
@@ -462,7 +463,7 @@ void VerilatedVcd::declare(vluint32_t code, const char* name, const char* wirep,
                            int arraynum, bool tri, bool bussed, int msb, int lsb) {
     const int bits = ((msb > lsb) ? (msb - lsb) : (lsb - msb)) + 1;
 
-    VerilatedTrace<VerilatedVcd>::declCode(code, bits, tri);
+    const bool enabled = VerilatedTrace<VerilatedVcd>::declCode(code, name, bits, tri);
 
     if (m_suffixes.size() <= nextCode() * VL_TRACE_SUFFIX_ENTRY_SIZE) {
         m_suffixes.resize(nextCode() * VL_TRACE_SUFFIX_ENTRY_SIZE * 2, 0);
@@ -471,16 +472,15 @@ void VerilatedVcd::declare(vluint32_t code, const char* name, const char* wirep,
     // Make sure write buffer is large enough (one character per bit), plus header
     bufferResize(bits + 1024);
 
+    if (!enabled) return;
+
     // Split name into basename
     // Spaces and tabs aren't legal in VCD signal names, so:
     // Space separates each level of scope
     // Tab separates final scope from signal name
     // Tab sorts before spaces, so signals nicely will print before scopes
     // Note the hiername may be nothing, if so we'll add "\t{name}"
-    std::string nameasstr = name;
-    if (!moduleName().empty()) {
-        nameasstr = moduleName() + scopeEscape() + nameasstr;  // Optional ->module prefix
-    }
+    std::string nameasstr = namePrefix() + name;
     std::string hiername;
     std::string basename;
     for (const char* cp = nameasstr.c_str(); *cp; cp++) {
@@ -608,6 +608,7 @@ static inline void VerilatedVcdCCopyAndAppendNewLine(char* writep, const char* s
 
 void VerilatedVcd::finishLine(vluint32_t code, char* writep) {
     const char* const suffixp = m_suffixes.data() + code * VL_TRACE_SUFFIX_ENTRY_SIZE;
+    VL_DEBUG_IFDEF(assert(suffixp[0]););
     VerilatedVcdCCopyAndAppendNewLine(writep, suffixp);
 
     // Now write back the write pointer incremented by the actual size of the
@@ -830,16 +831,19 @@ float flo = 0.0f;
 
 void vcdInit(void*, VerilatedVcd* vcdp, vluint32_t) {
     vcdp->scopeEscape('.');
-    vcdp->module("top");
+    vcdp->pushNamePrefix("top.");
     /**/ vcdp->declBus(0x2, "v1", -1, 0, 5, 1);
     /**/ vcdp->declBus(0x3, "v2", -1, 0, 6, 1);
-    /**/ vcdp->module("top.sub1");
+    /**/ vcdp->pushNamePrefix("sub1.");
     /***/ vcdp->declBit(0x4, "s1", -1, 0);
     /***/ vcdp->declBit(0x5, "ch", -1, 0);
-    /**/ vcdp->module("top.sub2");
+    /**/ vcdp->popNamePrefix();
+    /**/ vcdp->pushNamePrefix("sub2.");
     /***/ vcdp->declArray(0x6, "s2", -1, 0, 40, 3);
+    /**/ vcdp->popNamePrefix();
+    vcdp->popNamePrefix();
     // Note need to add 3 for next code.
-    vcdp->module("top2");
+    vcdp->pushNamePrefix("top2.");
     /**/ vcdp->declBus(0x2, "t2v1", -1, 0, 4, 1);
     /**/ vcdp->declTriBit(0x10, "io1", -1, 0);
     /**/ vcdp->declTriBus(0x12, "io5", -1, 0, 4, 0);
@@ -851,6 +855,7 @@ void vcdInit(void*, VerilatedVcd* vcdp, vluint32_t) {
     /**/  // Note need to add 4 for next code.
     /**/ vcdp->declTriQuad(0x24, "tq", -1, 0, 63, 0);
     /**/  // Note need to add 4 for next code.
+    vcdp->popNamePrefix();
 }
 
 void vcdFull(void*, VerilatedVcd* vcdp) {

include/verilated_vcd_c.h

@@ -3,7 +3,7 @@
 //
 // Code available from: https://verilator.org
 //
-// Copyright 2001-2021 by Wilson Snyder. This program is free software; you
+// Copyright 2001-2022 by Wilson Snyder. This program is free software; you
 // can redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.
@@ -328,6 +328,7 @@ template <> void VerilatedTrace<VerilatedVcd>::set_time_unit(const char* unitp);
 template <> void VerilatedTrace<VerilatedVcd>::set_time_unit(const std::string& unit);
 template <> void VerilatedTrace<VerilatedVcd>::set_time_resolution(const char* unitp);
 template <> void VerilatedTrace<VerilatedVcd>::set_time_resolution(const std::string& unit);
+template <> void VerilatedTrace<VerilatedVcd>::dumpvars(int level, const std::string& hier);
 #endif  // DOXYGEN
 
 //=============================================================================
@@ -346,7 +347,7 @@ public:
     explicit VerilatedVcdC(VerilatedVcdFile* filep = nullptr)
         : m_sptrace{filep} {}
     /// Destruct, flush, and close the dump
-    ~VerilatedVcdC() { close(); }
+    virtual ~VerilatedVcdC() { close(); }
 
 public:
     // METHODS - User called
@@ -356,7 +357,7 @@ public:
     /// Open a new VCD file
     /// This includes a complete header dump each time it is called,
     /// just as if this object was deleted and reconstructed.
-    void open(const char* filename) VL_MT_SAFE { m_sptrace.open(filename); }
+    virtual void open(const char* filename) VL_MT_SAFE { m_sptrace.open(filename); }
     /// Continue a VCD dump by rotating to a new file name
     /// The header is only in the first file created, this allows
     /// "cat" to be used to combine the header plus any number of data files.
@@ -392,6 +393,11 @@ public:
     void set_time_resolution(const std::string& unit) VL_MT_SAFE {
         m_sptrace.set_time_resolution(unit);
     }
+    // Set variables to dump, using $dumpvars format
+    // If level = 0, dump everything and hier is then ignored
+    void dumpvars(int level, const std::string& hier) VL_MT_SAFE {
+        m_sptrace.dumpvars(level, hier);
+    }
 
     // Internal class access
     inline VerilatedVcd* spTrace() { return &m_sptrace; }

include/verilated_vcd_sc.cpp

@@ -3,7 +3,7 @@
 //
 // Code available from: https://verilator.org
 //
-// Copyright 2001-2021 by Wilson Snyder. This program is free software; you
+// Copyright 2001-2022 by Wilson Snyder. This program is free software; you
 // can redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.
@@ -27,6 +27,17 @@
 //======================================================================
 //======================================================================
 
+void VerilatedVcdSc::open(const char* filename) {
+    if (!sc_core::sc_get_curr_simcontext()->elaboration_done()) {
+        vl_fatal(__FILE__, __LINE__, "VerilatedVcdSc",
+                 ("%Error: VerilatedVcdSc::open(\"" + std::string(filename)
+                  + "\") is called before sc_core::sc_start(). "
+                    "Run sc_core::sc_start(sc_core::SC_ZERO_TIME) before opening a wave file.")
+                     .c_str());
+    }
+    VerilatedVcdC::open(filename);
+}
+
 //--------------------------------------------------
 // SystemC 2.1.v1
 // cppcheck-suppress unusedFunction

include/verilated_vcd_sc.h

@@ -1,7 +1,7 @@
 // -*- mode: C++; c-file-style: "cc-mode" -*-
 //=============================================================================
 //
-// Copyright 2001-2021 by Wilson Snyder. This program is free software; you can
+// Copyright 2001-2022 by Wilson Snyder. This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.
@@ -26,6 +26,8 @@
 #include "verilated_sc.h"
 #include "verilated_vcd_c.h"
 
+#include <string>
+
 //=============================================================================
 // VerilatedVcdSc
 ///
@@ -60,6 +62,9 @@ public:
         if (!delta_cycle) this->dump(sc_time_stamp().to_double());
     }
 
+    // Override VerilatedVcdC. Must be called after starting simulation.
+    virtual void open(const char* filename) /*override*/ VL_MT_SAFE;
+
 private:
     // METHODS - Fake outs for linker
 

include/verilated_vpi.cpp

@@ -3,7 +3,7 @@
 //
 // Code available from: https://verilator.org
 //
-// Copyright 2009-2021 by Wilson Snyder. This program is free software; you can
+// Copyright 2009-2022 by Wilson Snyder. This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.
@@ -33,6 +33,10 @@
 #include <list>
 #include <map>
 #include <set>
+#include <string>
+#include <unordered_set>
+#include <utility>
+#include <vector>
 
 //======================================================================
 // Internal constants
@@ -534,7 +538,7 @@ public:
         if (VL_UNCOVERABLE(cb_data_p->reason >= CB_ENUM_MAX_VALUE)) {
             VL_FATAL_MT(__FILE__, __LINE__, "", "vpi bb reason too large");
         }
-        VL_DEBUG_IF_PLI(VL_DBG_MSGF("- vpi: vpi_register_cb reason=%d id=%" VL_PRI64 "d obj=%p\n",
+        VL_DEBUG_IF_PLI(VL_DBG_MSGF("- vpi: vpi_register_cb reason=%d id=%" PRId64 " obj=%p\n",
                                     cb_data_p->reason, id, cb_data_p->obj););
         VerilatedVpioVar* varop = nullptr;
         if (cb_data_p->reason == cbValueChange) varop = VerilatedVpioVar::castp(cb_data_p->obj);
@@ -542,8 +546,8 @@ public:
     }
     static void cbTimedAdd(vluint64_t id, const s_cb_data* cb_data_p, QData time) {
         // The passed cb_data_p was property of the user, so need to recreate
-        VL_DEBUG_IF_PLI(VL_DBG_MSGF("- vpi: vpi_register_cb reason=%d id=%" VL_PRI64
-                                    "d delay=%" VL_PRI64 "u\n",
+        VL_DEBUG_IF_PLI(VL_DBG_MSGF("- vpi: vpi_register_cb reason=%d id=%" PRId64
+                                    " delay=%" PRIu64 "\n",
                                     cb_data_p->reason, id, time););
         s().m_timedCbs.emplace(std::piecewise_construct,
                                std::forward_as_tuple(std::make_pair(time, id)),
@@ -573,7 +577,7 @@ public:
                 ++it;
                 if (VL_UNLIKELY(!ho.invalid())) {
                     VL_DEBUG_IF_PLI(
-                        VL_DBG_MSGF("- vpi: timed_callback id=%" VL_PRI64 "d\n", ho.id()););
+                        VL_DBG_MSGF("- vpi: timed_callback id=%" PRId64 "\n", ho.id()););
                     ho.invalidate();  // Timed callbacks are one-shot
                     (ho.cb_rtnp())(ho.cb_datap());
                 }
@@ -602,7 +606,7 @@ public:
                 continue;
             }
             VerilatedVpiCbHolder& ho = *it;
-            VL_DEBUG_IF_PLI(VL_DBG_MSGF("- vpi: reason_callback reason=%d id=%" VL_PRI64 "d\n",
+            VL_DEBUG_IF_PLI(VL_DBG_MSGF("- vpi: reason_callback reason=%d id=%" PRId64 "\n",
                                         reason, ho.id()););
             (ho.cb_rtnp())(ho.cb_datap());
             called = true;
@@ -636,9 +640,9 @@ public:
                                             *(static_cast<CData*>(prevDatap)), newDatap,
                                             prevDatap););
                 if (std::memcmp(prevDatap, newDatap, varop->entSize()) != 0) {
-                    VL_DEBUG_IF_PLI(
-                        VL_DBG_MSGF("- vpi: value_callback %" VL_PRI64 "d %s v[0]=%d\n", ho.id(),
-                                    varop->fullname(), *(static_cast<CData*>(newDatap))););
+                    VL_DEBUG_IF_PLI(VL_DBG_MSGF("- vpi: value_callback %" PRId64 " %s v[0]=%d\n",
+                                                ho.id(), varop->fullname(),
+                                                *(static_cast<CData*>(newDatap))););
                     update.insert(varop);
                     vpi_get_value(ho.cb_datap()->obj, ho.cb_datap()->value);
                     (ho.cb_rtnp())(ho.cb_datap());
@@ -1697,7 +1701,7 @@ void vl_get_value(const VerilatedVar* varp, void* varDatap, p_vpi_value valuep,
     // Maximum required size is for binary string, one byte per bit plus null termination
     static VL_THREAD_LOCAL char t_outStr[VL_VALUE_STRING_MAX_WORDS * VL_EDATASIZE + 1];
     // cppcheck-suppress variableScope
-    const static VL_THREAD_LOCAL int t_outStrSz = sizeof(t_outStr) - 1;
+    static const VL_THREAD_LOCAL int t_outStrSz = sizeof(t_outStr) - 1;
     // We used to presume vpiValue.format = vpiIntVal or if single bit vpiScalarVal
     // This may cause backward compatibility issues with older code.
     if (valuep->format == vpiVectorVal) {

include/verilated_vpi.h

@@ -3,7 +3,7 @@
 //
 // Code available from: https://verilator.org
 //
-// Copyright 2009-2021 by Wilson Snyder. This program is free software; you can
+// Copyright 2009-2022 by Wilson Snyder. This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.

include/verilatedos.h

@@ -3,7 +3,7 @@
 //
 // Code available from: https://verilator.org
 //
-// Copyright 2003-2021 by Wilson Snyder. This program is free software; you can
+// Copyright 2003-2022 by Wilson Snyder. This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.
@@ -92,7 +92,7 @@
 # define VL_ATTR_NORETURN  ///< Attribute that function does not ever return
 #endif
 #ifndef VL_ATTR_NO_SANITIZE_ALIGN
-# define VL_ATTR_NO_SANITIZE_ALIGN ///< Attribute that the function contains intended unaligned access
+# define VL_ATTR_NO_SANITIZE_ALIGN  ///< Attribute that function contains intended unaligned access
 #endif
 #ifndef VL_ATTR_PRINTF
 # define VL_ATTR_PRINTF(fmtArgNum)  ///< Attribute for function with printf format checking
@@ -278,89 +278,55 @@ void __gcov_flush();  // gcc sources gcc/gcov-io.h has the prototype
 // to be declared in order to get the PRIxx macros used by fstapi.c
 #define __STDC_FORMAT_MACROS
 
+// Now that C++ requires these standard types the vl types are deprecated
+#include <cstdint>
+#include <cinttypes>
+
+using vluint8_t = uint8_t;  ///< 8-bit unsigned type (backward compatibility)
+using vluint16_t = uint16_t;  ///< 16-bit unsigned type (backward compatibility)
+using vluint32_t = uint32_t;  ///< 32-bit unsigned type (backward compatibility)
+using vluint64_t = uint64_t;  ///< 64-bit unsigned type (backward compatibility)
+using vlsint8_t = int8_t;  ///< 8-bit signed type (backward compatibility)
+using vlsint16_t = int16_t;  ///< 16-bit signed type (backward compatibility)
+using vlsint32_t = int32_t;  ///< 32-bit signed type (backward compatibility)
+using vlsint64_t = int64_t;  ///< 64-bit signed type (backward compatibility)
+
 #if defined(__CYGWIN__)
 
-# include <stdint.h>
 # include <sys/types.h>  // __WORDSIZE
 # include <unistd.h>  // ssize_t
-typedef unsigned char uint8_t;  ///< 8-bit unsigned type (backward compatibility)
-typedef unsigned short int uint16_t;  ///< 16-bit unsigned type (backward compatibility)
-typedef char vlsint8_t;  ///< 8-bit signed type
-typedef unsigned char vluint8_t;  ///< 8-bit unsigned type
-typedef short int vlsint16_t;  ///< 16-bit signed type
-typedef unsigned short int vluint16_t;  ///< 16-bit unsigned type
-# if defined(__uint32_t_defined) || defined(___int32_t_defined)  // Newer Cygwin uint32_t in stdint.h as an unsigned int
-typedef int32_t vlsint32_t;  ///< 32-bit signed type
-typedef uint32_t vluint32_t;  ///< 32-bit unsigned type
-# else  // Older Cygwin has long==uint32_t
-typedef unsigned long uint32_t;  ///< 32-bit unsigned type (backward compatibility)
-typedef long vlsint32_t;  ///< 32-bit signed type
-typedef unsigned long vluint32_t;  ///< 32-bit unsigned type
-# endif
-# if defined(__WORDSIZE) && (__WORDSIZE == 64)
-typedef long vlsint64_t;  ///< 64-bit signed type
-typedef unsigned long vluint64_t;  ///< 64-bit unsigned type
-# else
-typedef long long vlsint64_t;  ///< 64-bit signed type
-typedef unsigned long long vluint64_t;  ///< 64-bit unsigned type
-# endif
 
 #elif defined(_WIN32) && defined(_MSC_VER)
 
-typedef unsigned __int8 uint8_t;  ///< 8-bit unsigned type (backward compatibility)
-typedef unsigned __int16 uint16_t;  ///< 16-bit unsigned type (backward compatibility)
-typedef unsigned __int32 uint32_t;  ///< 32-bit unsigned type (backward compatibility)
-typedef signed __int8 vlsint8_t;  ///< 8-bit signed type
-typedef unsigned __int8 vluint8_t;  ///< 8-bit unsigned type
-typedef signed __int16 vlsint16_t;  ///< 16-bit signed type
-typedef unsigned __int16 vluint16_t;  ///< 16-bit unsigned type
-typedef signed __int32 vlsint32_t;  ///< 32-bit signed type
-typedef unsigned __int32 vluint32_t;  ///< 32-bit unsigned type
-typedef signed __int64 vlsint64_t;  ///< 64-bit signed type
-typedef unsigned __int64 vluint64_t;  ///< 64-bit unsigned type
-
 # ifndef _SSIZE_T_DEFINED
 #  ifdef _WIN64
-typedef signed __int64 ssize_t;  ///< signed size_t; returned from read()
+using ssize_t = uint64_t;  ///< signed size_t; returned from read()
 #  else
-typedef signed __int32 ssize_t;  ///< signed size_t; returned from read()
+using ssize_t = uint32_t;  ///< signed size_t; returned from read()
 #  endif
 # endif
 
 #else  // Linux or compliant Unix flavors, -m64
 
 # include <inttypes.h>  // Solaris
-# include <stdint.h>  // Linux and most flavors
 # include <sys/types.h>  // __WORDSIZE
 # include <unistd.h>  // ssize_t
-// Arm64 gcc 9.3.0 defaults to unsigned char, not signed char
-typedef signed char vlsint8_t;  ///< 8-bit signed type
-typedef uint8_t vluint8_t;  ///< 8-bit unsigned type
-typedef short vlsint16_t;  ///< 16-bit signed type
-typedef uint16_t vluint16_t;  ///< 16-bit unsigned type
-typedef int vlsint32_t;  ///< 32-bit signed type
-typedef uint32_t vluint32_t;  ///< 32-bit unsigned type
-# if defined(__WORDSIZE) && (__WORDSIZE == 64)
-typedef long vlsint64_t;  ///< 64-bit signed type
-typedef unsigned long vluint64_t;  ///< 64-bit unsigned type
-# else
-typedef long long vlsint64_t;  ///< 64-bit signed type
-typedef unsigned long long vluint64_t;  ///< 64-bit unsigned type
-# endif
 #endif
 
 //=========================================================================
 // Printing printf/scanf formats
-// Alas cinttypes isn't that standard yet
 
 // Use Microsoft-specific format specifiers for Microsoft Visual C++ only
-#ifdef _MSC_VER
-# define VL_PRI64 "I64"
-#else  // use standard C99 format specifiers
-# if defined(__WORDSIZE) && (__WORDSIZE == 64)
-#  define VL_PRI64 "l"
-# else
-#  define VL_PRI64 "ll"
+// Deprecated, favor C++11's PRIx64, etc, instead
+#ifndef VL_NO_LEGACY
+# ifdef _MSC_VER
+#  define VL_PRI64 "I64"  ///< print a vluint64_t (backward compatibility)
+# else  // use standard C99 format specifiers
+#  if defined(__WORDSIZE) && (__WORDSIZE == 64)
+#   define VL_PRI64 "l"  ///< print a vluint64_t (backward compatibility)
+#  else
+#   define VL_PRI64 "ll"  ///< print a vluint64_t (backward compatibility)
+#  endif
 # endif
 #endif
 
@@ -448,6 +414,12 @@ typedef unsigned long long vluint64_t;  ///< 64-bit unsigned type
 #define VL_BITBIT_Q(bit) ((bit) & VL_SIZEBITS_Q)  ///< Bit number for a bit in a quad
 #define VL_BITBIT_E(bit) ((bit) & VL_SIZEBITS_E)  ///< Bit number for a bit in a EData
 
+// Return true if data[bit] set; not 0/1 return, but 0/non-zero return.
+#define VL_BITISSET_I(data, bit) ((data) & (VL_UL(1) << VL_BITBIT_I(bit)))
+#define VL_BITISSET_Q(data, bit) ((data) & (1ULL << VL_BITBIT_Q(bit)))
+#define VL_BITISSET_E(data, bit) ((data) & (VL_EUL(1) << VL_BITBIT_E(bit)))
+#define VL_BITISSET_W(data, bit) ((data)[VL_BITWORD_E(bit)] & (VL_EUL(1) << VL_BITBIT_E(bit)))
+
 //=========================================================================
 // Floating point
 // #defines, to avoid requiring math.h on all compile runs
@@ -533,7 +505,7 @@ typedef unsigned long long vluint64_t;  ///< 64-bit unsigned type
 # ifdef __x86_64__
 #  define VL_X86_64 1
 # endif
-#endif // VL_PORTABLE_ONLY
+#endif  // VL_PORTABLE_ONLY
 // clang-format on
 
 //=========================================================================

nodist/code_coverage

@@ -346,7 +346,7 @@ files. Run as:
   cd $VERILATOR_ROOT
   nodist/code_coverage""",
     epilog=
-    """Copyright 2019-2021 by Wilson Snyder. This program is free software; you
+    """Copyright 2019-2022 by Wilson Snyder. This program is free software; you
 can redistribute it and/or modify it under the terms of either the GNU
 Lesser General Public License Version 3 or the Perl Artistic License
 Version 2.0.

nodist/code_coverage.dat

@@ -1,7 +1,7 @@
 # -*- Python -*-
 # DESCRIPTION: Verilator: Internal C++ code lcov control file
 #
-# Copyright 2019-2021 by Wilson Snyder. This program is free software; you
+# Copyright 2019-2022 by Wilson Snyder. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.

nodist/dot_importer

@@ -87,7 +87,7 @@ parser = argparse.ArgumentParser(
 This x.cpp file is then manually included in V3GraphTest.cpp to verify
 various xsub-algorithms.""",
     epilog=
-    """Copyright 2005-2021 by Wilson Snyder. This program is free software; you
+    """Copyright 2005-2022 by Wilson Snyder. This program is free software; you
 can redistribute it and/or modify it under the terms of either the GNU
 Lesser General Public License Version 3 or the Perl Artistic License
 Version 2.0.

nodist/install_test

@@ -118,7 +118,7 @@ parser = argparse.ArgumentParser(
 Verilator kit.  It isn't part of the normal "make test" due to the number
 of builds required.""",
     epilog=
-    """Copyright 2009-2021 by Wilson Snyder. This program is free software; you
+    """Copyright 2009-2022 by Wilson Snyder. This program is free software; you
 can redistribute it and/or modify it under the terms of either the GNU
 Lesser General Public License Version 3 or the Perl Artistic License
 Version 2.0.

src/.gdbinit

@@ -1,6 +1,6 @@
 # DESCRIPTION: Verilator: GDB startup file with useful defines
 #
-# Copyright 2012-2021 by Wilson Snyder. This program is free software; you
+# Copyright 2012-2022 by Wilson Snyder. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.

src/Makefile.in

@@ -7,7 +7,7 @@
 #
 #*****************************************************************************
 #
-# Copyright 2003-2021 by Wilson Snyder. This program is free software; you
+# Copyright 2003-2022 by Wilson Snyder. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.

src/Makefile_obj.in

@@ -7,7 +7,7 @@
 #
 #*****************************************************************************
 #
-# Copyright 2003-2021 by Wilson Snyder. This program is free software; you
+# Copyright 2003-2022 by Wilson Snyder. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
@@ -75,7 +75,9 @@ VPATH += . $(bldsrc) $(srcdir)
 TGT = ../../verilator_bin$(EXEEXT)
 
 #################
-ifeq ($(VL_DEBUG),)
+ifeq ($(VL_NOOPT),1)
+CPPFLAGS += -O0
+else ifeq ($(VL_DEBUG),)
 # Optimize
 CPPFLAGS += -O2
 else
@@ -197,6 +199,7 @@ RAW_OBJS = \
 	V3Expand.o \
 	V3File.o \
 	V3FileLine.o \
+	V3Force.o \
 	V3Gate.o \
 	V3GenClk.o \
 	V3Global.o \
@@ -271,6 +274,11 @@ NC_OBJS += \
 VLCOV_OBJS = \
 	VlcMain.o \
 
+NON_STANDALONE_HEADERS = \
+	V3AstInlines.h  \
+	V3AstNodes.h  \
+	V3WidthCommit.h  \
+
 #### Linking
 
 ifeq ($(VL_VLCOV),)
@@ -348,6 +356,15 @@ V3PreLex_pregen.yy.cpp:	V3PreLex.l $(HEADERS)
 V3PreLex.yy.cpp: V3PreLex_pregen.yy.cpp $(FLEXFIX)
 	$(PYTHON3) $(FLEXFIX) V3PreLex <$< >$@
 
+# For t_dist_header_cc
+HEADER_CC_H := $(filter-out $(NON_STANDALONE_HEADERS), $(notdir $(wildcard $(srcdir)/*.h)))
+
+.PHONY: header_cc
+header_cc: $(addsuffix __header_cc.o, $(basename $(HEADER_CC_H)))
+
+%__header_cc.cpp: %.h
+	$(PERL) $(srcdir)/../bin/verilator_includer $^ > $@
+
 .SUFFIXES:
 
 ######################################################################

src/V3Active.cpp

@@ -6,7 +6,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2003-2021 by Wilson Snyder. This program is free software; you
+// Copyright 2003-2022 by Wilson Snyder. This program is free software; you
 // can redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.
@@ -32,9 +32,7 @@
 #include "V3Global.h"
 #include "V3Active.h"
 #include "V3Ast.h"
-#include "V3EmitCBase.h"
 #include "V3Const.h"
-#include "V3SenTree.h"  // for SenTreeSet
 #include "V3Graph.h"
 
 #include <unordered_map>
@@ -163,9 +161,9 @@ public:
         LatchDetectGraphVertex* outVertexp;
         if (!nodep->varp()->user1p()) {  // Not seen this output before
             outVertexp = addOutputVertex(nodep);
-        } else
+        } else {
             outVertexp = castVertexp(nodep->varp()->user1p());
-
+        }
         new V3GraphEdge(this, m_curVertexp, outVertexp, 1);
     }
     // Run latchCheckInternal on each variable assigned by the always block to see if all control
@@ -199,7 +197,7 @@ public:
 //######################################################################
 // Collect existing active names
 
-class ActiveBaseVisitor VL_NOT_FINAL : public AstNVisitor {
+class ActiveBaseVisitor VL_NOT_FINAL : public VNVisitor {
 protected:
     VL_DEBUG_FUNC;  // Declare debug()
 };
@@ -211,9 +209,8 @@ private:
     AstActive* m_iActivep = nullptr;  // For current scope, the IActive we're building
     AstActive* m_cActivep = nullptr;  // For current scope, the SActive(combo) we're building
 
-    SenTreeSet m_activeSens;  // Sen lists for each active we've made
-    using ActiveMap = std::unordered_map<AstSenTree*, AstActive*>;
-    ActiveMap m_activeMap;  // Map sentree to active, for folding.
+    // Map from AstSenTree (equivalence) to the corresponding AstActive created.
+    std::unordered_map<VNRef<AstSenTree>, AstActive*> m_activeMap;
 
     // METHODS
     void addActive(AstActive* nodep) {
@@ -225,7 +222,6 @@ private:
         m_scopep = nodep;
         m_iActivep = nullptr;
         m_cActivep = nullptr;
-        m_activeSens.clear();
         m_activeMap.clear();
         iterateChildren(nodep);
         // Don't clear scopep, the namer persists beyond this visit
@@ -259,29 +255,20 @@ public:
         }
         return m_iActivep;
     }
+
+    // Return an AstActive that is sensitive to a SenTree equivalent to the given sentreep.
     AstActive* getActive(FileLine* fl, AstSenTree* sensesp) {
-        // Return a sentree in this scope that matches given sense list.
 
-        AstActive* activep = nullptr;
-        AstSenTree* const activeSenp = m_activeSens.find(sensesp);
-        if (activeSenp) {
-            const auto it = m_activeMap.find(activeSenp);
-            UASSERT(it != m_activeMap.end(), "Corrupt active map");
-            activep = it->second;
-        }
+        auto it = m_activeMap.find(*sensesp);
+        // If found matching AstActive, return it
+        if (it != m_activeMap.end()) return it->second;
 
-        // Not found, form a new one
-        if (!activep) {
-            AstSenTree* const newsenp = sensesp->cloneTree(false);
-            activep = new AstActive(fl, "sequent", newsenp);
-            activep->sensesStorep(activep->sensesp());
-            UINFO(8, "    New ACTIVE " << activep << endl);
-            // Form the sensitivity list
-            addActive(activep);
-            m_activeMap[newsenp] = activep;
-            m_activeSens.add(newsenp);
-            // Note actives may have also been added above in the Active visitor
-        }
+        // No such AstActive yet, creat it, and add to map.
+        AstSenTree* const newsenp = sensesp->cloneTree(false);
+        AstActive* const activep = new AstActive(fl, "sequent", newsenp);
+        activep->sensesStorep(activep->sensesp());
+        addActive(activep);
+        m_activeMap.emplace(*newsenp, activep);
         return activep;
     }
 
@@ -299,7 +286,7 @@ private:
     // NODE STATE
     // Input:
     //  AstVar::user1p // V2LatchGraphVertex* The vertex handling this node
-    const AstUser1InUse m_inuser1;
+    const VNUser1InUse m_inuser1;
     // STATE
     LatchDetectGraph m_graph;  // Graph used to detect latches in combo always
     // VISITORS
@@ -476,7 +463,7 @@ private:
             m_scopeFinalp = new AstCFunc(
                 nodep->fileline(), "_final_" + m_namer.scopep()->nameDotless(), m_namer.scopep());
             m_scopeFinalp->dontCombine(true);
-            m_scopeFinalp->formCallTree(true);
+            m_scopeFinalp->isFinal(true);
             m_scopeFinalp->isStatic(false);
             m_scopeFinalp->isLoose(true);
             m_scopeFinalp->slow(true);

src/V3Active.h

@@ -6,7 +6,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2003-2021 by Wilson Snyder. This program is free software; you
+// Copyright 2003-2022 by Wilson Snyder. This program is free software; you
 // can redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.
@@ -20,8 +20,7 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
-#include "V3Error.h"
-#include "V3Ast.h"
+class AstNetlist;
 
 //============================================================================
 

src/V3ActiveTop.cpp

@@ -6,7 +6,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2003-2021 by Wilson Snyder. This program is free software; you
+// Copyright 2003-2022 by Wilson Snyder. This program is free software; you
 // can redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.
@@ -35,14 +35,14 @@
 //######################################################################
 // Active class functions
 
-class ActiveTopVisitor final : public AstNVisitor {
+class ActiveTopVisitor final : public VNVisitor {
 private:
     // NODE STATE
     //  Entire netlist
     //   AstNode::user()                bool. True if processed
     //  Each call to V3Const::constify
     //   AstNode::user4()               Used by V3Const::constify, called below
-    const AstUser1InUse m_inuser1;
+    const VNUser1InUse m_inuser1;
 
     // STATE
     SenTreeFinder m_finder;  // Find global sentree's / add them under the AstTopScope