Version bump

Squashed commit of the following:

commit c1eeda7d472fc14a0ffd5c1712ae7f7c614073a1
Author: Iztok Jeras <[email protected]>
Date:   Tue Mar 20 16:39:44 2012 +0100

- fixed assignment operator in t_array_packed_write_read.v from = to <=
- added tests for enumerations (existing tests do not use methods like
next(), num(), ...)
- added t_sv_bus_mux_demux test, with packed arrays, structures and unions

.gitignore

@@ -9,6 +9,7 @@
 .*.swp
 *.tmp
 *.tex
+*.pdf
 /Makefile
 README
 autom4te.cache
@@ -16,8 +17,8 @@ config.cache
 config.status
 configure
 dddrun*
+doxygen-doc
 gdbrun*
 internals.txt
-verilator.pdf
 verilator.txt
 verilator_bin*

Changes

@@ -4,6 +4,69 @@ The contributors that suggested a given feature are shown in [].  [by ...]
 indicates the contributor was also the author of the fix; Thanks!
 
 
+* Verilator 3.833 2012/04/15
+
+***   Support += and -= in standard for loops, bug463. [Alex Solomatnikov]
+
+***   Fix processing unused parametrized modules, bug469, bug470.  [Alex Solomatnikov]
+
+****  Add SELRANGE as warning instead of error, bug477. [Alex Solomatnikov]
+
+****  Add readme.pdf and internal.pdf and doxygen, bug483.  [by Jeremy Bennett]
+
+****  Fix change detections on arrays, bug364.  [John Stevenson, Alex Solomatnikov]
+
+****  Fix signed array warning, bug456. [Alex Solomatnikov]
+
+****  Fix genvar and begin under generate, bug461.  [Alex Solomatnikov]
+
+****  Fix real constant parameter functions, bug475.  [Alex Solomatnikov]
+
+****  Fix and document --gdb option, bug454. [Jeremy Bennett]
+
+****  Fix OpenSolaris compile error. [Sanjay Singh]
+
+
+* Verilator 3.832 2012/03/07
+
+***   Fix memory delayed assignments from multiple clock domains. [Andrew Ling]
+
+***   Support arrayed SystemC I/O pins.  [Christophe Joly]
+
+***   Report MULTIDRIVEN on memories set in multiple clock domains.
+
+***   Report ENDLABEL on mismatching end labels, bug450. [Iztok Jeras]
+
+****  Fix expansion of back-slashed escaped macros, bug441. [Alberto Del Rio]
+
+****  Fix inheriting real and signed type across untyped parameters.
+
+****  Fix core dump with over 100 deep UNOPTFLAT, bug432. [Joe Eiler]
+
+****  Fix false command not found warning in makefiles. [Ruben Diez]
+
+****  Fix hang when functions inside begin block. [David Welch]
+
+****  Fix hang on recursive substitution `defines, bug443. [Alex Solomatnikov]
+
+
+* Verilator 3.831 2012/01/20
+
+**    Support SystemC 2.3.0 prerelease.  This requires setting the new
+      SYSTEMC_INCLUDE and SYSTEMC_LIBDIR variables in place of now
+      deprecated SYSTEMC and SYSTEMC_ARCH.  [Iztok Jeras]
+
+****  Suppress VARHIDDEN on dpi import arguments.  [Ruben Diez]
+
+****  Support "generate for (genvar i=0; ...".  [David Kravitz]
+
+****  Fix dpi exports with > 32 bit but < 64 bit args, bug423. [Chandan Egbert]
+
+****  Fix array of instantiations with sub-range output, bug414. [Jeremy Bennett]
+
+****  Fix BLKSEQ warnings on variables declared inside always. [Ruben Diez]
+
+
 * Verilator 3.830 2011/11/27
 
 **   With "--language VAMS" support a touch of Verilog AMS.  [Holger Waechtler]
@@ -16,7 +79,7 @@ indicates the contributor was also the author of the fix; Thanks!
 
 **** Support $system.  [Ruben Diez]
 
-**** Support $sscanf with %g. [Holger Wächtler]
+**** Support $sscanf with %g. [Holger Waechtler]
 
 **** Indicate 'exiting due to errors' if errors, not warnings. [Ruben Diez]
 
@@ -24,7 +87,7 @@ indicates the contributor was also the author of the fix; Thanks!
 
 **** Fix reporting not found modules if generate-off, bug403. [Jeremy Bennett]
 
-**** Fix $display with %d following %g. [Holger Wächtler]
+**** Fix $display with %d following %g. [Holger Waechtler]
 
 
 * Verilator 3.824 2011/10/25
@@ -1975,7 +2038,7 @@ of input ports exists for tracing.
 
 This uses outline mode in Emacs.  See C-h m [M-x describe-mode].
 
-Copyright 2001-2011 by Wilson Snyder.  This program is free software; you
+Copyright 2001-2012 by Wilson Snyder.  This program is free software; you
 can redistribute it and/or modify it under the terms of either the GNU
 Lesser General Public License Version 3 or the Perl Artistic License
 Version 2.0.

MANIFEST.SKIP

@@ -1,5 +1,6 @@
 ^CVS/
 /CVS/
+\.gdbinit$
 \.git/
 \.svn/
 \.(bak|old)/
@@ -34,3 +35,4 @@ nodist/
 /simv.daidir/
 /vc_hdrs.h$
 /csrc/
+doxygen-doc/.*

Makefile.in

@@ -9,7 +9,7 @@
 #
 #*****************************************************************************
 #
-# Copyright 2003-2011 by Wilson Snyder. This program is free software; you can
+# Copyright 2003-2012 by Wilson Snyder. This program is free software; you can
 # redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
@@ -54,11 +54,13 @@ srcdir = @srcdir@
 VPATH = @srcdir@
 HOST = @HOST@
 
+DOXYGEN = doxygen
 INSTALL = @INSTALL@
 INSTALL_PROGRAM = @INSTALL_PROGRAM@
 INSTALL_DATA = @INSTALL_DATA@
 MAKEINFO = makeinfo
 POD2TEXT = pod2text
+POD2LATEXFIX = $(srcdir)/src/pod2latexfix
 PERL = @PERL@
 
 # Destination prefix for RPMs
@@ -100,7 +102,8 @@ SHELL = /bin/sh
 
 SUBDIRS = src test_verilated test_c test_sc test_sp test_regress test_vcs
 
-INFOS = README internals.txt verilator.txt verilator.html verilator.1 verilator.pdf
+INFOS = README README.html README.pdf internals.txt internals.html \
+        internals.pdf verilator.txt verilator.html verilator.1 verilator.pdf
 
 # Files that can be generated, but should be up to date for a distribution.
 DISTDEP = info Makefile
@@ -110,6 +113,7 @@ DISTFILES_INC = $(INFOS) .gitignore Artistic COPYING COPYING.LESSER \
 	Changes TODO \
 	MANIFEST.SKIP \
 	bin/* \
+	doxygen-mainpage doxygen.config veripool-logo.png \
 	install-sh configure mkinstalldirs *.pod \
 	include/*.[chv]* \
 	include/*.in \
@@ -121,7 +125,8 @@ DISTFILES_INC = $(INFOS) .gitignore Artistic COPYING COPYING.LESSER \
 	test_*/.*ignore test_*/Makefile* test_*/*.cpp \
 	test_*/*.pl test_*/*.v test_*/*.vc test_*/*.vh \
 	test_verilated/vgen*.pl \
-	test_regress/t/tsub/*.v* \
+	test_regress/t/t*/*.sv* \
+	test_regress/t/t*/*.v* \
 	test_regress/t/*.cpp \
 	test_regress/t/*.h \
 	test_regress/t/*.dat \
@@ -164,7 +169,7 @@ verilator_exe verilator_bin verilator_bin_dbg:
 	  (cd src && $(MAKE) $(OBJCACHE_JOBS) )
 
 .PHONY:msg_test
-msg_test:
+msg_test: all_nomsg
 	@echo "Build complete!"
 	@echo
 	@echo "Type 'make test' to test."
@@ -215,15 +220,7 @@ verilator.html: ${srcdir}/bin/verilator
 # PDF needs DIST variables; but having configure.ac as dependency isn't detected
 verilator.pdf: ${srcdir}/bin/verilator Makefile
 	pod2latex --full --out verilator.tex ${srcdir}/bin/verilator
-	cat < verilator.tex \
-	   | sed 's/\\begin{document}/\\usepackage[left=1.7in,right=1.7in,top=1.3in,bottom=1.3in]{geometry}\n\\begin{document}/' \
-	   | sed 's/\\begin{document}/\\usepackage[pdftex,bookmarks=true,bookmarksnumbered=true,hypertexnames=false,breaklinks=true,linkbordercolor={0 0 1}]{hyperref}\n\\begin{document}/' \
-	   | sed 's/\\begin{document}/\\usepackage{fancyhdr} \\pagestyle{fancy}\n\\begin{document}/' \
-	   | sed 's/\\begin{document}/\\setlength{\\parindent}{0pt} \\setlength{\\parskip}{\\baselineskip}\n\\begin{document}/' \
-	   | sed 's/\\begin{document}/\\title{$(DISTTITLE)} \\date{${DISTDATE}} \\author{Wilson Snyder\\\\ http:\/\/www.veripool.org}\n\\begin{document}/' \
-	   | sed 's/\\begin{document}/\\lhead[$(DISTTITLE)]{$(DISTTITLE)}\n\\begin{document}/' \
-	   | sed 's/\\tableofcontents/\\begin{titlepage} \\maketitle \\end{titlepage}\n\\tableofcontents/' \
-	   > verilator2.tex
+	$(PERL) $(POD2LATEXFIX) "$(DISTTITLE)" "${DISTDATE}" < verilator.tex > verilator2.tex
 	mv verilator2.tex verilator.tex
 	pdflatex verilator.tex
 	pdflatex verilator.tex
@@ -233,10 +230,34 @@ README: readme.pod
 	-rm -f $@
 	$(POD2TEXT) --loose $< > $@
 
+README.html: readme.pod
+	pod2html $< >$@
+
+# PDF needs DIST variables; but having configure.ac as dependency isn't detected
+README.pdf: readme.pod Makefile
+	pod2latex --full --out README.tex readme.pod
+	$(PERL) $(POD2LATEXFIX) "$(DISTTITLE) README File" "${DISTDATE}" < README.tex > README2.tex
+	mv README2.tex README.tex
+	pdflatex README.tex
+	pdflatex README.tex
+	-rm -f README.toc README.aux README.idx README.out
+
 internals.txt: internals.pod
 	-rm -f $@
 	$(POD2TEXT) --loose $< > $@
 
+internals.html: internals.pod
+	pod2html $< >$@
+
+# PDF needs DIST variables; but having configure.ac as dependency isn't detected
+internals.pdf: internals.pod Makefile
+	pod2latex --full --out internals.tex internals.pod
+	$(PERL) $(POD2LATEXFIX) "$(DISTTITLE) Internals Manual" "${DISTDATE}" < internals.tex > internals2.tex
+	mv internals2.tex internals.tex
+	pdflatex internals.tex
+	pdflatex internals.tex
+	-rm -f internals.toc internals.aux internals.idx internals.out
+
 # See uninstall also - don't put wildcards in this variable, it might uninstall other stuff
 VL_INST_BIN_FILES = verilator verilator_bin verilator_bin_dbg \
 	verilator_includer verilator_profcfunc
@@ -313,7 +334,8 @@ uninstall:
 	-rmdir $(DESTDIR)$(pkgdatadir)/examples
 	-rmdir $(DESTDIR)$(pkgdatadir)
 
-install: all_nomsg installbin installman installdata install-msg
+install: all_nomsg install-all
+install-all: installbin installman installdata install-msg
 
 install-here: installman ftp
 
@@ -441,6 +463,11 @@ TAGFILES=${srcdir}/*/*.cpp ${srcdir}/*/*.h ${srcdir}/*/[a-z]*.in \
 TAGS:	$(TAGFILES)
 	etags $(TAGFILES)
 
+.PHONY: doxygen
+
+doxygen:
+	$(DOXYGEN) doxygen.config
+
 ######################################################################
 # Test targets
 

TODO

@@ -1,6 +1,6 @@
 // DESCRIPTION: Verilator: List of To Do issues.
 //
-// Copyright 2004-2011 by Wilson Snyder. This program is free software; you can
+// Copyright 2004-2012 by Wilson Snyder. This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.
@@ -62,7 +62,7 @@ Usability:
 	* Print version/etc message at runtime. (4.000?)
 	  Include number of lines of code, percent comments, code complexity measurement
 	  <-80chars------------------------------------------------------------------->
-	  Verilator 3.600 - fast, free, open-sourced.  Copyright 2001-2011.
+	  Verilator 3.600 - fast, free, open-sourced.  Copyright 2001-2012.
 	  Verilated #### modules, #### instances, ##### sigs,
 	  	    #### non-comment lines, ##### ops, ### KB model size
 	* Default the --l2name to remove extra "v" level of hierarchy (flag to make "top")

bin/verilator

@@ -3,7 +3,7 @@ eval 'exec perl -wS $0 ${1+"$@"}'
   if 0;
 ######################################################################
 #
-# Copyright 2003-2011 by Wilson Snyder. This program is free software; you
+# Copyright 2003-2012 by Wilson Snyder. This program is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
@@ -69,7 +69,7 @@ if (! GetOptions (
 		  "debug:s"	=> \&debug,
 		  # "version!"	=> \&version,	# Also passthru'ed
 		  # Switches
-		  "gdb=s"	=> \$opt_gdb,	# Undocumented debugging
+		  "gdb!"	=> \$opt_gdb,
 		  "gdbbt!"	=> \$opt_gdbbt,
 		  # Additional parameters
 		  "<>"		=> sub {},	# Ignored
@@ -82,17 +82,24 @@ if ($opt_gdbbt && !gdb_works()) {
     warn "-Info: --gdbbt ignored: gdb doesn't seem to be working\n" if $Debug;
     $opt_gdbbt = 0;
 }
-if ($opt_gdbbt && !$opt_gdb && $Debug) {
+if ($opt_gdb) {
+    # Generic GDB interactive
+    run (("gdb"||$ENV{VERILATOR_GDB})
+	 ." ".verilator_bin()
+	 ." -ex 'run ".join(' ',@Opt_Verilator_Sw)."'"
+	 ." -ex 'set width 0'"
+	 ." -ex 'bt'");
+} elsif ($opt_gdbbt && $Debug) {
     # Run under GDB to get gdbbt
-    run ("gdb ".verilator_bin()
+    run ("gdb"
+	 ." ".verilator_bin()
 	 ." --batch --quiet --return-child-result"
 	 ." -ex 'run ".join(' ',@Opt_Verilator_Sw)."'"
 	 ." -ex 'set width 0'"
 	 ." -ex 'bt'");
 } else {
     # Normal, non gdb
-    run (($opt_gdb?"$opt_gdb ":"")
-	 .verilator_bin()
+    run (verilator_bin()
 	 ." ".join(' ',@Opt_Verilator_Sw));
 }
 
@@ -247,7 +254,7 @@ descriptions in the next sections for more information.
     --coverage-line             Enable line coverage
     --coverage-toggle           Enable toggle coverage
     --coverage-user             Enable PSL/SVL user coverage
-    --coverage-underscore       Enable covarge of _signals
+    --coverage-underscore       Enable coverage of _signals
      -D<var>[=<value>]          Set preprocessor define
     --debug                     Enable debugging
     --debug-check               Enable debugging assertions
@@ -255,11 +262,13 @@ descriptions in the next sections for more information.
     --debugi-<srcfile> <level>  Enable debugging a source file at a level
      +define+<var>+<value>      Set preprocessor define
     --dump-tree                 Enable dumping .tree files
+    --dump-treei <level>        Enable dumping .tree files at a level
      -E                         Preprocess, but do not compile
     --error-limit <value>       Abort after this number of errors
     --exe                       Link to create executable
      -F <file>                  Parse options from a file, relatively
      -f <file>                  Parse options from a file
+    --gdb                       Run Verilator under GDB interactively
     --gdbbt                     Run Verilator under GDB for backtrace
     --help                      Display this help
      -I<dir>                    Directory to search for includes
@@ -521,9 +530,16 @@ standard across Verilog tools while -D is an alias for GCC compatibility.
 
 =item --dump-tree
 
-Rarely needed.  Enable writing .tree debug files.  This is enabled with
---debug, so "--debug --no-dump-tree" may be useful if the dump files are
-large and not desired.
+Rarely needed.  Enable writing .tree debug files with dumping level 3,
+which dumps the standard critical stages.  --dump-tree is enabled
+automatically with --debug, so "--debug --no-dump-tree" may be useful if
+the dump files are large and not desired.
+
+=item --dump-treei
+
+Rarely needed.  Enable writing .tree debug files with a specific dumping
+level, 0 disbles dumps and is equivelent to "--no-dump-tree".  Level 9
+enables dumping of every stage.
 
 =item -E
 
@@ -538,7 +554,7 @@ After this number of errors or warnings are encountered, exit.  Defaults to
 
 =item --exe
 
-Generate a executable.  You will also need to pass additional .cpp files on
+Generate an executable.  You will also need to pass additional .cpp files on
 the command line that implement the main loop for your simulation.
 
 =item -F I<file>
@@ -558,11 +574,17 @@ The file may contain // comments which are ignored to the end of the line.
 Any $VAR, $(VAR), or ${VAR} will be replaced with the specified environment
 variable.
 
+=item --gdb
+
+Run Verilator underneath an interactive GDB (or VERILATOR_GDB environment
+variable value) session.  See also --gdbbt.
+
 =item --gdbbt
 
-If --debug is specified, run Verilator underneath a GDB process and print
-a backtrace on exit.  Without --debug or if GDB doesn't seem to work, this
-flag is ignored.
+If --debug is specified, run Verilator underneath a GDB process and print a
+backtrace on exit, then exit GDB immediately.  Without --debug or if GDB
+doesn't seem to work, this flag is ignored.  Intended for easy creation of
+backtraces by users; otherwise see the --gdb flag.
 
 =item --help
 
@@ -584,7 +606,7 @@ See -y.
 =item --inhibit-sim
 
 Rarely needed.  Create a "inhibitSim(bool)" function to enable and disable
-evaluation.  This allows a upper level testbench to disable modules that
+evaluation.  This allows an upper level testbench to disable modules that
 are not important in a given simulation, without needing to recompile or
 change the SystemC modules instantiated.
 
@@ -885,7 +907,7 @@ disabled by default.
 
 =item -Werror-I<message>
 
-Convert the specified warning message into a error message.  This is
+Convert the specified warning message into an error message.  This is
 generally to discourage users from violating important site-wide rules, for
 example C<-Werror-NOUNOPTFLAT>.
 
@@ -905,9 +927,9 @@ Disable the specified warning message.
 
 Disable all lint related warning messages, and all style warnings.  This is
 equivalent to "-Wno-CASEINCOMPLETE -Wno-CASEOVERLAP -Wno-CASEX
--Wno-CASEWITHX -Wno-CMPCONST -Wno-IMPLICIT -Wno-LITENDIAN -Wno-SYNCASYNCNET
--Wno-UNDRIVEN -Wno-UNSIGNED -Wno-UNUSED -Wno-WIDTH" plus the list shown for
-Wno-style.
+-Wno-CASEWITHX -Wno-CMPCONST -Wno-ENDLABEL -Wno-IMPLICIT -Wno-LITENDIAN
+-Wno-SYNCASYNCNET -Wno-UNDRIVEN -Wno-UNSIGNED -Wno-UNUSED -Wno-WIDTH" plus
+the list shown for Wno-style.
 
 It is strongly recommended you cleanup your code rather than using this
 option, it is only intended to be use when running test-cases of code
@@ -937,8 +959,8 @@ Enables the specified warning message.
 Enable all lint related warning messages (note by default they are already
 enabled), but do not affect style messages.  This is equivalent to
 "-Wwarn-CASEINCOMPLETE -Wwarn-CASEOVERLAP -Wwarn-CASEX -Wwarn-CASEWITHX
--Wwarn-CMPCONST -Wwarn-IMPLICIT -Wwarn-LITENDIAN -Wwarn-REALCVT
--Wwarn-UNSIGNED -Wwarn-WIDTH".
+-Wwarn-CMPCONST -Wwarn-ENDLABEL -Wwarn-IMPLICIT -Wwarn-LITENDIAN
+-Wwarn-REALCVT -Wwarn-UNSIGNED -Wwarn-WIDTH".
 
 =item -Wwarn-style
 
@@ -1103,8 +1125,8 @@ We then can compile it
 And link with SystemC.  Note your path to the libraries may vary,
 depending on the operating system.
 
-    export SYSTEMC=/path/to/where/systemc/was/built/or/installed
-    g++ -L$SYSTEMC/lib-linux ../sc_main.o Vour__ALL*.o verilated.o \
+    export SYSTEMC_LIBDIR=/path/to/where/libsystemc.a/exists
+    g++ -L$SYSTEMC_LIBDIR ../sc_main.o Vour__ALL*.o verilated.o \
               -o Vour -lsystemc
 
 And now we run it
@@ -1240,24 +1262,39 @@ or ccache; see the documentation for those programs.
 
 =item SYSTEMC
 
-Required for SystemC output mode.  If set, specifies the directory
-containing the SystemC distribution.  This is used to find the SystemC
-include files.  If not specified, it will come from a default optionally
-specified at configure time (before Verilator was compiled).
+Deprecated.  Used only if SYSTEMC_INCLUDE or SYSTEMC_LIBDIR is not set.  If
+set, specifies the directory containing the SystemC distribution.  If not
+specified, it will come from a default optionally specified at configure
+time (before Verilator was compiled).
 
 =item SYSTEMC_ARCH
 
-Specifies the architecture name used by the SystemC kit.  This is the part
-after the dash in the lib-{...} directory name created by a 'make' in the
-SystemC distribution.  If not set, Verilator will try to intuit the proper
-setting, or use the default optionally specified at configure time (before
-Verilator was compiled).  .
+Deprecated.  Used only if SYSTEMC_LIBDIR is not set.  Specifies the
+architecture name used by the SystemC kit.  This is the part after the dash
+in the lib-{...} directory name created by a 'make' in the SystemC
+distribution.  If not set, Verilator will try to intuit the proper setting,
+or use the default optionally specified at configure time (before Verilator
+was compiled).
 
 =item SYSTEMC_CXX_FLAGS
 
 Specifies additional flags that are required to be passed to GCC when
 building the SystemC model.
 
+=item SYSTEMC_INCLUDE
+
+If set, specifies the directory containing the systemc.h header file. If
+not specified, it will come from a default optionally specified at
+configure time (before Verilator was compiled), or computed from
+SYSTEMC/include.
+
+=item SYSTEMC_LIBDIR
+
+If set, specifies the directory containing the libsystemc.a library. If not
+specified, it will come from a default optionally specified at configure
+time (before Verilator was compiled), or computed from
+SYSTEMC/lib-SYSTEMC_ARCH.
+
 =item SYSTEMPERL
 
 Specifies the directory containing the SystemPerl distribution kit.  This
@@ -1284,6 +1321,11 @@ baseline regression tests.
 If set, specifies an alternative name of the Verilator binary.  May be used
 for debugging and selecting between multiple operating system builds.
 
+=item VERILATOR_GDB
+
+If set, the command to run when using the --gdb option, such as "ddd".  If
+not specified, it will use "gdb".
+
 =item VERILATOR_ROOT
 
 Specifies the directory containing the distribution kit.  This is used to
@@ -1436,6 +1478,26 @@ DPI compatible but is easier to read and better supports multiple designs.
     Vour::publicSetBool(value);
     // or top->publicSetBool(value);
 
+Note that if the DPI task or function accesses any register or net within the
+RTL, it will require a scope to be set. This can be done using the standard
+functions within svdpi.h, after the module is instantiated, but before the
+task(s) and/or function(s) are called.
+
+For example, if the top level module is instantiated with the name "dut" and
+the name references within tasks are all hierarchical (dotted) names with
+respect to that top level module, then the scope could be set with
+
+    #include "svdpi.h"
+    ...
+    svSetScope (svGetScopeFromName ("dut"));
+
+(Remember that Verilator adds a "V" to the top of the module hierarchy.)
+
+Scope can also be set from within a DPI imported C function that has been
+called from Verilog by querying the scope of that function. See the
+sections on DPI Context Functions and DPI Header Isolation below and the
+comments within the svdpi.h header for more information.
+
 =head2 DPI Display Functions
 
 Verilator allows writing $display like functions using this syntax:
@@ -1732,9 +1794,9 @@ assertion clocks.
 
 =head2 Synthesis Directive Assertion Support
 
-With the --assert switch, Verilator reads any "//synopsys full_case" or "//
-synopsys parallel_case" directives.  The same applies to any "// ambit
-synthesis", "//cadence" or "//pragma" directives of the same form.
+With the --assert switch, Verilator reads any "//synopsys full_case" or
+"//synopsys parallel_case" directives.  The same applies to any
+"//ambit synthesis", "//cadence" or "//pragma" directives of the same form.
 
 When these synthesis directives are discovered, Verilator will either
 formally prove the directive to be true, or failing that, will insert the
@@ -1797,7 +1859,7 @@ other optimizations.
 If you will be reading or writing any Verilog variables inside the C++
 functions, the Verilog signals must be declared with /*verilator public*/.
 
-You may also append a arbitrary number to $c, generally the width of the
+You may also append an arbitrary number to $c, generally the width of the
 output.  [signal_32_bits = $c32("...");] This allows for compatibility with
 other simulators which require a differently named PLI function name for
 each different output width.
@@ -1853,7 +1915,7 @@ Despite the name of this macro, this also works in pure C++ code.
 
 If you will be reading or writing any Verilog variables in the C++
 functions, the Verilog signals must be declared with /*verilator public*/.
-See also the public task feature; writing a accessor may result in cleaner
+See also the public task feature; writing an accessor may result in cleaner
 code.
 
 =item `VERILATOR
@@ -1880,9 +1942,17 @@ The Verilog code returns to the last language mode specified with
 
 Used after a signal declaration to indicate the signal is used to gate a
 clock, and the user takes responsibility for insuring there are no races
-related to it.  (Typically by adding a latch, and running static timing
-analysis.) This will cause the clock gate to be ignored in the scheduling
-algorithm, improving performance.  It's also a good idea to enable the
+related to it. (Typically by adding a latch, and running static timing
+analysis.) For example:
+
+   reg enable_r /*verilator clock_enable*/;
+   wire gated_clk = clk & enable_r;
+   always_ff @ (posedge clk)
+      enable_r <= enable_early;
+
+The clock_enable attribute will cause the clock gate to be ignored in the
+scheduling algorithm, sometimes required for correct clock behavior, and
+always improving performance.  It's also a good idea to enable the
 IMPERFECTSCH warning, to insure all clock enables are properly recognized.
 
 =item /*verilator coverage_block_off*/
@@ -1984,7 +2054,7 @@ be pure; they cannot reference any variables outside the task itself.
 
 =item /*verilator public*/ (variable)
 
-Used after a input, output, register, or wire declaration to indicate the
+Used after an input, output, register, or wire declaration to indicate the
 signal should be declared so that C code may read or write the value of the
 signal.  This will also declare this module public, otherwise use
 /*verilator public_flat*/.
@@ -2006,7 +2076,7 @@ stack.
 
 Wide variables over 64 bits cannot be function returns, to avoid exposing
 complexities.  However, wide variables can be input/outputs; they will be
-passed as references to an array of 32 bit numbers.
+passed as references to an array of 32-bit numbers.
 
 Generally, only the values of stored state (flops) should be written, as
 the model will NOT notice changes made to variables in these functions.
@@ -2017,7 +2087,7 @@ simulators.
 
 =item /*verilator public_flat*/ (variable)
 
-Used after a input, output, register, or wire declaration to indicate the
+Used after an input, output, register, or wire declaration to indicate the
 signal should be declared so that C code may read or write the value of the
 signal.  This will not declare this module public, which means the name of
 the signal or path to it may change based upon the module inlining which
@@ -2025,12 +2095,12 @@ takes place.
 
 =item /*verilator public_flat_rd*/ (variable)
 
-Used after a input, output, register, or wire declaration to indicate the
+Used after an input, output, register, or wire declaration to indicate the
 signal should be declared public_flat (see above), but read-only.
 
 =item /*verilator public_flat_rw @(<edge_list>) */ (variable)
 
-Used after a input, output, register, or wire declaration to indicate the
+Used after an input, output, register, or wire declaration to indicate the
 signal should be declared public_flat_rd (see above), and also writable,
 where writes should be considered to have the timing specified by the given
 sensitivity edge list.
@@ -2045,7 +2115,7 @@ using the --public switch.
 
 =item /*verilator sc_clock*/
 
-Rarely needed.  Used after a input declaration to indicate the signal
+Rarely needed.  Used after an input declaration to indicate the signal
 should be declared in SystemC as a sc_clock instead of a bool.  This was
 needed in SystemC 1.1 and 1.2 only; versions 2.0 and later do not require
 clock pins to be sc_clocks and this is no longer needed.
@@ -2181,7 +2251,7 @@ Pullup, pulldown, bufif0, bufif1, notif0, notif1 are also supported.
 External logic will be needed to combine these signals with any external
 drivers.
 
-Tristate drivers are not supported inside functions and tasks; a inout
+Tristate drivers are not supported inside functions and tasks; an inout
 there will be considered a two state variable that is read and written
 instead of a four state variable.
 
@@ -2199,10 +2269,12 @@ different.)
 
 =head2 Generated Clocks
 
-Verilator attempts to deal with generated clocks correctly, however new
-cases may turn up bugs in the scheduling algorithm.  The safest option is
-to have all clocks as primary inputs to the model, or wires directly
-attached to primary inputs.
+Verilator attempts to deal with generated and enabled clocks correctly,
+however some cases cause problems in the scheduling algorithm which is
+optimized for performance.  The safest option is to have all clocks as
+primary inputs to the model, or wires directly attached to primary inputs.
+For proper behavior clock enables may also need the /*verilator
+clock_enable*/ attribute.
 
 =head2 Ranges must be big-bit-endian
 
@@ -2570,6 +2642,14 @@ designs should now be using the #(...) format to specify parameters.
 Disabled by default as this is a code style warning; it will simulate
 correctly.
 
+=item ENDLABEL
+
+Warns that a label attached to a "end"-something statement does not match
+the label attached to the block start.
+
+Ignoring this warning will only suppress the lint check, it will simulate
+correctly.
+
 =item GENCLK
 
 Warns that the specified signal is generated, but is also being used as a
@@ -2691,6 +2771,23 @@ is not possible, add a undef to indicate the code is overriding the value:
     `undef MACRO
     `define MACRO otherdef
 
+=item SELRANGE
+
+Warns that a selection index will go out of bounds:
+
+    wire vec[6:0];
+    initial out = vec[7];  // There is no 7
+
+Verilator will assume zero for this value, instead of X.  Note that in some
+cases this warning may be false, when a condition upstream or downstream of
+the access means the access out of bounds will never execute or be used.
+
+    wire vec[6:0];
+    initial begin
+        seven = 7;
+        ...
+        if (seven != 7) out = vec[seven];  // Never will use vec[7]
+
 =item STMTDLY
 
 Warns that you have a statement with a delayed time in front of it, for
@@ -2712,7 +2809,7 @@ Verilator to avoid the conflict.
 
 Warns that the specified net is used in at least two different always
 statements with posedge/negedges (i.e. a flop).  One usage has the signal
-in the sensitivity list and body, probably as a async reset, and the other
+in the sensitivity list and body, probably as an async reset, and the other
 usage has the signal only in the body, probably as a sync reset.  Mixing
 sync and async resets is usually a mistake.  The warning may be disabled
 with a lint_off pragma around the net, or either flopped block.
@@ -2891,7 +2988,7 @@ correctly.
 =item WIDTHCONCAT
 
 Warns that based on width rules of Verilog, a concatenate or replication
-has a indeterminate width.  In most cases this violates the Verilog rule
+has an indeterminate width.  In most cases this violates the Verilog rule
 that widths inside concatenates and replicates must be sized, and should be
 fixed in the code.
 
@@ -3014,7 +3111,7 @@ Verilator creates internally all of the state of the resulting simulator in
 order to optimize it.  If it takes more than a minute or so (and you're not
 using --debug since debug is disk bound), see if your machine is paging;
 most likely you need to run it on a machine with more memory.  Verilator is
-a full 64 bit application and may use more than 4GB, but about 1GB is the
+a full 64-bit application and may use more than 4GB, but about 1GB is the
 maximum typically needed.
 
 =item How do I generate waveforms (traces) in C++?
@@ -3136,7 +3233,7 @@ with '%' to see what lines Verilator believes need more coverage.
 Translate on/off pragmas are generally a bad idea, as it's easy to have
 mismatched pairs, and you can't see what another tool sees by just
 preprocessing the code.  Instead, use the preprocessor; Verilator defines
-the "VERILATOR" define for you, so just wrap the code in a ifndef region:
+the "VERILATOR" define for you, so just wrap the code in an ifndef region:
 
    `ifndef VERILATOR
       Something_Verilator_Dislikes;
@@ -3234,14 +3331,14 @@ be accessing with a /*verilator public*/ comment before the closing
 semicolon.  Then scope into the C++ class to read the value of the signal,
 as you would any other member variable.
 
-Signals are the smallest of 8 bit chars, 16 bit shorts, 32 bit longs, or 64
-bit long longs that fits the width of the signal.  Generally, you can use
-just uint32_t's for 1 to 32 bits, or vluint64_t for 1 to 64 bits, and the
-compiler will properly up-convert smaller entities.
+Signals are the smallest of 8-bit chars, 16-bit shorts, 32-bit longs, or
+64-bit long longs that fits the width of the signal.  Generally, you can
+use just uint32_t's for 1 to 32 bits, or vluint64_t for 1 to 64 bits, and
+the compiler will properly up-convert smaller entities.
 
 Signals wider than 64 bits are stored as an array of 32-bit uint32_t's.
 Thus to read bits 31:0, access signal[0], and for bits 63:32, access
-signal[1].  Unused bits (for example bit numbers 65-96 of a 65 bit vector)
+signal[1].  Unused bits (for example bit numbers 65-96 of a 65-bit vector)
 will always be zero.  if you change the value you must make sure to pack
 zeros in the unused bits or core-dumps may result.  (Because Verilator
 strips array bound checks where it believes them to be unnecessary.)
@@ -3347,49 +3444,50 @@ faster than many popular commercial simulators.
 Many people have provided ideas and other assistance with Verilator.
 
 The major corporate sponsors of Verilator, by providing significant
-contributions of time or funds include include Compaq Corporation, Digital
-Equipment Corporation, Intel Corporation, Mindspeed Technologies Inc.,
-MicroTune Inc., picoChip Designs Ltd., Sun Microsystems, Nauticus Networks,
-and SiCortex Inc.
+contributions of time or funds include include Cavium Networks, Compaq
+Corporation, Digital Equipment Corporation, Embecosm Ltd., Intel
+Corporation, Mindspeed Technologies Inc., MicroTune Inc., picoChip Designs
+Ltd., Sun Microsystems, Nauticus Networks, and SiCortex Inc.
 
-The people who have contributed major functionality are Byron Bradley, Lane
-Brooks, Duane Galbi, Paul Wasson, and Wilson Snyder.  Major testers include
-Jeff Dutton, Ralf Karge, David Hewson, Wim Michiels, and Gene Weber.
+The people who have contributed major functionality are Byron Bradley,
+Jeremy Bennett, Lane Brooks, Duane Galbi, Paul Wasson, and Wilson Snyder.
+Major testers include Jeff Dutton, Ralf Karge, David Hewson, Wim Michiels,
+Alex Solomatnikov, Sebastien Van Cauwenberghe and Gene Weber.
 
 Some of the people who have provided ideas and feedback for Verilator
-include: David Addison, Hans Van Antwerpen, Vasu Arasanipalai, Jens Arm, J
-Baxter, Jeremy Bennett, David Black, Gregg Bouchard, Christopher Boumenot,
-Nick Bowler, Byron Bradley, Bryan Brady, Lane Brooks, John Brownlee,
-Lawrence Butcher, Chris Candler, Lauren Carlson, Donal Casey, Terry Chen,
-Robert A. Clark, Allan Cochrane, Gunter Dannoritzer, Ashutosh Das, Bernard
-Deadman, John Deroo, John Dickol, Danny Ding, Ivan Djordjevic, Alex Duller,
-Jeff Dutton, Chandan Egbert, Joe Eiler, Ahmed El-Mahmoudy, Robert Farrell,
-Eugen Fekete, Andrea Foletto, Bob Fredieu, Shankar Giri, Sam Gladstone,
-Amir Gonnen, Chitlesh Goorah, Neil Hamilton, Thomas Hawkins, David Hewson,
-Jae Hossell, Ben Jackson, Iztok Jeras, Mike Kagen, Guy-Armand Kamendje,
-Vasu Kandadi, Patricio Kaplan, Ralf Karge, Dan Katz, Sol Katzman, Jonathan
-Kimmitt, Gernot Koch, Soon Koh, Steve Kolecki, Steve Lang, Stephane
-Laurent, Christian Leber, Charlie Lind, Paul Liu, Dan Lussier, Fred Ma,
+include: David Addison, Vasu Arasanipalai, Jens Arm, J Baxter, Jeremy
+Bennett, David Black, Gregg Bouchard, Christopher Boumenot, Nick Bowler,
+Byron Bradley, Bryan Brady, Lane Brooks, John Brownlee, Lawrence Butcher,
+Chris Candler, Lauren Carlson, Donal Casey, Terry Chen, Robert A. Clark,
+Allan Cochrane, Gunter Dannoritzer, Ashutosh Das, Bernard Deadman, Mike
+Denio, John Deroo, John Dickol, Ruben Diez, Danny Ding, Ivan Djordjevic,
+Alex Duller, Jeff Dutton, Chandan Egbert, Joe Eiler, Ahmed El-Mahmoudy,
+Robert Farrell, Eugen Fekete, Andrea Foletto, Bob Fredieu, Shankar Giri,
+Sam Gladstone, Amir Gonnen, Chitlesh Goorah, Neil Hamilton, Thomas Hawkins,
+David Hewson, Jae Hossell, Ben Jackson, Iztok Jeras, Christophe Joly, Mike
+Kagen, Guy-Armand Kamendje, Vasu Kandadi, Patricio Kaplan, Ralf Karge, Dan
+Katz, Sol Katzman, Jonathan Kimmitt, Gernot Koch, Soon Koh, Steve Kolecki,
+David Kravitz, Steve Lang, Stephane Laurent, Walter Lavino, Christian
+Leber, John Li, Charlie Lind, Andrew Ling, Paul Liu, Dan Lussier, Fred Ma,
 Duraid Madina, Mark Marshall, Jason McMullan, Wim Michiels, Dennis
 Muhlestein, John Murphy, Richard Myers, Dimitris Nalbantis, Paul Nitza,
 Pete Nixon, Lisa Noack, Mark Nodine, Andreas Olofsson, Brad Parker, Dominic
-Plunkett, Niranjan Prabhu, Usha Priyadharshini, Oleg Rodionov, John
-Sanguinetti, Salman Sheikh, Mike Shinkarovsky, Rafael Shirakawa, Jeffrey
-Short, Rodney Sinclair, Brian Small, Alex Solomatnikov, Art Stamness, John
-Stroebel, Emerson Suguimoto, Gene Sullivan, Renga Sundararajan, Stefan
-Thiede, Gary Thomas, Steve Tong, Holger Waechtler, Stefan Wallentowitz,
-Shawn Wang, Greg Waters, Eugene Weber, David Welch, Leon Wildman, Gerald
-Williams, Trevor Williams, Jeff Winston, Joshua Wise, Johan Wouters, and
-Ding Xiaoliang.
-
-Thanks all.
+Plunkett, Niranjan Prabhu, Usha Priyadharshini, Alberto Del Rio, Oleg
+Rodionov, John Sanguinetti, Salman Sheikh, Mike Shinkarovsky, Rafael
+Shirakawa, Jeffrey Short, Rodney Sinclair, Brian Small, Alex Solomatnikov,
+Art Stamness, John Stroebel, Emerson Suguimoto, Gene Sullivan, Renga
+Sundararajan, Stefan Thiede, Gary Thomas, Steve Tong, Hans Van Antwerpen,
+Holger Waechtler, Stefan Wallentowitz, Shawn Wang, Greg Waters, Thomas
+Watts, Eugene Weber, David Welch, Leon Wildman, Gerald Williams, Trevor
+Williams, Jeff Winston, Joshua Wise, Johan Wouters, and Ding Xiaoliang.
 
+Thanks to them, and all those we've missed including above.
 
 =head1 DISTRIBUTION
 
 The latest version is available from L<http://www.veripool.org/>.
 
-Copyright 2003-2011 by Wilson Snyder.  Verilator is free software; you can
+Copyright 2003-2012 by Wilson Snyder.  Verilator is free software; you can
 redistribute it and/or modify the Verilator internals under the terms of
 either the GNU Lesser General Public License Version 3 or the Perl Artistic
 License Version 2.0.

bin/verilator_difftree

@@ -177,7 +177,7 @@ Do not show differences in line numbering.
 
 The latest version is available from L<http://www.veripool.org/verilator>.
 
-Copyright 2005-2011 by Wilson Snyder.  This package is free software; you can
+Copyright 2005-2012 by Wilson Snyder.  This package is free software; you can
 redistribute it and/or modify it under the terms of either the GNU Lesser
 General Public License Version 3 or the Perl Artistic License Version 2.0.
 
@@ -193,5 +193,5 @@ C<verilator>
 
 ######################################################################
 ### Local Variables:
-### compile-command: "$V4/bin/verilator_difftree  $V4/test_c/obj_dir/V*_03_*.tree $V4N/test_c/obj_dir/V*_03_*.tree"
+### compile-command: "$V4/bin/verilator_difftree  {$V4D,$V4}/test_regress/obj_dir/t_EXAMPLE/V*_03_*.tree"
 ### End:

bin/verilator_includer

@@ -3,7 +3,7 @@ eval 'exec perl -wS $0 ${1+"$@"}'
   if 0;
 # DESCRIPTION: Print include statements for each ARGV
 #
-# Copyright 2003-2011 by Wilson Snyder. This package is free software; you can
+# Copyright 2003-2012 by Wilson Snyder. This package is free software; you can
 # redistribute it and/or modify it under the terms of either the GNU Lesser
 # General Public License Version 3 or the Perl Artistic License Version 2.0.
 ######################################################################

bin/verilator_profcfunc

@@ -208,7 +208,7 @@ Displays this message and program version and exits.
 
 The latest version is available from L<http://www.veripool.org/>.
 
-Copyright 2007-2011 by Wilson Snyder.  Verilator is free software; you can
+Copyright 2007-2012 by Wilson Snyder.  Verilator is free software; you can
 redistribute it and/or modify it under the terms of either the GNU Lesser
 General Public License Version 3 or the Perl Artistic License Version 2.0.
 

configure.ac

@@ -1,10 +1,10 @@
 # DESCRIPTION: Process this file with autoconf to produce a configure script.
 #
-# Copyright 2003-2011 by Wilson Snyder. Verilator is free software; you can
+# Copyright 2003-2012 by Wilson Snyder. Verilator is free software; you can
 # redistribute it and/or modify it under the terms of either the GNU Lesser
 # General Public License Version 3 or the Perl Artistic License Version 2.0.
 
-AC_INIT([Verilator],[3.830])
+AC_INIT([Verilator],[3.833 2012-04-15])
 AC_CONFIG_HEADER(src/config_build.h)
 AC_CONFIG_FILES(Makefile src/Makefile src/Makefile_obj include/verilated.mk)
 

doxygen-mainpage

@@ -0,0 +1,6 @@
+/*! \mainpage Verilator Doxygen Documentation
+ *
+ * \section intro_sec Introduction
+ *
+ * This is a full doxygen analysis of the Verilator source tree.
+ */

include/verilated.cpp

@@ -1,7 +1,7 @@
-// -*- C++ -*-
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 //
-// Copyright 2003-2011 by Wilson Snyder. This program is free software; you can
+// Copyright 2003-2012 by Wilson Snyder. This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License.
 // Version 2.0.
@@ -27,7 +27,7 @@
 #include "verilated_imp.h"
 #include <cctype>
 
-#define VL_VALUE_STRING_MAX_WIDTH 1024	///< Max static char array for VL_VALUE_STRING
+#define VL_VALUE_STRING_MAX_WIDTH 8192	///< Max static char array for VL_VALUE_STRING
 
 //===========================================================================
 // Global variables

include/verilated.h

@@ -1,7 +1,7 @@
-// -*- C++ -*-
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 //
-// Copyright 2003-2011 by Wilson Snyder. This program is free software; you can
+// Copyright 2003-2012 by Wilson Snyder. This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License.
 // Version 2.0.

include/verilated.mk.in

@@ -2,7 +2,7 @@
 ######################################################################
 # DESCRIPTION: Makefile commands for all verilated target files
 #
-# Copyright 2003-2011 by Wilson Snyder. Verilator is free software; you can
+# Copyright 2003-2012 by Wilson Snyder. Verilator is free software; you can
 # redistribute it and/or modify it under the terms of either the GNU Lesser
 # General Public License Version 3 or the Perl Artistic License Version 2.0.
 ######################################################################
@@ -93,10 +93,10 @@ VM_SUPPORT += $(VM_SUPPORT_FAST) $(VM_SUPPORT_SLOW)
 ##### SystemC or SystemPerl builds
 
 ifeq ($(VM_SP_OR_SC),1)
-  CPPFLAGS += $(SYSTEMC_CXX_FLAGS) -I$(SYSTEMC)/include
-  LDFLAGS  += $(SYSTEMC_CXX_FLAGS) -L$(SYSTEMC)/lib-$(VM_SC_TARGET_ARCH)
+  CPPFLAGS += $(SYSTEMC_CXX_FLAGS) -I$(SYSTEMC_INCLUDE)
+  LDFLAGS  += $(SYSTEMC_CXX_FLAGS) -L$(SYSTEMC_LIBDIR)
   SC_LIBS   = -lsystemc
- ifneq ($(wildcard $(SYSTEMC)/lib-$(VM_SC_TARGET_ARCH)/*numeric_bit*),)
+ ifneq ($(wildcard $(SYSTEMC_LIBDIR)/*numeric_bit*),)
   # Systemc 1.2.1beta
   SC_LIBS   += -lnumeric_bit -lqt
  endif

include/verilated.v

@@ -1,11 +1,10 @@
-// -*- C++ -*-
 //*************************************************************************
 //
 // Code available from: http://www.veripool.org/verilator
 //
 //*************************************************************************
 //
-// Copyright 2003-2011 by Wilson Snyder. This program is free software; you can
+// Copyright 2003-2012 by Wilson Snyder. This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License.
 // Version 2.0.

include/verilated_dpi.cpp

@@ -1,7 +1,7 @@
-// -*- C++ -*-
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 //
-// Copyright 2009-2011 by Wilson Snyder. This program is free software; you can
+// Copyright 2009-2012 by Wilson Snyder. This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License.
 // Version 2.0.

include/verilated_dpi.h

@@ -1,7 +1,7 @@
-// -*- C++ -*-
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 //
-// Copyright 2003-2011 by Wilson Snyder. This program is free software; you can
+// Copyright 2003-2012 by Wilson Snyder. This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License.
 // Version 2.0.

include/verilated_heavy.h

@@ -1,7 +1,7 @@
-// -*- C++ -*-
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 //
-// Copyright 2010-2011 by Wilson Snyder. This program is free software; you can
+// Copyright 2010-2012 by Wilson Snyder. This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License.
 // Version 2.0.

include/verilated_imp.h

@@ -1,7 +1,7 @@
-// -*- C++ -*-
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 //
-// Copyright 2009-2011 by Wilson Snyder. This program is free software; you can
+// Copyright 2009-2012 by Wilson Snyder. This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License.
 // Version 2.0.

include/verilated_sc.h

@@ -1,7 +1,7 @@
-// -*- C++ -*-
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 //
-// Copyright 2009-2011 by Wilson Snyder. This program is free software; you can
+// Copyright 2009-2012 by Wilson Snyder. This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License.
 // Version 2.0.

include/verilated_syms.h

@@ -1,7 +1,7 @@
-// -*- C++ -*-
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 //
-// Copyright 2003-2011 by Wilson Snyder. This program is free software; you can
+// Copyright 2003-2012 by Wilson Snyder. This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License.
 // Version 2.0.

include/verilated_vcd_c.cpp

@@ -1,9 +1,9 @@
-// -*- SystemC -*-
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //=============================================================================
 //
 // THIS MODULE IS PUBLICLY LICENSED
 //
-// Copyright 2001-2011 by Wilson Snyder.  This program is free software;
+// Copyright 2001-2012 by Wilson Snyder.  This program is free software;
 // you can redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License Version 2.0.
 //

include/verilated_vcd_c.h

@@ -1,9 +1,9 @@
-// -*- SystemC -*-
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //=============================================================================
 //
 // THIS MODULE IS PUBLICLY LICENSED
 //
-// Copyright 2001-2011 by Wilson Snyder.  This program is free software;
+// Copyright 2001-2012 by Wilson Snyder.  This program is free software;
 // you can redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License Version 2.0.
 //

include/verilated_vcd_sc.cpp

@@ -1,9 +1,9 @@
-// -*- SystemC -*-
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //=============================================================================
 //
 // THIS MODULE IS PUBLICLY LICENSED
 //
-// Copyright 2001-2011 by Wilson Snyder.  This program is free software;
+// Copyright 2001-2012 by Wilson Snyder.  This program is free software;
 // you can redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License Version 2.0.
 //

include/verilated_vcd_sc.h

@@ -1,9 +1,9 @@
-// -*- SystemC -*-
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //=============================================================================
 //
 // THIS MODULE IS PUBLICLY LICENSED
 //
-// Copyright 2001-2011 by Wilson Snyder.  This program is free software;
+// Copyright 2001-2012 by Wilson Snyder.  This program is free software;
 // you can redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License Version 2.0.
 //
@@ -76,6 +76,8 @@ private:
 #ifdef NC_SYSTEMC
     // Cadence Incisive has these as abstract functions so we must create them
     virtual void set_time_unit( int exponent10_seconds ) {} // deprecated
+#endif
+#if defined(NC_SYSTEMC) || (SYSTEMC_VERSION>=20111100)
     virtual void set_time_unit( double v, sc_time_unit tu ) {}
 #endif
 

include/verilated_vpi.cpp

@@ -1,7 +1,7 @@
-// -*- C++ -*-
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 //
-// Copyright 2009-2011 by Wilson Snyder. This program is free software; you can
+// Copyright 2009-2012 by Wilson Snyder. This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License.
 // Version 2.0.

include/verilated_vpi.h

@@ -1,7 +1,7 @@
-// -*- C++ -*-
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 //
-// Copyright 2009-2011 by Wilson Snyder. This program is free software; you can
+// Copyright 2009-2012 by Wilson Snyder. This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License.
 // Version 2.0.

include/verilatedos.h

@@ -1,7 +1,7 @@
-// -*- C++ -*-
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 //
-// Copyright 2003-2011 by Wilson Snyder. This program is free software; you can
+// Copyright 2003-2012 by Wilson Snyder. This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License.
 // Version 2.0.

internals.pod

@@ -52,7 +52,11 @@ preprocessing, then lexical analysis with Flex and parsing with Bison.
 This produces an abstract syntax tree (AST) representation of the design,
 which is what is visible in the .tree files described below.
 
-Cells are then linked, which will read and parse additional files as above.
+Verilator then makes a series of passes over the AST, progressively refining
+and optimizing it.
+
+Cells in the AST first linked, which will read and parse additional files as
+above.
 
 Functions, variable and other references are linked to their definitions.
 
@@ -87,6 +91,39 @@ hints, and performs additional constant propagation.
 
 Verilator finally writes the C++ modules.
 
+=head2 Key Classes Used in the Verilator Flow
+
+The AST is represented at the top level by the class C<AstNode>. This abstract
+class has derived classes for the individual components (e.g. C<AstGenerate>
+for a generate block) or groups of components (e.g. C<AstNodeFTask> for
+functions and tasks, which in turn has C<AstFunc> and C<AstTask> as derived
+classes).
+
+Each C<AstNode> has pointers to up to four children, accessed by the
+C<op1p> through C<op4p> methods.  These methods are then abstracted in a
+specific Ast* node class to a more specific name.  For example with the
+C<AstIf> node (for C<if> statements), C<ifsp> calls C<op1p> to give the
+pointer to the AST for the "then" block, while C<elsesp> calls C<op2p> to
+give the pointer to the AST for the "else" block, or NULL if there is not
+one.
+
+C<AstNode> has the concept of a next and previous AST - for example the
+next and previous statements in a block. Pointers to the AST for these
+statements (if they exist) can be obtained using the C<back> and C<next>
+methods.
+
+It is useful to remember that the derived class C<AstNetlist> is at the top
+of the tree, so checking for this class is the standard way to see if you
+are at the top of the tree.
+
+By convention, each function/method uses the variable C<nodep> as a pointer
+to the C<AstNode> currently being processed.
+
+The passes are implemented by AST visitor classes (see L</Visitor
+Functions>). These are implemented by subclasses of the abstract class,
+C<AstNVisitor>. Each pass creates an instance of the visitor class, which
+in turn implements a method to perform the pass.
+
 =head2 Verilated Flow
 
 The evaluation loop outputted by Verilator is designed to allow a single
@@ -120,57 +157,182 @@ changed; if clear, checking those signals for changes may be skipped.
 To match the indentation of Verilator C++ sources, use 4 spaces per level,
 and leave tabs at 8 columns, so every other indent level is a tab stop.
 
-In Emacs, use in your ~/.emacs
+All files should contain the magic header to insure standard indentation:
 
-  (add-hook 'c-mode-common-hook '(lambda ()
-				   (c-set-style "cc-mode"))))
+    // -*- mode: C++; c-file-style: "cc-mode" -*-
 
 This sets indentation to the cc-mode defaults.  (Verilator predates a
 CC-mode change of several years ago which overrides the defaults with GNU
 style indentation; the c-set-style undoes that.)
 
+=head2 The C<astgen> script
+
+Some of the code implementing passes is extremely repetitive, and must be
+implemented for each sub-class of C<AstNode>. However, while repetitive,
+there is more variability than can be handled in C++ macros.
+
+In Verilator this is implemented by using a Perl script, C<astgen> to
+pre-process the C++ code. For example in C<V3Const.cpp> this is used to
+implement the C<visit()> functions for each binary operation using the
+TREEOP macro.
+
+The original C++ source code is transformed into C++ code in the C<obj_opt>
+and C<obj_dbg> sub-directories (the former for the optimized version of
+verilator, the latter for the debug version). So for example C<V3Const.cpp>
+into C<V3Const__gen.cpp>.
+
 =head2 Visitor Functions
 
-There's three ways data is passed between visitor functions.
+The verilator uses the I<Visitor> design pattern to implement its
+refinement and optimization passes. This allows separation of the pass
+algorithm from the AST on which it operates. Wikipedia provides an
+introduction to the concept at
+L<http://en.wikipedia.org/wiki/Visitor_pattern>.
 
-1. A visitor-class member variable.  This is generally for passing "parent"
-information down to children.  m_modp is a common example.  It's set to
-NULL in the constructor, where that node (AstModule visitor) sets it, then
-the children are iterated, then it's cleared.  Children under an AstModule
-will see it set, while nodes elsewhere will see it clear.  If there can be
-nested items (for example an AstFor under an AstFor) the variable needs to
-be save-set-restored in the AstFor visitor, otherwise exiting the lower for
-will loose the upper for's setting.
+As noted above, all visitors are derived classes of C<AstNvisitor>. All
+derived classes of C<AstNode> implement the C<accept> method, which takes
+as argument a reference to an instance or a C<AstNVisitor> derived class
+and applies the visit method of the C<AstNVisitor> to the invoking AstNode
+instance (i.e. C<this>).
+
+One possible difficulty is that a call to C<accept> may perform an edit
+which destroys the node it receives as argument. The
+C<acceptSubtreeReturnEdits> method of C<AstNode> is provided to apply
+C<accept> and return the resulting node, even if the original node is
+destroyed (if it is not destroyed it will just return the original node).
+
+The behavior of the visitor classes is achieved by overloading the C<visit>
+function for the different C<AstNode> derived classes. If a specific
+implementation is not found, the system will look in turn for overloaded
+implementations up the inheritance hierarchy. For example calling C<accept>
+on C<AstIf> will look in turn for:
+
+  void visit (AstIf* nodep, AstNUser* vup)
+  void visit (AstNodeIf* nodep, AstNUser* vup)
+  void visit (AstNodeStmt* nodep, AstNUser* vup)
+  void visit (AstNode* nodep, AstNUser* vup)
+
+There are three ways data is passed between visitor functions.
+
+=over 4
+
+=item 1.
+
+A visitor-class member variable.  This is generally for passing "parent"
+information down to children.  C<m_modp> is a common example.  It's set to
+NULL in the constructor, where that node (C<AstModule> visitor) sets it,
+then the children are iterated, then it's cleared.  Children under an
+C<AstModule> will see it set, while nodes elsewhere will see it clear.  If
+there can be nested items (for example an C<AstFor> under an C<AstFor>) the
+variable needs to be save-set-restored in the C<AstFor> visitor, otherwise
+exiting the lower for will lose the upper for's setting.
+
+=item 2.
+
+User attributes.  Each C<AstNode> (B<Note.> The AST node, not the visitor)
+has five user attributes, which may be accessed as an integer using the
+C<user1()> through C<user5()> methods, or as a pointer (of type
+C<AstNuser>) using the C<user1p()> through C<user5p()> methods (a common
+technique lifted from graph traversal packages).
 
-2. User() attributes.  Each node has 5 ->user() number or ->userp() pointer
-utility values (a common technique lifted from graph traversal packages).
 A visitor first clears the one it wants to use by calling
-AstNode::user#ClearTree(), then it can mark any node's user() with whatever
-data it wants.  Readers just call nodep->user(), but may need to cast
-appropriately, so you'll often see nodep->userp()->castSOMETYPE().  At the
-top of each visitor are comments describing how the user() stuff applies to
-that visitor class.  For example:
+C<AstNode::user#ClearTree()>, then it can mark any node's user() with whatever
+data it wants.  Readers just call C<< nodep->user() >>, but may need to cast
+appropriately, so you'll often see C<< nodep->userp()->castSOMETYPE() >>.  At
+the top of each visitor are comments describing how the C<user()> stuff
+applies to that visitor class.  For example:
 
     // NODE STATE
     // Cleared entire netlist
     //   AstModule::user1p()     // bool. True to inline this module
 
-This says that at the AstNetlist user1ClearTree() is called.  Each
-AstModule's is user1() is used to indicate if we're going to inline it.
+This says that at the C<AstNetlist> C<user1ClearTree()> is called.  Each
+C<AstModule>'s C<user1()> is used to indicate if we're going to inline it.
 
-These comments are important to make sure a user#() on a given AstNode type
-is never being used for two different purposes.
+These comments are important to make sure a C<user#()> on a given C<AstNode>
+type is never being used for two different purposes.
 
-Note that calling user#ClearTree is fast, it doesn't walk the tree, so it's
-ok to call fairly often.  For example, it's commonly called on every
+Note that calling C<user#ClearTree> is fast, it doesn't walk the tree, so
+it's ok to call fairly often.  For example, it's commonly called on every
 module.
 
-3. Parameters can be passed between the visitors in close to the "normal"
-function caller to callee way.  This is the second "vup" parameter that is
-ignored on most of the visitor functions.  V3Width does this, but it proved
-more messy than the above and is deprecated.  (V3Width was nearly the first
-module written.  Someday this scheme may be removed, as it slows the
-program down to have to pass vup everywhere.)
+=item 3.
+
+Parameters can be passed between the visitors in close to the "normal"
+function caller to callee way.  This is the second C<vup> parameter of type
+C<AstNuser> that is ignored on most of the visitor functions.  V3Width does
+this, but it proved more messy than the above and is deprecated.  (V3Width
+was nearly the first module written.  Someday this scheme may be removed,
+as it slows the program down to have to pass vup everywhere.)
+
+=back
+
+=head2 Iterators
+
+C<AstNode> provides a set of iterators to facilitate walking over the
+tree. Each takes two arguments, a visitor, C<v>, of type C<AstNVisitor> and
+an optional pointer user data, C<vup>, of type C<AstNuser*>. The second is
+one of the ways to pass parameters to visitors described in L</Visitor
+Functions>, but its use is no deprecated and should be used for new visitor
+classes.
+
+=over 4
+
+=item C<iterate()>
+
+This just applies the C<accept> method of the C<AstNode> to the visitor
+function.
+
+=item C<iterateAndNextIgnoreEdit>
+
+Applies the C<accept> method of each C<AstNode> in a list (i.e. connected
+by C<nextp> and C<backp> pointers).
+
+=item C<iterateAndNext>
+
+Applies the C<accept> method of each C<AstNode> in a list. If a node is
+edited by the call to C<accept>, apply C<accept> again, until the node does
+not change.
+
+=item C<iterateListBackwards>
+
+Applies the C<accept> method of each C<AstNode> in a list, starting with
+the last one.
+
+=item C<iterateChildren>
+
+Apply the C<iterateAndNext> method on each child C<op1p> through C<op4p> in
+turn.
+
+=item C<iterateChildrenBackwards>
+
+Apply the C<iterateListBackwards> method on each child C<op1p> through
+C<op4p> in turn.
+
+=back
+
+=head2 Identifying derived classes
+
+A common requirement is to identify the specific C<AstNode> class we are
+dealing with. For example a visitor might not implement separate C<visit>
+methods for C<AstIf> and C<AstGenIf>, but just a single method for the base
+class:
+
+  void visit (AstNodeIf* nodep, AstNUser* vup)
+
+However that method might want to specify additional code if it is called
+for C<AstGenIf>. Verilator does this by providing a C<castSOMETYPE()>
+method for each possible node type, using C++ C<dynamic_cast>. This either
+returns a pointer to the object cast to that type (if it is of class
+C<SOMETYPE>, or a derived class of C<SOMETYPE>) or else NULL. So our
+C<visit> method could use:
+
+  if (nodep->castAstGenIf()) {
+      <code specific to AstGenIf>
+  }
+
+A common test is for C<AstNetlist>, which is the node at the root of the
+AST.
 
 =head1 TESTING
 
@@ -214,7 +376,8 @@ algorithmic stage.  An example:
 
 =over 4
 
-"1:2:" indicates the hierarchy the VAR is op2p under the MODULE.
+"1:2:" indicates the hierarchy of the C<VAR> is the C<op2p> pointer under
+the C<MODULE>, which in turn is the C<op1p> pointer under the C<NETLIST>
 
 "VAR" is the AstNodeType.
 
@@ -239,19 +402,63 @@ variable is an output.
 =head2 Debugging with GDB
 
 The test_regress/driver.pl script accepts --debug --gdb to start Verilator
-under gdb.  You can also use --debug --gdbbt to just backtrace and then
-exit gdb.
+under gdb and break when an error is hit or the program is about to exit.
+You can also use --debug --gdbbt to just backtrace and then exit gdb. To
+debug the Verilated executable, use --gdbsim.
+
+If you wish to start verilator under GDB (or another debugger), then you
+can use --debug and look at the underlying invocation of verilator_dgb. For
+example
+
+  t/t_alw_dly.pl --debug
+
+shows it invokes the command:
+
+  ../verilator_bin_dbg --prefix Vt_alw_dly --x-assign unique --debug
+    -cc -Mdir obj_dir/t_alw_dly --debug-check -f input.vc t/t_alw_dly.v
+
+Start GDB, then C<start> with the remaining arguments.
+
+  gdb ../verilator_bin_dbg
+  ...
+  (gdb) start --prefix Vt_alw_dly --x-assign unique --debug -cc -Mdir
+            obj_dir/t_alw_dly --debug-check  -f input.vc t/t_alw_dly.v
+            > obj_dir/t_alw_dly/vlt_compile.log
+  ...
+  Temporary breakpoint 1, main (argc=13, argv=0xbfffefa4, env=0xbfffefdc)
+      at ../Verilator.cpp:615
+  615         ios::sync_with_stdio();
+  (gdb) 
+
+You can then continue execution with breakpoints as required.
 
 To break at a specific edit number which changed a node (presumably to find
 what made a <e####> line in the tree dumps):
 
    watch AstNode::s_editCntGbl==####
 
+To print a node:
+
+   call nodep->dumpGdb()      # aliased to "pn" in src/.gdbinit
+   call nodep->dumpTreeGdb()  # aliased to "pnt" in src/.gdbinit
+
+When GDB halts, it is useful to understand that the backtrace will commonly
+show the iterator functions between each invocation of C<visit> in the
+backtrace. You will typically see a frame sequence something like
+
+  ...
+  visit()
+  iterateChildren()
+  iterateAndNext()
+  accept()
+  visit()
+  ...
+
 =head1 DISTRIBUTION
 
 The latest version is available from L<http://www.veripool.org/>.
 
-Copyright 2008-2011 by Wilson Snyder.  Verilator is free software; you can
+Copyright 2008-2012 by Wilson Snyder.  Verilator is free software; you can
 redistribute it and/or modify it under the terms of either the GNU Lesser
 General Public License Version 3 or the Perl Artistic License Version 2.0.
 

nodist/bisondiff

@@ -1,7 +1,7 @@
 #!/usr/bin/perl -w
 ######################################################################
 #
-# Copyright 2007-2011 by Wilson Snyder.  This package is free software; you
+# Copyright 2007-2012 by Wilson Snyder.  This package is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.

nodist/bisonreader

@@ -1,7 +1,7 @@
 #!/usr/bin/perl -w
 ######################################################################
 #
-# Copyright 2007-2011 by Wilson Snyder.  This package is free software; you
+# Copyright 2007-2012 by Wilson Snyder.  This package is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.

nodist/dot_importer

@@ -143,7 +143,7 @@ Displays this message and program version and exits.
 
 =head1 DISTRIBUTION
 
-Copyright 2005-2011 by Wilson Snyder.  Verilator is free software; you can
+Copyright 2005-2012 by Wilson Snyder.  Verilator is free software; you can
 redistribute it and/or modify it under the terms of either the GNU Lesser
 General Public License Version 3 or the Perl Artistic License Version 2.0.
 

nodist/dot_pruner

@@ -184,7 +184,7 @@ Displays this message and program version and exits.
 
 =head1 DISTRIBUTION
 
-Copyright 2005-2011 by Wilson Snyder.  Verilator is free software; you can
+Copyright 2005-2012 by Wilson Snyder.  Verilator is free software; you can
 redistribute it and/or modify it under the terms of either the GNU Lesser
 General Public License Version 3 or the Perl Artistic License Version 2.0.
 

nodist/flexdiff

@@ -1,7 +1,7 @@
 #!/usr/bin/perl -w
 ######################################################################
 #
-# Copyright 2007-2011 by Wilson Snyder.  This package is free software; you
+# Copyright 2007-2012 by Wilson Snyder.  This package is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.

nodist/install_test

@@ -13,6 +13,7 @@ use vars qw ($Debug);
 # main
 
 our $Opt_Stage = 0;
+our $Opt_Jobs = calc_jobs();
 
 autoflush STDOUT 1;
 autoflush STDERR 1;
@@ -21,11 +22,13 @@ if (! GetOptions (
 	  "debug"	=> sub { $Debug = 1; },
 	  "<>"		=> sub { die "%Error: Unknown parameter: $_[0]\n"; },
 	  "stage=i"	=> \$Opt_Stage,
+	  "j=i"		=> \$Opt_Jobs,
     )) {
     die "%Error: Bad usage, try 'install_test --help'\n";
 }
 
 test();
+exit(0);
 
 #######################################################################
 
@@ -47,7 +50,7 @@ sub test {
 	run("/bin/rm -rf $blddir");
 	run("/bin/mkdir -p $blddir");
 	run("cd $blddir && $srcdir/configure --prefix $prefix");
-	run("cd $blddir && make -j");
+	run("cd $blddir && make -j $Opt_Jobs");
     }
 
     # Install it under the prefix
@@ -121,6 +124,16 @@ sub cleanenv {
 
 #######################################################################
 
+sub calc_jobs {
+    my $ok = eval "
+	use Unix::Processors;
+	return Unix::Processors->new->max_online;
+    ";
+    $ok && !$@ or return 1;
+    print "driver.pl: Found $ok cores, using -j ",$ok+1,"\n" if $Debug;
+    return $ok + 1;
+}
+
 sub run {
     # Run a system command, check errors
     my $command = shift;
@@ -157,11 +170,20 @@ required.
 
 Displays this message and program version and exits.
 
+=item -j I<jobs>
+
+Specify make -j flag.  Defaults to number of cores + 1 if Perl's
+Unix::Processors is installed, else 1.
+
+=item -stage I<stage>
+
+Runs a specific test stage (see the script).
+
 =back
 
 =head1 DISTRIBUTION
 
-Copyright 2009-2011 by Wilson Snyder.  This package is free software; you
+Copyright 2009-2012 by Wilson Snyder.  This package is free software; you
 can redistribute it and/or modify it under the terms of either the GNU
 Lesser General Public License Version 3 or the Perl Artistic License
 Version 2.0.

nodist/invoke_atsim

@@ -28,7 +28,7 @@ invoke_atsim - Invoke tool under "modules" command
 
 =head1 DISTRIBUTION
 
-Copyright 2005-2011 by Wilson Snyder.  This package is free software; you
+Copyright 2005-2012 by Wilson Snyder.  This package is free software; you
 can redistribute it and/or modify it under the terms of either the GNU
 Lesser General Public License Version 3 or the Perl Artistic License
 Version 2.0.

nodist/invoke_iccr

@@ -28,7 +28,7 @@ invoke_iccr - Invoke tool under "modules" command
 
 =head1 DISTRIBUTION
 
-Copyright 2007-2011 by Wilson Snyder.  This package is free software; you
+Copyright 2007-2012 by Wilson Snyder.  This package is free software; you
 can redistribute it and/or modify it under the terms of either the GNU
 Lesser General Public License Version 3 or the Perl Artistic License
 Version 2.0.

nodist/invoke_ncverilog

@@ -28,7 +28,7 @@ invoke_ncverilog - Invoke tool under "modules" command
 
 =head1 DISTRIBUTION
 
-Copyright 2005-2011 by Wilson Snyder.  This package is free software; you
+Copyright 2005-2012 by Wilson Snyder.  This package is free software; you
 can redistribute it and/or modify it under the terms of either the GNU
 Lesser General Public License Version 3 or the Perl Artistic License
 Version 2.0.

nodist/invoke_vcs

@@ -28,7 +28,7 @@ invoke_vcs - Invoke tool under "modules" command
 
 =head1 DISTRIBUTION
 
-Copyright 2005-2011 by Wilson Snyder.  This package is free software; you
+Copyright 2005-2012 by Wilson Snyder.  This package is free software; you
 can redistribute it and/or modify it under the terms of either the GNU
 Lesser General Public License Version 3 or the Perl Artistic License
 Version 2.0.

nodist/spdiff

@@ -1,7 +1,7 @@
 #!/usr/bin/perl -w
 ######################################################################
 #
-# Copyright 2010-2011 by Wilson Snyder.  This package is free software; you
+# Copyright 2010-2012 by Wilson Snyder.  This package is free software; you
 # can redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.

nodist/vtree_importer

@@ -331,7 +331,7 @@ Displays this message and program version and exits.
 
 =head1 DISTRIBUTION
 
-Copyright 2005-2011 by Wilson Snyder.  Verilator is free software; you can
+Copyright 2005-2012 by Wilson Snyder.  Verilator is free software; you can
 redistribute it and/or modify it under the terms of either the GNU Lesser
 General Public License Version 3 or the Perl Artistic License Version 2.0.
 

readme.pod

@@ -9,7 +9,7 @@ This is the Verilator Package README file.
 
 =head1 DISTRIBUTION
 
-This package is Copyright 2003-2011 by Wilson Snyder.  (Report bugs to
+This package is Copyright 2003-2012 by Wilson Snyder.  (Report bugs to
 L<http://www.veripool.org/>.)
 
 Verilator is free software; you can redistribute it and/or modify it under
@@ -72,14 +72,10 @@ Download the latest package from that site, and decompress.
 
 If you will be using SystemC (vs straight C++ output), download SystemC
 2.0.1 from L<http://www.systemc.org>.  Follow their installation
-instructions.  You will need to set the SYSTEMC environment variable to
-point to this download.  Also, setenv SYSTEMC_ARCH to the architecture name
-you used with SystemC, generally 'linux' or 'cygwin'.
-
-Verilator assumes you did a make in the SystemC kit directory and SYSTEMC
-points to that directory.  There must be appropriate files in
-C<$SYSTEMC/include> and C<$SYSTEMC/lib-linux> for SystemC compilation to
-work.
+instructions.  You will need to set SYSTEMC_INCLUDE to point to the
+include directory with systemc.h in it, and SYSTEMC_LIBDIR to points
+to the directory with libsystemc.a in it.  (Older installations may
+set SYSTEMC and SYSTEMC_ARCH instead.)
 
 =item
 
@@ -101,8 +97,8 @@ C<cd> to the Verilator directory containing this README.
 
 You now have to decide how you're going to eventually install the kit.
 
-Note Verilator builds the current value of VERILATOR_ROOT, SYSTEMC,
-SYSTEMC_ARCH, SYSTEMPERL, and SYSTEMPERL_INCLUDE as defaults into the
+Note Verilator builds the current value of VERILATOR_ROOT, SYSTEMC_INCLUDE,
+SYSTEMC_LIBDIR, SYSTEMPERL, and SYSTEMPERL_INCLUDE as defaults into the
 executable, so try to have them correct before configuring.
 
 =over 4

readme.texi

@@ -1,197 +0,0 @@
-\input texinfo @c -*-texinfo-*-
-@c %**start of header
-@setfilename readme.info
-@settitle Verilator Installation
-@c %**end of header
-
-@c DESCRIPTION: TexInfo: DOCUMENT source run through texinfo to produce README file
-@c Use 'make README' to produce the output file
-@c Before release, run C-u C-c C-u C-a (texinfo-all-menus-update)
-
-@node Top, Copyright, (dir), (dir)
-@chapter Verilator
-
-This is the Verilator Package.
-
-@menu
-* Copyright::
-* Description::
-* Obtaining Distribution::
-* Directory Structure::
-* Supported Systems::
-* Installation::
-* Limitations::
-@end menu
-
-@node Copyright, Description, Top, Top
-@section Copyright
-
-This package is Copyright 2003-2011 by Wilson Snyder @email{wsnyder@@wsnyder.org}.
-
-Verilator is free software; you can redistribute it and/or modify it
-under the terms of either the GNU Lesser General Public License
-Version 3 or the Perl Artistic License Version 2.0.  (See the
-documentation for more details.)
-
-This program is distributed in the hope that it will be useful, but
-WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-General Public License for more details.
-
-@node Description, Obtaining Distribution, Copyright, Top
-@section Description
-
-Verilator converts synthesizable (not behavioral) Verilog code into C++ or
-SystemC code.  It is not a complete simulator, just a translator.
-
-Verilator is invoked with parameters similar to GCC or Synopsys's VCS.  It
-reads the specified Verilog code, lints it, and optionally adds coverage
-code.  For C++ format, it outputs .cpp and .h files.  For SystemC format,
-it outputs .sp files for the SystemPerl preprocessor available at
-http://www.veripool.org.
-
-The resulting files are then compiled with C++.  The user writes a little
-C++ wrapper file, which instantiates the top level module.  This is
-compiled in C++, and linked with the Verilated files.
-
-The resulting executable will perform the actual simulation.
-
-@node Obtaining Distribution, Directory Structure, Description, Top
-@section Obtaining Distribution
-
-The latest version is available at
-@uref{http://www.veripool.org/verilator}
-
-Download the latest package from that site, and decompress.
-@samp{tar xvzf verilator_version.tgz}
-
-@node Directory Structure, Supported Systems, Obtaining Distribution, Top
-@section Directory Structure
-
-The directories after de-taring are as follows:
-
-@itemize @bullet
-@item bin/verilator	     => Compiler Wrapper invoked on user Verilog code
-@item include/		     => Files that should be in your -I compiler path
-@item include/verilated.cpp   => Global routines to link into your simulator
-@item include/verilated.h     => Global headers
-@item include/verilated.v     => Stub defines for linting
-@item include/verilated.mk    => Common makefile
-@item src/		     => Translator source code
-@item test_v		     => Example Verilog code for other test dirs
-@item test_c		     => Example Verilog->C++ conversion
-@item test_sc		     => Example Verilog->SystemC conversion
-@item test_sp		     => Example Verilog->SystemPerl conversion
-@item test_vcs		     => Example Verilog->VCS conversion (test the test)
-@item test_verilated	     => Internal tests
-@item test_regress	     => Internal tests
-@end itemize
-
-@node Supported Systems, Installation, Directory Structure, Top
-@section Supported Systems
-
-This version of verilator has been built and tested on:
-
-@itemize @bullet
-@item SuSE AMD64 i686-linux-2.6.5
-@end itemize
-
-Other users report success with Redhat Linux 2.4, Windows under
-Cygwin, HPUX and Solaris.  It should run with minor porting on any
-Unix system.
-
-@node Installation, Limitations, Supported Systems, Top
-@section Installation
-
-@enumerate
-@item
-If you will be using SystemC (vs straight C++ output), download
-SystemC 2.0.1 from @url{http://www.systemc.org}.  Follow their
-installation instructions.  As described in the System-Perl README,
-you will need to set SYSTEMC and/or SYSTEMC_KIT to point to this
-download.  Also, set SYSTEMC_ARCH to the architecture name you used
-with SystemC, generally 'linux' or 'cygwin'.
-
-@item
-If you will be using SystemC, download and install Verilog-Perl,
-@url{http://search.cpan.org/search?module=Verilog::Language}.
-
-@item
-If you will be using SystemC, download and install System-Perl,
-@url{http://search.cpan.org/search?module=SystemC::Netlist}.  Note
-you'll need to set a @samp{SYSTEMPERL} environment variable to point
-to the downloaded kit.  Optionally also set @samp{SYSTEMPERL_INCLUDE}
-to point to the installed headers.
-
-@item
-@code{cd} to the Verilator directory containing this README.
-
-@item
-Type @samp{./configure} to configure Verilator for your system.
-
-If you are configuring Verilator to be part of a RPM or other
-distribution package system, you may want to use the --enable-defenv
-configure flag.  This will take the current value of VERILATOR_ROOT,
-SYSTEMC, SYSTEMC_ARCH, SYSTEMPERL, and SYSTEMPERL_INCLUDE and build
-them as defaults into the executable.
-
-@item
-Type @samp{make} to compile Verilator.
-
-On Cygwin (Windows) you may get a error about libperl.a not being
-found.  You need to copy your perl libraries as follows.
-
-  @enumerate
-  @item
-  Type @samp{perl -MExtUtils::Embed -e ldopts}
-  @item
-  It will show a directory name ending in /CORE.  cd to that directory.
-  @item
-  @samp{cp libperl5_6_1.a libperl.a}
-  @item
-  @samp{cp libperl5_6_1.dll libperl.dll}
-  @item
-  @samp{cp libperl5_6_1.def libperl.def}
-  @end enumerate
-
-@item
-Type @samp{make test} to check the compilation.
-
-You may get a error about the Bit::Vector perl package.  You will need to install
-it if you want the tests to pass.  (Try @samp{make test_c} for a smaller test that
-doesn't require it.)
-
-You may get a error about a typedef conflict for uint32_t.  Edit verilated.h to change
-the typedef to work, probably to @samp{typedef unsigned long uint32_t;}.
-
-If you get warnings, you might want to edit @samp{include/verilated.mk} to delete the
-lines that define VK_CPPFLAGS_WALL.
-
-@item
-
-There is no installation at present; this package runs from the
-distribution directory.  Programs should set the environment variable
-VERILATOR_ROOT to point to this distribution, then execute
-$VERILATOR_ROOT/bin/verilator, which will find the path to all needed
-files.
-
-Verilator assumes you did a make in the SystemC kit directory.  If not, you will need
-to populate @samp{$SYSTEMC/include} and @samp{$SYSTEMC/lib-linux} appropriately.
-
-If you will be modifying Verilator, you will probably want a second
-stable copy of this kit for others to use while you experiment.
-
-@item
-Detailed documentation and the man page can be seen by running:
-
-    bin/verilator --help
-
-or reading verilator.txt in the same directory as this README.
-
-@end enumerate
-
-@node Limitations,  , Installation, Top
-@section Limitations
-
-See verilator.txt (or execute @samp{bin/verilator --help}) for limitations.
-

src/.gdbinit

@@ -0,0 +1,20 @@
+# DESCRIPTION: Verilator: GDB startup file with useful defines
+#
+# Copyright 2012-2012 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+
+define pn
+  call $arg0->dumpGdb()
+end
+document pn
+  Verilator: Print single AstNode NODEP
+end
+
+define pnt
+  call $arg0->dumpTreeGdb()
+end
+document pnt
+  Verilator: Print AstNode NODEP's tree
+end

src/Makefile.in

@@ -7,7 +7,7 @@
 #
 #*****************************************************************************
 #
-# Copyright 2003-2011 by Wilson Snyder.  This program is free software; you can
+# Copyright 2003-2012 by Wilson Snyder.  This program is free software; you can
 # redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.

src/Makefile_obj.in

@@ -7,7 +7,7 @@
 #
 #*****************************************************************************
 #
-# Copyright 2003-2011 by Wilson Snyder.  This program is free software; you can
+# Copyright 2003-2012 by Wilson Snyder.  This program is free software; you can
 # redistribute it and/or modify it under the terms of either the GNU
 # Lesser General Public License Version 3 or the Perl Artistic License
 # Version 2.0.
@@ -27,7 +27,7 @@ config_srcdir = @srcdir@
 ifeq ($(config_srcdir),.)
  srcdir = ..
 else  # Run an experiment
- ifeq ($(shell -e $(config_srcdir)/../Makefile_obj.in),)
+ ifeq ($(wildcard $(config_srcdir)/../Makefile_obj.in),)
    srcdir = $(config_srcdir)
  else
    srcdir = $(config_srcdir)/..
@@ -111,6 +111,8 @@ endif
 ifeq ($(CFG_WITH_DEFENV),yes)
  CPPFLAGS += -DDEFENV_SYSTEMC=\"$(SYSTEMC)\"
  CPPFLAGS += -DDEFENV_SYSTEMC_ARCH=\"$(SYSTEMC_ARCH)\"
+ CPPFLAGS += -DDEFENV_SYSTEMC_INCLUDE=\"$(SYSTEMC_INCLUDE)\"
+ CPPFLAGS += -DDEFENV_SYSTEMC_LIBDIR=\"$(SYSTEMC_LIBDIR)\"
  CPPFLAGS += -DDEFENV_SYSTEMPERL=\"$(SYSTEMPERL)\"
  CPPFLAGS += -DDEFENV_SYSTEMPERL_INCLUDE=\"$(SYSTEMPERL_INCLUDE)\"
  ifeq ($(VERILATOR_ROOT),)	# Use what we're given, or intuit
@@ -180,6 +182,7 @@ RAW_OBJS = \
 	V3EmitCSyms.o \
 	V3EmitMk.o \
 	V3EmitV.o \
+	V3EmitXml.o \
 	V3Error.o \
 	V3Expand.o \
 	V3File.o \

src/V3Active.cpp

@@ -1,3 +1,4 @@
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Break always into sensitivity active domains
 //
@@ -7,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2003-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.
@@ -394,7 +395,7 @@ private:
 	    nodep->unlinkFrBack()->deleteTree(); nodep=NULL;
 	} else if (nodep->varrefp()) {
 	    // V3LinkResolve should have cleaned most of these up
-	    if (nodep->varrefp()->width()>1) nodep->v3error("Unsupported: Non-single bit wide signal pos/negedge sensitivity: "
+	    if (!nodep->varrefp()->width1()) nodep->v3error("Unsupported: Non-single bit wide signal pos/negedge sensitivity: "
 							    <<nodep->varrefp()->prettyName());
 	    m_itemSequent = true;
 	    nodep->varrefp()->varp()->usedClock(true);

src/V3Active.h

@@ -1,4 +1,4 @@
-// -*- C++ -*-
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Break always into sensitivity block domains
 //
@@ -8,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2003-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.

src/V3ActiveTop.cpp

@@ -1,3 +1,4 @@
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Break always into sensitivity active domains
 //
@@ -7,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2003-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.

src/V3ActiveTop.h

@@ -1,4 +1,4 @@
-// -*- C++ -*-
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Break always into sensitivity block domains
 //
@@ -8,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2003-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.

src/V3Assert.cpp

@@ -1,3 +1,4 @@
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Collect and print statistics
 //
@@ -7,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2005-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2005-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.

src/V3Assert.h

@@ -1,4 +1,4 @@
-// -*- C++ -*-
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Assertion expansion
 //
@@ -8,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2005-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2005-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.

src/V3AssertPre.cpp

@@ -1,3 +1,4 @@
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Collect and print statistics
 //
@@ -7,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2005-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2005-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.

src/V3AssertPre.h

@@ -1,4 +1,4 @@
-// -*- C++ -*-
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Assertion pre-expansion
 //
@@ -8,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2005-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2005-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.

src/V3Ast.cpp

@@ -1,3 +1,4 @@
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Ast node structures
 //
@@ -7,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2003-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.
@@ -245,7 +246,7 @@ inline void AstNode::debugTreeChange(const char* prefix, int lineno, bool next)
     // Called on all major tree changers.
     // Only for use for those really nasty bugs relating to internals
     // Note this may be null.
-    //if (debug()) cout<<"-treeChange: V3Ast.cpp:"<<lineno<<" Tree Change for "<<prefix<<": "<<(void*)this<<endl;
+    //if (debug()) cout<<"-treeChange: V3Ast.cpp:"<<lineno<<" Tree Change for "<<prefix<<": "<<(void*)this<<" <e"<<AstNode::s_editCntGbl<<">"<<endl;
     //if (debug()) {
     //	cout<<"-treeChange: V3Ast.cpp:"<<lineno<<" Tree Change for "<<prefix<<endl;
     //	v3Global.rootp()->dumpTree(cout,"-treeChange: ");
@@ -719,6 +720,7 @@ void AstNode::deleteTree() {
     if (!this) return;
     UASSERT(m_backp==NULL,"Delete called on node with backlink still set\n");
     this->debugTreeChange("-delTree:  ", __LINE__, true);
+    this->editCountInc();
     // MUST be depth first!
     deleteTreeIter();
 }
@@ -947,6 +949,22 @@ void AstNode::checkTree() {
     }
 }
 
+void AstNode::dumpGdb() {  // For GDB only
+    if (!this) { cout<<"This=NULL"<<endl; return; }
+    dumpGdbHeader();
+    cout<<"  "; dump(cout); cout<<endl;
+}
+void AstNode::dumpTreeGdb() {  // For GDB only
+    if (!this) { cout<<"This=NULL"<<endl; return; }
+    dumpGdbHeader();
+    dumpTree(cout);
+}
+void AstNode::dumpGdbHeader() const {  // For GDB only
+    if (!this) { cout<<"This=NULL"<<endl; return; }
+    dumpPtrs(cout);
+    cout<<"  Fileline = "<<fileline()<<endl;
+}
+
 void AstNode::dumpPtrs(ostream& os) const {
     os<<"This="<<typeName()<<" "<<(void*)this;
     os<<" back="<<(void*)backp();
@@ -997,7 +1015,8 @@ void AstNode::dumpTreeFile(const string& filename, bool append) {
 	    if (logsp->fail()) v3fatalSrc("Can't write "<<filename);
 	    *logsp<<"Tree Dump from <e"<<dec<<editCountLast()<<">";
 	    *logsp<<" to <e"<<dec<<editCountGbl()<<">"<<endl;
-	    if (editCountGbl()==editCountLast()) {
+	    if (editCountGbl()==editCountLast()
+		&& !(v3Global.opt.dumpTree()>=9)) {
 		*logsp<<endl;
 		*logsp<<"No changes since last dump!\n";
 	    } else {

src/V3Ast.h

@@ -1,4 +1,4 @@
-// -*- C++ -*-
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Ast node structure
 //
@@ -8,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2003-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.
@@ -26,15 +26,19 @@
 #include "verilatedos.h"
 #include "V3Error.h"
 #include "V3Number.h"
+#include "V3Global.h"
 #include <vector>
 #include <cmath>
+#include <map>
 
 #include "V3Ast__gen_classes.h"	// From ./astgen
 // Things like:
 //   class V3AstNode;
 
 // Hint class so we can choose constructors
-class AstLogicPacked {};
+class VFlagLogicPacked {};
+class VFlagBitPacked {};
+class VFlagChildDType {};  // Used by parser.y to select constructor that sets childDType
 
 //######################################################################
 
@@ -250,7 +254,9 @@ public:
 	// Internal types for mid-steps
 	SCOPEPTR, CHARPTR,
 	// Internal types, eliminated after parsing
-	LOGIC_IMPLICIT
+	LOGIC_IMPLICIT,
+	// Leave last
+	_ENUM_MAX
     };
     enum en m_e;
     const char* ascii() const {
@@ -260,7 +266,8 @@ public:
 	    "real", "shortint", "shortreal", "time",
 	    "string",
 	    "VerilatedScope*", "char*",
-	    "LOGIC_IMPLICIT"
+	    "LOGIC_IMPLICIT",
+	    " MAX"
 	};
 	return names[m_e];
     };
@@ -271,28 +278,35 @@ public:
 	    "double", "short int", "float", "long long",
 	    "const char*",
 	    "dpiScope", "const char*",
-	    ""
+	    "",
+	    " MAX"
 	};
 	return names[m_e];
     };
+    static void test() {
+	UASSERT(0==strcmp(AstBasicDTypeKwd(_ENUM_MAX).ascii()," MAX"),"Enum array mismatch");
+	UASSERT(0==strcmp(AstBasicDTypeKwd(_ENUM_MAX).dpiType()," MAX"),"Enum array mismatch");
+    }
     inline AstBasicDTypeKwd () : m_e(UNKNOWN) {}
     inline AstBasicDTypeKwd (en _e) : m_e(_e) {}
     explicit inline AstBasicDTypeKwd (int _e) : m_e(static_cast<en>(_e)) {}
     operator en () const { return m_e; }
     int width() const {
 	switch (m_e) {
-	case BIT:	return 1;
+	case BIT:	return 1;   // scalar, can't bit extract unless ranged
 	case BYTE:	return 8;
 	case CHANDLE:	return 64;
 	case INT:	return 32;
 	case INTEGER:	return 32;
-	case LOGIC:	return 1;
+	case LOGIC:	return 1;   // scalar, can't bit extract unless ranged
 	case LONGINT:	return 64;
-	case DOUBLE:	return 64;
-	case FLOAT:	return 32;
+	case DOUBLE:	return 64;  // opaque
+	case FLOAT:	return 32;  // opaque
 	case SHORTINT:	return 16;
 	case TIME:	return 64;
-	case STRING:	return 64;  // Just the pointer, for today
+	case STRING:	return 64;  // opaque  // Just the pointer, for today
+	case SCOPEPTR:	return 0;   // opaque
+	case CHARPTR:	return 0;   // opaque
 	default: return 0;
 	}
     }
@@ -309,7 +323,7 @@ public:
     bool isSloppy() const { // Don't be as anal about width warnings
 	return !(m_e==LOGIC || m_e==BIT);
     }
-    bool isBitLogic() const { // Don't be as anal about width warnings
+    bool isBitLogic() const { // Bit/logic vector types; can form a packed array
 	return (m_e==LOGIC || m_e==BIT);
     }
     bool isDpiUnsupported() const {
@@ -330,7 +344,7 @@ public:
 
 enum AstSignedState {
     // This can't be in the fancy class as the lexer union will get upset
-    signedst_NOP=0, signedst_SIGNED=1, signedst_UNSIGNED=2
+    signedst_NOSIGNED=0, signedst_UNSIGNED=1, signedst_SIGNED=2
 };
 
 //######################################################################
@@ -687,11 +701,14 @@ public:
     // Creating from raw data (sameHash functions)
     V3Hash() { setBoth(1,0); }
     V3Hash(uint32_t val) { setBoth(1,val); }
-    V3Hash(void* vp) { setBoth(1,cvtToHash(vp)); }
+    V3Hash(const void* vp) { setBoth(1,cvtToHash(vp)); }
     V3Hash(const string& name);
-    V3Hash(V3Hash lh, V3Hash rh) {
-	setBoth(1,lh.hshval()*31+rh.hshval());
-    }
+    V3Hash(V3Hash h1, V3Hash h2) {
+	setBoth(1,h1.hshval()*31+h2.hshval()); }
+    V3Hash(V3Hash h1, V3Hash h2, V3Hash h3) {
+	setBoth(1,(h1.hshval()*31+h2.hshval())*31+h3.hshval()); }
+    V3Hash(V3Hash h1, V3Hash h2, V3Hash h3, V3Hash h4) {
+	setBoth(1,((h1.hshval()*31+h2.hshval())*31+h3.hshval())*31+h4.hshval()); }
 };
 ostream& operator<<(ostream& os, V3Hash rhs);
 
@@ -859,16 +876,16 @@ public:
     void	numericFrom(AstNode* fromp) { numeric(fromp->numeric()); }
     void	numeric(AstNumeric flag) { m_numeric = (int)flag; if (flag.isDouble()) width(64,64); }
     AstNumeric	numeric() const { return AstNumeric(m_numeric); }
-    bool	isDouble() const { return numeric().isDouble(); }
-    bool	isSigned() const { return numeric().isSigned(); }
-    void	isSigned(bool flag) { numeric(flag ? AstNumeric::SIGNED : AstNumeric::UNSIGNED); }
     bool	isUnsigned() const { return numeric().isUnsigned(); }
     void	didWidth(bool flag) { m_didWidth=flag; }
     bool	didWidth() const { return m_didWidth; }
+    bool	didWidthAndSet() { if (didWidth()) return true; didWidth(true); return false;}
     void	doingWidth(bool flag) { m_doingWidth=flag; }
     bool	doingWidth() const { return m_doingWidth; }
     bool	isQuad() const { return (width()>VL_WORDSIZE && width()<=VL_QUADSIZE); }
     bool	isWide() const { return (width()>VL_QUADSIZE); }
+    bool	isDouble() const;
+    bool	isSigned() const;
 
     AstNUser*	user1p() const {
 	// Slows things down measurably, so disabled by default
@@ -931,15 +948,29 @@ public:
     bool	isAllOnes();
     bool	isAllOnesV();  // Verilog width rules apply
 
-    // METHODS
+    // METHODS - data type changes especially for initial creation
+    void	dtypeChgSigned(bool flag) { numeric(flag ? AstNumeric::SIGNED : AstNumeric::UNSIGNED); }
+    void	dtypeSetBitSized(int widthf, int widthMinf, AstNumeric numericf) { numeric(numericf); width(widthf,widthMinf); }
+    void	dtypeSetLogicSized(int widthf, int widthMinf, AstNumeric numericf) { numeric(numericf); width(widthf,widthMinf); }
+    void	dtypeSetLogicBool()	{ numeric(AstNumeric::UNSIGNED); width(1,1); }
+    void	dtypeSetDouble()	{ numeric(AstNumeric::DOUBLE); }
+    void	dtypeSetSigned32()	{ numeric(AstNumeric::SIGNED); width(VL_WORDSIZE,VL_WORDSIZE); }
+    void	dtypeSetUInt32()	{ numeric(AstNumeric::UNSIGNED); width(VL_WORDSIZE,VL_WORDSIZE); }
+    void	dtypeSetUInt64()	{ numeric(AstNumeric::UNSIGNED); width(VL_QUADSIZE,VL_QUADSIZE); }
+
+    // METHODS - dump and error
+    void	v3errorEnd(ostringstream& str) const;
+    virtual void dump(ostream& str=cout);
+    void	dumpGdb(); // For GDB only
+    void	dumpGdbHeader() const;
+
+    // METHODS - Tree modifications
     AstNode*	addNext(AstNode* newp);		// Returns this, adds to end of list
     AstNode*	addNextNull(AstNode* newp);	// Returns this, adds to end of list, NULL is OK
     void	addNextHere(AstNode* newp);	// Adds after speced node
     void	addPrev(AstNode* newp) { replaceWith(newp); newp->addNext(this); }
     void	addHereThisAsNext(AstNode* newp); // Adds at old place of this, this becomes next
     void	replaceWith(AstNode* newp);	// Replace current node in tree with new node
-    void	v3errorEnd(ostringstream& str) const;
-    virtual void dump(ostream& str=cout);
     AstNode*	unlinkFrBack(AstNRelinker* linkerp=NULL);  // Unlink this from whoever points to it.
     AstNode*	unlinkFrBackWithNext(AstNRelinker* linkerp=NULL);  // Unlink this from whoever points to it, keep entire next list with unlinked node
     void	swapWith(AstNode* bp);
@@ -956,11 +987,13 @@ public:
     void	checkTree();  // User Interface version
     void	dumpPtrs(ostream& str=cout) const;
     void	dumpTree(ostream& str=cout, const string& indent="    ", int maxDepth=0);
+    void	dumpTreeGdb(); // For GDB only
     void	dumpTreeAndNext(ostream& str=cout, const string& indent="    ", int maxDepth=0);
     void	dumpTreeFile(const string& filename, bool append=false);
 
     // METHODS - queries
-    virtual bool isSplittable() const { return true; }	// Else a $display, etc, that must be ordered with other displays
+    virtual bool isPure() const { return true; }	// Else a $display, etc, that must be ordered with other displays
+    virtual bool isBrancher() const { return false; }	// Changes control flow, disable some optimizations
     virtual bool isGateOptimizable() const { return true; }	// Else a AstTime etc that can't be pushed out
     virtual bool isSubstOptimizable() const { return true; }	// Else a AstTime etc that can't be substituted out
     virtual bool isPredictOptimizable() const { return true; }	// Else a AstTime etc which output can't be predicted from input
@@ -969,6 +1002,7 @@ public:
     virtual int  instrCount() const { return 0; }
     virtual V3Hash sameHash() const { return V3Hash(V3Hash::Illegal()); }  // Not a node that supports it
     virtual bool same(AstNode* otherp) const { return true; }
+    virtual bool hasDType() const { return false; }	// Iff has a data type; dtype() must be non null
     virtual bool maybePointedTo() const { return false; }  // Another AstNode* may have a pointer into this node, other then normal front/back/etc.
     virtual bool broken() const { return false; }
 
@@ -1005,6 +1039,7 @@ struct AstNodeMath : public AstNode {
 	: AstNode(fl) {}
     ASTNODE_BASE_FUNCS(NodeMath)
     // METHODS
+    virtual bool hasDType() const { return true; }
     virtual string emitVerilog() = 0;  /// Format string for verilog writing; see V3EmitV
     virtual string emitC() = 0;
     virtual string emitSimpleOperator() { return ""; }
@@ -1129,7 +1164,7 @@ struct AstNodeCond : public AstNodeTriop {
 };
 
 struct AstNodePreSel : public AstNode {
-    // Something that becomes a AstSel
+    // Something that becomes an AstSel
     AstNodePreSel(FileLine* fl, AstNode* lhs, AstNode* rhs, AstNode* ths)
 	: AstNode(fl) {
 	setOp1p(lhs); setOp2p(rhs); setNOp3p(ths); }
@@ -1154,8 +1189,8 @@ struct AstNodeStmt : public AstNode {
 	: AstNode(fl) {}
     ASTNODE_BASE_FUNCS(NodeStmt)
     // METHODS
-    virtual void addNextStmt(AstNode* newp, AstNode* belowp);  // Stop statement searchback here 
-    virtual void addBeforeStmt(AstNode* newp, AstNode* belowp);  // Stop statement searchback here 
+    virtual void addNextStmt(AstNode* newp, AstNode* belowp);  // Stop statement searchback here
+    virtual void addBeforeStmt(AstNode* newp, AstNode* belowp);  // Stop statement searchback here
 };
 
 struct AstNodeAssign : public AstNodeStmt {
@@ -1171,6 +1206,7 @@ struct AstNodeAssign : public AstNodeStmt {
     AstNode* lhsp()		const { return op2p()->castNode(); }	// op2 = Assign to
     void rhsp(AstNode* np) { setOp1p(np); }
     void lhsp(AstNode* np) { setOp2p(np); }
+    virtual bool hasDType() const { return true; }
     virtual bool cleanRhs() { return true; }
     virtual int  instrCount() const { return widthInstrs(); }
     virtual V3Hash sameHash() const { return V3Hash(); }
@@ -1253,18 +1289,21 @@ private:
     string	m_name;		// Name of variable
     string	m_hiername;	// Scope converted into name-> for emitting
     bool	m_hierThis;	// Hiername points to "this" function
+    void init();
 public:
     AstNodeVarRef(FileLine* fl, const string& name, bool lvalue)
 	: AstNodeMath(fl), m_lvalue(lvalue), m_varp(NULL), m_varScopep(NULL),
 	  m_packagep(NULL), m_name(name), m_hierThis(false) {
+	init();
     }
     AstNodeVarRef(FileLine* fl, const string& name, AstVar* varp, bool lvalue)
 	: AstNodeMath(fl), m_lvalue(lvalue), m_varp(varp), m_varScopep(NULL),
 	  m_packagep(NULL), m_name(name), m_hierThis(false) {
 	// May have varp==NULL
-	if (m_varp) widthSignedFrom((AstNode*)m_varp);
+	init();
     }
     ASTNODE_BASE_FUNCS(NodeVarRef)
+    virtual bool hasDType() const { return true; }
     virtual bool broken() const;
     virtual int instrCount() const { return widthInstrs(); }
     virtual void cloneRelink();
@@ -1310,10 +1349,16 @@ struct AstNodeDType : public AstNode {
     AstNodeDType(FileLine* fl) : AstNode(fl) {}
     ASTNODE_BASE_FUNCS(NodeDType)
     // Accessors
+    virtual void dump(ostream& str);
+    virtual bool hasDType() const { return true; }
     virtual AstBasicDType* basicp() const = 0;  // (Slow) recurse down to find basic data type
     virtual AstNodeDType* skipRefp() const = 0;  // recurses over typedefs to next non-typeref type
     virtual int widthAlignBytes() const = 0; // (Slow) recurses - Structure alignment 1,2,4 or 8 bytes (arrays affect this)
     virtual int widthTotalBytes() const = 0; // (Slow) recurses - Width in bytes rounding up 1,2,4,8,12,...
+    virtual bool maybePointedTo() const { return true; }
+    AstNodeDType* dtypeDimensionp(int depth);
+    pair<uint32_t,uint32_t> dimensions();
+    uint32_t	arrayElements();	// 1, or total multiplication of all dimensions
 };
 
 struct AstNodeSel : public AstNodeBiop {
@@ -1326,6 +1371,7 @@ struct AstNodeSel : public AstNodeBiop {
     AstNode* bitp() const { return op2p()->castNode(); }	// op2 = Msb selection expression
     void bitp(AstNode* nodep) { setOp2p(nodep); }
     int	     bitConst()	const;
+    virtual bool hasDType() const { return true; }
 };
 
 //######################################################################
@@ -1489,10 +1535,15 @@ public:
 //######################################################################
 // Inline ACCESSORS
 
+inline bool AstNode::isDouble() const { return numeric().isDouble(); }
+inline bool AstNode::isSigned() const { return numeric().isSigned(); }
+
 inline bool AstNode::isZero()     { return (this->castConst() && this->castConst()->num().isEqZero()); }
 inline bool AstNode::isNeqZero()  { return (this->castConst() && this->castConst()->num().isNeqZero()); }
 inline bool AstNode::isOne()      { return (this->castConst() && this->castConst()->num().isEqOne()); }
-inline bool AstNode::isAllOnes()  { return (this->castConst() && this->castConst()->num().isEqAllOnes(this->width())); }
-inline bool AstNode::isAllOnesV() { return (this->castConst() && this->castConst()->num().isEqAllOnes(this->widthMin())); }
+inline bool AstNode::isAllOnes()  { return (this->castConst() && this->castConst()->isEqAllOnes()); }
+inline bool AstNode::isAllOnesV() { return (this->castConst() && this->castConst()->isEqAllOnesV()); }
+
+inline void AstNodeVarRef::init() { if (m_varp) widthSignedFrom((AstNode*)m_varp); }
 
 #endif // Guard

src/V3AstNodes.cpp

@@ -1,3 +1,4 @@
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Ast node structures
 //
@@ -7,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2003-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.
@@ -245,7 +246,7 @@ string AstVar::scType() const {
     }
 }
 
-AstNodeDType* AstVar::dtypeDimensionp(int dimension) const {
+AstNodeDType* AstNodeDType::dtypeDimensionp(int dimension) {
     // dimension passed from AstArraySel::dimension
     // Dimension 0 means the VAR itself, 1 is the closest SEL to the AstVar,
     // which is the lowest in the dtype list.
@@ -258,18 +259,18 @@ AstNodeDType* AstVar::dtypeDimensionp(int dimension) const {
     //	      *or*	VAR a (ARRAYSEL0 (ARRAYSEL1 (ARRAYSEL2 (ARRAYSEL3 (DT))))
     //	   SEL1 needs to select from entire variable which is a pointer to ARRAYSEL0
     int dim = 0;
-    for (AstNodeDType* dtypep=this->dtypep(); dtypep; ) {
+    for (AstNodeDType* dtypep=this; dtypep; ) {
 	dtypep = dtypep->skipRefp();  // Skip AstRefDType/AstTypedef, or return same node
 	if (AstArrayDType* adtypep = dtypep->castArrayDType()) {
 	    if ((dim++)==dimension) {
 		return dtypep;
 	    }
-	    dtypep = adtypep->dtypep();
+	    dtypep = adtypep->subDTypep();
 	    continue;
 	}
 	else if (AstBasicDType* adtypep = dtypep->castBasicDType()) {
 	    // AstBasicDType - nothing below, return null
-	    if (adtypep->rangep()) {
+	    if (adtypep->isRanged()) {
 		if ((dim++) == dimension) {
 		    return adtypep;
 		}
@@ -282,13 +283,13 @@ AstNodeDType* AstVar::dtypeDimensionp(int dimension) const {
     return NULL;
 }
 
-uint32_t AstVar::arrayElements() const {
+uint32_t AstNodeDType::arrayElements() {
     uint32_t entries=1;
-    for (AstNodeDType* dtypep=this->dtypep(); dtypep; ) {
+    for (AstNodeDType* dtypep=this; dtypep; ) {
 	dtypep = dtypep->skipRefp();  // Skip AstRefDType/AstTypedef, or return same node
 	if (AstArrayDType* adtypep = dtypep->castArrayDType()) {
 	    entries *= adtypep->elementsConst();
-	    dtypep = adtypep->dtypep();
+	    dtypep = adtypep->subDTypep();
 	}
 	else {
 	    // AstBasicDType - nothing below, 1
@@ -298,16 +299,16 @@ uint32_t AstVar::arrayElements() const {
     return entries;
 }
 
-pair<uint32_t,uint32_t> AstVar::dimensions() const {
+pair<uint32_t,uint32_t> AstNodeDType::dimensions() {
     // How many array dimensions (packed,unpacked) does this Var have?
     uint32_t packed = 0;
     uint32_t unpacked = 0;
-    for (AstNodeDType* dtypep=this->dtypep(); dtypep; ) {
+    for (AstNodeDType* dtypep=this; dtypep; ) {
 	dtypep = dtypep->skipRefp();  // Skip AstRefDType/AstTypedef, or return same node
 	if (AstArrayDType* adtypep = dtypep->castArrayDType()) {
 	    if (adtypep->isPacked()) packed += 1;
 	    else unpacked += 1;
-	    dtypep = adtypep->dtypep();
+	    dtypep = adtypep->subDTypep();
 	}
 	else {
 	    // AstBasicDType - nothing below, 1
@@ -496,21 +497,21 @@ void AstWhile::addNextStmt(AstNode* newp, AstNode* belowp) {
 //======================================================================
 // Per-type Debugging
 
-void AstNode::dump(ostream& os) {
-    os<<typeName()<<" "<<(void*)this
+void AstNode::dump(ostream& str) {
+    str<<typeName()<<" "<<(void*)this
 	//<<" "<<(void*)this->m_backp
-      <<" <e"<<dec<<editCount()
-      <<((editCount()>=editCountLast())?"#>":">")
-      <<" {"<<fileline()->filenameLetters()<<dec<<fileline()->lineno()<<"}"
-      <<" "<<(isSigned()?"s":"")
-      <<(isDouble()?"d":"")
-      <<"w"<<(widthSized()?"":"u")<<width();
-    if (!widthSized()) os<<"/"<<widthMin();
-    if (name()!="") os<<"  "<<AstNode::quoteName(name());
+       <<" <e"<<dec<<editCount()
+       <<((editCount()>=editCountLast())?"#>":">")
+       <<" {"<<fileline()->filenameLetters()<<dec<<fileline()->lineno()<<"}"
+       <<" "<<(isSigned()?"s":"")
+       <<(isDouble()?"d":"")
+       <<"w"<<(widthSized()?"":"u")<<width();
+    if (!widthSized()) str<<"/"<<widthMin();
+    if (name()!="") str<<"  "<<AstNode::quoteName(name());
 }
 
 void AstArrayDType::dump(ostream& str) {
-    this->AstNode::dump(str);
+    this->AstNodeDType::dump(str);
     if (isPacked()) str<<" [PACKED]";
 }
 void AstArraySel::dump(ostream& str) {
@@ -522,8 +523,9 @@ void AstAttrOf::dump(ostream& str) {
     str<<" ["<<attrType().ascii()<<"]";
 }
 void AstBasicDType::dump(ostream& str) {
-    this->AstNode::dump(str);
-    str<<" ["<<keyword().ascii()<<"]";
+    this->AstNodeDType::dump(str);
+    str<<" kwd="<<keyword().ascii();
+    if (isRanged() && !rangep()) str<<" range=["<<left()<<":"<<right()<<"]";
     if (implicit()) str<<" [IMPLICIT]";
 }
 void AstCCast::dump(ostream& str) {
@@ -566,7 +568,7 @@ void AstRange::dump(ostream& str) {
     if (littleEndian()) str<<" [LITTLE]";
 }
 void AstRefDType::dump(ostream& str) {
-    this->AstNode::dump(str);
+    this->AstNodeDType::dump(str);
     if (defp()) { str<<" -> "; defp()->dump(str); }
     else { str<<" -> UNLINKED"; }
 }
@@ -580,6 +582,9 @@ void AstVarXRef::dump(ostream& str) {
     else if (varp()) { varp()->dump(str); }
     else { str<<"UNLINKED"; }
 }
+void AstNodeDType::dump(ostream& str) {
+    this->AstNode::dump(str);
+}
 void AstNodeModule::dump(ostream& str) {
     this->AstNode::dump(str);
     str<<"  L"<<level();
@@ -616,7 +621,7 @@ void AstVar::dump(ostream& str) {
     if (isConst()) str<<" [CONST]";
     if (isUsedClock()) str<<" [CLK]";
     if (isSigPublic()) str<<" [P]";
-    if (isUsedLoopIdx()) str<<" [LOOP]"; 
+    if (isUsedLoopIdx()) str<<" [LOOP]";
     if (attrClockEn()) str<<" [aCLKEN]";
     if (attrIsolateAssign()) str<<" [aISO]";
     if (attrFileDescr()) str<<" [aFD]";
@@ -660,6 +665,7 @@ void AstNodeFTask::dump(ostream& str) {
 void AstBegin::dump(ostream& str) {
     this->AstNode::dump(str);
     if (unnamed()) str<<" [UNNAMED]";
+    if (hidden()) str<<" [HIDDEN]";
 }
 void AstCoverDecl::dump(ostream& str) {
     this->AstNode::dump(str);

src/V3Begin.cpp

@@ -1,3 +1,4 @@
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Removal of named begin blocks
 //
@@ -7,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2003-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.
@@ -45,9 +46,31 @@
 
 //######################################################################
 
+class BeginState {
+private:
+    // NODE STATE
+    //Entire netlist:
+    // AstNodeFTask::user1	-> bool, 1=processed
+    AstUser1InUse	m_inuser1;
+    bool		m_anyFuncInBegin;
+public:
+    BeginState() {
+	m_anyFuncInBegin = false;
+    }
+    ~BeginState() {}
+    void userMarkChanged(AstNodeFTask* nodep) {
+	nodep->user1(true);
+	m_anyFuncInBegin = true;
+    }
+    bool anyFuncInBegin() const { return m_anyFuncInBegin; }
+};
+
+//######################################################################
+
 class BeginVisitor : public AstNVisitor {
 private:
     // STATE
+    BeginState*		m_statep;	// Current global state
     AstNodeModule*	m_modp;		// Current module
     AstNodeFTask* 	m_ftaskp;	// Current function/task
     string		m_namedScope;	// Name of begin blocks above us
@@ -70,9 +93,27 @@ private:
 	m_modp = NULL;
     }
     virtual void visit(AstNodeFTask* nodep, AstNUser*) {
-	m_ftaskp = nodep;
-	nodep->iterateChildren(*this);
-	m_ftaskp = NULL;
+	UINFO(8,"  "<<nodep<<endl);
+	// Rename it
+	if (m_unnamedScope != "") {
+	    nodep->name(m_unnamedScope+"__DOT__"+nodep->name());
+	    UINFO(8,"     rename to "<<nodep->name()<<endl);
+	    m_statep->userMarkChanged(nodep);
+	}
+	// BEGIN wrapping a function rename that function, but don't affect the inside function's variables
+	// We then restart with empty naming; so that any begin's inside the function will rename inside the function
+	// Process children
+	string oldScope = m_namedScope;
+	string oldUnnamed = m_unnamedScope;
+	{
+	    m_namedScope = "";
+	    m_unnamedScope = "";
+	    m_ftaskp = nodep;
+	    nodep->iterateChildren(*this);
+	    m_ftaskp = NULL;
+	}
+	m_namedScope = oldScope;
+	m_unnamedScope = oldUnnamed;
     }
     virtual void visit(AstBegin* nodep, AstNUser*) {
 	// Begin blocks were only useful in variable creation, change names and delete
@@ -80,7 +121,7 @@ private:
 	string oldScope = m_namedScope;
 	string oldUnnamed = m_unnamedScope;
 	{
-	    //UINFO(8,"nname "<<m_namedScope<<endl);
+	    UINFO(8,"nname "<<m_namedScope<<endl);
 	    if (nodep->name() != "") {  // Else unneeded unnamed block
 		// Create data for dotted variable resolution
 		string dottedname = nodep->name() + "__DOT__";  // So always found
@@ -102,18 +143,31 @@ private:
 	    }
 
 	    // Remap var names and replace lower Begins
-	    nodep->iterateChildren(*this);
+	    nodep->stmtsp()->iterateAndNext(*this);
 
-	    if (AstNode* stmtsp = nodep->stmtsp()) {
-		stmtsp->unlinkFrBackWithNext();
-		nodep->replaceWith(stmtsp);
-	    } else {
-		nodep->unlinkFrBack();
-	    }
-	    pushDeletep(nodep); nodep=NULL;
 	}
 	m_namedScope = oldScope;
 	m_unnamedScope = oldUnnamed;
+
+	// Don't change var names of generate FOR() variables, but do recurse into a child FOR
+	nodep->flatsp()->iterateAndNext(*this);
+
+	// Cleanup
+	AstNode* addsp = NULL;
+	if (AstNode* stmtsp = nodep->stmtsp()) {
+	    stmtsp->unlinkFrBackWithNext();
+	    addsp = addsp->addNextNull(stmtsp);
+	}
+	if (AstNode* stmtsp = nodep->flatsp()) {
+	    stmtsp->unlinkFrBackWithNext();
+	    addsp = addsp->addNextNull(stmtsp);
+	}
+	if (addsp) {
+	    nodep->replaceWith(addsp);
+	} else {
+	    nodep->unlinkFrBack();
+	}
+	pushDeletep(nodep); nodep=NULL;
     }
     virtual void visit(AstVar* nodep, AstNUser*) {
 	if (m_unnamedScope != "") {
@@ -173,7 +227,8 @@ private:
     }
 public:
     // CONSTUCTORS
-    BeginVisitor(AstNetlist* nodep) {
+    BeginVisitor(AstNetlist* nodep, BeginState* statep) {
+	m_statep = statep;
 	m_modp = NULL;
 	m_ftaskp = NULL;
 	m_repeatNum = 0;
@@ -183,10 +238,43 @@ public:
     virtual ~BeginVisitor() {}
 };
 
+//######################################################################
+
+class BeginRelinkVisitor : public AstNVisitor {
+    // Replace tasks with new pointer
+private:
+    // NODE STATE
+    //  Input:
+    //   AstNodeFTask::user1p		// Node replaced, rename it
+
+    // VISITORS
+    virtual void visit(AstNodeFTaskRef* nodep, AstNUser*) {
+	if (nodep->taskp()->user1()) { // It was converted
+	    UINFO(9, "    relinkFTask "<<nodep<<endl);
+	    nodep->name(nodep->taskp()->name());
+	}
+	nodep->iterateChildren(*this);
+    }
+    //--------------------
+    virtual void visit(AstNode* nodep, AstNUser*) {
+	nodep->iterateChildren(*this);
+    }
+public:
+    // CONSTUCTORS
+    BeginRelinkVisitor(AstNetlist* nodep, BeginState*) {
+	nodep->accept(*this);
+    }
+    virtual ~BeginRelinkVisitor() {}
+};
+
 //######################################################################
 // Task class functions
 
 void V3Begin::debeginAll(AstNetlist* nodep) {
     UINFO(2,__FUNCTION__<<": "<<endl);
-    BeginVisitor bvisitor (nodep);
+    BeginState state;
+    { BeginVisitor bvisitor (nodep,&state); }
+    if (state.anyFuncInBegin()) {
+	BeginRelinkVisitor brvisitor (nodep,&state);
+    }
 }

src/V3Begin.h

@@ -1,4 +1,4 @@
-// -*- C++ -*-
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Removal of named begin blocks
 //
@@ -8,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2003-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.

src/V3Branch.cpp

@@ -1,3 +1,4 @@
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Branch prediction
 //
@@ -7,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2003-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.

src/V3Branch.h

@@ -1,4 +1,4 @@
-// -*- C++ -*-
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Branch prediction
 //
@@ -8,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2003-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.

src/V3Broken.cpp

@@ -1,3 +1,4 @@
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Find broken links in tree
 //
@@ -7,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2003-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.
@@ -204,14 +205,16 @@ private:
     virtual void visit(AstNode* nodep, AstNUser*) {
 	BrokenTable::setUnder(nodep,true);
 	if (nodep->broken()) {
-	    nodep->v3fatalSrc("Broken link in node (or something without maybePointedTo)\n");
+	    nodep->v3fatalSrc("Broken link in node (or something without maybePointedTo)");
 	}
-	if (v3Global.assertWidthsSame()) {
-	    if (nodep->width() != nodep->widthMin()) {
-		nodep->v3fatalSrc("Width != WidthMin\n");
-	    }
+	if (v3Global.assertDTypesResolved()) {
 	    if (!nodep->width() && nodep->castNodeMath()) {
-		nodep->v3fatalSrc("Math node has no assigned width\n");
+		nodep->v3fatalSrc("Math node has no assigned width");
+	    }
+	}
+	if (v3Global.assertWidthsMatch()) {
+	    if (nodep->width() != nodep->widthMin()) {
+		nodep->v3fatalSrc("Width != WidthMin");
 	    }
 	}
 	nodep->iterateChildren(*this);

src/V3Broken.h

@@ -1,4 +1,4 @@
-// -*- C++ -*-
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Find broken links in tree
 //
@@ -8,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2003-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.

src/V3Case.cpp

@@ -1,3 +1,4 @@
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Break case statements up and add Unknown assigns
 //
@@ -7,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2003-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.

src/V3Case.h

@@ -1,4 +1,4 @@
-// -*- C++ -*-
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Break case statements up and add Unknown assigns
 //
@@ -8,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2003-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.

src/V3Cast.cpp

@@ -1,3 +1,4 @@
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Add C++ casts across expression size changes
 //
@@ -7,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2004-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2004-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.
@@ -77,8 +78,7 @@ private:
 	AstNRelinker relinkHandle;
 	nodep->unlinkFrBack(&relinkHandle);
 	//
-	AstCCast* castp = new AstCCast (nodep->fileline(), nodep, needsize);
-	castp->width(needsize, nodep->widthMin());
+	AstCCast* castp = new AstCCast (nodep->fileline(), nodep, needsize, nodep->widthMin());
 	relinkHandle.relink(castp);
 	//if (debug()>8) castp->dumpTree(cout,"-castins: ");
 	//

src/V3Cast.h

@@ -1,4 +1,4 @@
-// -*- C++ -*-
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Add C++ casts across expression size changes
 //
@@ -8,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2004-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2004-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.

src/V3Cdc.cpp

@@ -1,3 +1,4 @@
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Clock Domain Crossing Lint
 //
@@ -7,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2003-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.

src/V3Cdc.h

@@ -1,4 +1,4 @@
-// -*- C++ -*-
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Break always into sensitivity block domains
 //
@@ -8,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2003-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.

src/V3Changed.cpp

@@ -1,3 +1,4 @@
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Add temporaries, such as for changed nodes
 //
@@ -7,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2003-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.
@@ -59,6 +60,12 @@ private:
     AstScope*		m_scopetopp;	// Scope under TOPSCOPE
     AstCFunc*		m_chgFuncp;	// Change function we're building
 
+    // CONSTANTS
+    enum MiscConsts {
+	DETECTARRAY_MAX_INDEXES = 256	// How many indexes before error
+	// Ok to increase this, but may result in much slower model
+    };
+
     // METHODS
     static int debug() {
 	static int level = -1;
@@ -66,14 +73,33 @@ private:
 	return level;
     }
 
+    AstNode* aselIfNeeded(bool isArray, int index, AstNode* childp) {
+	if (isArray) {
+	    return new AstArraySel(childp->fileline(), childp,
+				   new AstConst(childp->fileline(), index));
+	} else {
+	    return childp;
+	}
+    }
+
     void genChangeDet(AstVarScope* vscp) {
 #ifdef NEW_ORDERING
 	vscp->v3fatalSrc("Not applicable\n");
 #endif
 	AstVar* varp = vscp->varp();
 	vscp->v3warn(IMPERFECTSCH,"Imperfect scheduling of variable: "<<vscp);
-	if (!varp->dtypeSkipRefp()->castBasicDType()) {
-	    vscp->v3error("Unsupported: Can't detect changes on arrayed variable (probably with UNOPTFLAT warning suppressed): "<<varp->prettyName());
+	AstArrayDType* arrayp = varp->dtypeSkipRefp()->castArrayDType();
+	bool isArray = arrayp;
+	int msb = isArray ? arrayp->msb() : 0;
+	int lsb = isArray ? arrayp->lsb() : 0;
+	if (isArray && ((msb - lsb + 1) > DETECTARRAY_MAX_INDEXES)) {
+	    vscp->v3warn(E_DETECTARRAY, "Unsupported: Can't detect more than "<<cvtToStr(DETECTARRAY_MAX_INDEXES)
+			 <<" array indexes (probably with UNOPTFLAT warning suppressed): "<<varp->prettyName());
+	    vscp->v3warn(E_DETECTARRAY, "... Could recompile with DETECTARRAY_MAX_INDEXES increased to at least "<<cvtToStr(msb-lsb+1));
+	} else if (!isArray
+		   && !varp->dtypeSkipRefp()->castBasicDType()) {
+	    if (debug()) varp->dumpTree(cout,"-DETECTARRAY-");
+	    vscp->v3warn(E_DETECTARRAY, "Unsupported: Can't detect changes on complex variable (probably with UNOPTFLAT warning suppressed): "<<varp->prettyName());
 	} else {
 	    string newvarname = "__Vchglast__"+vscp->scopep()->nameDotless()+"__"+varp->shortName();
 	    // Create:  VARREF(_last)
@@ -84,17 +110,23 @@ private:
 	    m_topModp->addStmtp(newvarp);
 	    AstVarScope* newvscp = new AstVarScope(vscp->fileline(), m_scopetopp, newvarp);
 	    m_scopetopp->addVarp(newvscp);
-	    AstChangeDet* changep
-		= new AstChangeDet (vscp->fileline(),
-				    new AstVarRef(vscp->fileline(), vscp, false),
-				    new AstVarRef(vscp->fileline(), newvscp, false),
-				    false);
-	    m_chgFuncp->addStmtsp(changep);
-	    AstAssign* initp
-		= new AstAssign (vscp->fileline(),
-				 new AstVarRef(vscp->fileline(), newvscp, true),
-				 new AstVarRef(vscp->fileline(), vscp, false));
-	    m_chgFuncp->addFinalsp(initp);
+	    for (int index=lsb; index<=msb; ++index) {
+		AstChangeDet* changep
+		    = new AstChangeDet (vscp->fileline(),
+					aselIfNeeded(isArray, index,
+						     new AstVarRef(vscp->fileline(), vscp, false)),
+					aselIfNeeded(isArray, index,
+						     new AstVarRef(vscp->fileline(), newvscp, false)),
+					false);
+		m_chgFuncp->addStmtsp(changep);
+		AstAssign* initp
+		    = new AstAssign (vscp->fileline(),
+				     aselIfNeeded(isArray, index,
+						  new AstVarRef(vscp->fileline(), newvscp, true)),
+				     aselIfNeeded(isArray, index,
+						  new AstVarRef(vscp->fileline(), vscp, false)));
+		m_chgFuncp->addFinalsp(initp);
+	    }
 	}
     }
 

src/V3Changed.h

@@ -1,4 +1,4 @@
-// -*- C++ -*-
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Pre C-Emit stage changes
 //
@@ -8,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2003-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.

src/V3Clean.cpp

@@ -1,3 +1,4 @@
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Add temporaries, such as for clean nodes
 //
@@ -7,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2003-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.
@@ -24,7 +25,7 @@
 //	For each math operator, if it requires a clean operand,
 //	and the operand is dirty, insert a CLEAN node.
 //	Resize operands to C++ 32/64/wide types.
-//	Copy all width() values to minWidth() so RANGE, etc can still see orig widths
+//	Copy all width() values to widthMin() so RANGE, etc can still see orig widths
 //
 //*************************************************************************
 
@@ -47,7 +48,7 @@ private:
     // NODE STATE
     // Entire netlist:
     //  AstNode::user()		-> CleanState.  For this node, 0==UNKNOWN
-    //  AstNode::user2()	-> bool.  True indicates minWidth has been propagated
+    //  AstNode::user2()	-> bool.  True indicates widthMin has been propagated
     AstUser1InUse	m_inuser1;
     AstUser2InUse	m_inuser2;
 

src/V3Clean.h

@@ -1,4 +1,4 @@
-// -*- C++ -*-
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Pre C-Emit stage changes
 //
@@ -8,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2003-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.

src/V3ClkGater.cpp

@@ -1,4 +1,4 @@
-// -*- C++ -*-
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Break always into sensitivity active domains
 //
@@ -8,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2008-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2008-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.
@@ -862,9 +862,9 @@ class GaterVisitor : public GaterBaseVisitor {
 	    m_stmtVscp = NULL;
 	    m_stmtInPli = false;
 	}
-	if (!nodep->isSplittable()) {
+	if (!nodep->isPure() || nodep->isBrancher()) {
 	    // May also be a new statement (above if); if so we mark it immediately
-	    UINFO(9,"         NotSplittable "<<nodep<<endl);
+	    UINFO(9,"         NotPure "<<nodep<<endl);
 	    scoreboardPli(nodep);
 	}
 	{

src/V3ClkGater.h

@@ -1,4 +1,4 @@
-// -*- C++ -*-
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Break always into clock gated blocks
 //
@@ -8,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2003-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.

src/V3Clock.cpp

@@ -1,3 +1,4 @@
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Clocking POS/NEGEDGE insertion
 //
@@ -7,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2003-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.
@@ -83,10 +84,9 @@ private:
     AstVarScope* getCreateLastClk(AstVarScope* vscp) {
 	if (vscp->user1p()) return ((AstVarScope*)vscp->user1p());
 	AstVar* varp = vscp->varp();
-	if (varp->width()!=1) varp->v3error("Unsupported: Clock edge on non-single bit signal: "<<varp->prettyName());
+	if (!varp->width1()) varp->v3error("Unsupported: Clock edge on non-single bit signal: "<<varp->prettyName());
 	string newvarname = ((string)"__Vclklast__"+vscp->scopep()->nameDotless()+"__"+varp->shortName());
-	AstVar* newvarp = new AstVar (vscp->fileline(), AstVarType::MODULETEMP, newvarname, AstLogicPacked(), 1);
-	newvarp->width(1,1);
+	AstVar* newvarp = new AstVar (vscp->fileline(), AstVarType::MODULETEMP, newvarname, VFlagLogicPacked(), 1);
 	m_modp->addStmtp(newvarp);
 	AstVarScope* newvscp = new AstVarScope(vscp->fileline(), m_scopep, newvarp);
 	vscp->user1p(newvscp);
@@ -104,7 +104,7 @@ private:
     AstVarScope* getCreateLocalVar(FileLine* fl, const string& name, AstVar* examplep, int width) {
 	AstVar* newvarp;
 	if (width) {
-	    newvarp = new AstVar (fl, AstVarType::BLOCKTEMP, name, AstLogicPacked(), width);
+	    newvarp = new AstVar (fl, AstVarType::BLOCKTEMP, name, VFlagLogicPacked(), width);
 	} else {
 	    newvarp = new AstVar (fl, AstVarType::BLOCKTEMP, name, examplep); // No range; 1 bit.
 	}

src/V3Clock.h

@@ -1,4 +1,4 @@
-// -*- C++ -*-
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Clocking POS/NEGEDGE insertion
 //
@@ -8,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2003-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.

src/V3Combine.cpp

@@ -1,3 +1,4 @@
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Combine common code into functions
 //
@@ -7,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2003-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.

src/V3Combine.h

@@ -1,4 +1,4 @@
-// -*- C++ -*-
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Combine common code into functions
 //
@@ -8,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2003-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.

src/V3Config.cpp

@@ -1,3 +1,4 @@
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Configuration Files
 //
@@ -7,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2010-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2010-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.
@@ -62,7 +63,7 @@ class V3ConfigIgnores {
 
     IgnFiles		m_ignWilds;	// Ignores for each wildcarded filename
     IgnFiles		m_ignFiles;	// Ignores for each non-wildcarded filename
-    
+
     static V3ConfigIgnores s_singleton;	// Singleton (not via local static, as that's slow)
 
     V3ConfigIgnores() { m_lastLineno = -1; }

src/V3Config.h

@@ -1,4 +1,4 @@
-// -*- C++ -*-
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Configuration Files
 //
@@ -8,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2010-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2010-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.

src/V3Const.cpp

@@ -1,3 +1,4 @@
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Constant folding
 //
@@ -7,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2003-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.
@@ -104,6 +105,7 @@ private:
     bool	m_warn;		// Output warnings
     bool	m_doExpensive;	// Enable computationally expensive optimizations
     bool	m_doNConst;	// Enable non-constant-child simplifications
+    bool	m_doShort;	// Remove expressions that short circuit
     bool	m_doV;		// Verilog, not C++ conversion
     AstNodeModule*	m_modp;		// Current module
     AstNode*	m_scopep;	// Current scope
@@ -149,7 +151,7 @@ private:
 	// BIASV(CONSTa,BIASV(b...,BIASV(CONSTc,d...)))	 // hits operandAsvUp
 	// BIASV(CONSTa,BIASV(CONSTc,BIASV(c...,d...)))  // hits operandAsvConst
 	// BIASV(BIASV(CONSTa,CONSTc),BIASV(c...,d...))) // hits normal constant propagation
-	// BIASV(CONST_a_c,BIASV(c...,d...)))	
+	// BIASV(CONST_a_c,BIASV(c...,d...)))
 	//
 	// Idea for the future: All BiComAsvs could be lists, sorted by if they're constant
 	AstNodeBiComAsv* bnodep = nodep->castNodeBiComAsv();
@@ -228,11 +230,13 @@ private:
     }
     bool operandHugeShiftL(AstNodeBiop* nodep) {
 	return (nodep->rhsp()->castConst()
-		&& nodep->rhsp()->castConst()->toUInt() >= (uint32_t)(nodep->width()));
+		&& nodep->rhsp()->castConst()->toUInt() >= (uint32_t)(nodep->width())
+		&& isTPure(nodep->lhsp()));
     }
     bool operandHugeShiftR(AstNodeBiop* nodep) {
 	return (nodep->rhsp()->castConst()
-		&& nodep->rhsp()->castConst()->toUInt() >= (uint32_t)(nodep->lhsp()->width()));
+		&& nodep->rhsp()->castConst()->toUInt() >= (uint32_t)(nodep->lhsp()->width())
+		&& isTPure(nodep->lhsp()));
     }
     bool operandIsTwo(AstNode* nodep) {
 	return (nodep->castConst()
@@ -353,6 +357,14 @@ private:
 	return nodep;
     }
 
+    bool isTPure(AstNode* nodep) {
+	// Pure checks - if this node and all nodes under it are free of
+	// side effects can do this optimization
+	// Eventually we'll recurse through tree when unknown, memoizing results so far,
+	// but for now can disable en-mass until V3Purify takes effect.
+	return m_doShort || nodep->castVarRef() || nodep->castConst();
+    }
+
     // Extraction checks
     bool warnSelect(AstSel* nodep) {
 	AstNode* basefromp = AstArraySel::baseFromp(nodep);
@@ -363,7 +375,7 @@ private:
 	    if (m_warn
 		&& nodep->lsbp()->castConst()
 		&& nodep->widthp()->castConst()
-		&& (!bdtypep->rangep() || bdtypep->msb())) {  // else it's non-resolvable parameterized
+		&& (!bdtypep->isRanged() || bdtypep->msb())) {  // else it's non-resolvable parameterized
 		if (nodep->lsbp()->castConst()->num().isFourState()
 		    || nodep->widthp()->castConst()->num().isFourState()) {
 		    nodep->v3error("Selection index is constantly unknown or tristated: "
@@ -374,7 +386,7 @@ private:
 		else if ((nodep->msbConst() > bdtypep->msbMaxSelect())
 			 || (nodep->lsbConst() > bdtypep->msbMaxSelect())) {
 		    // See also warning in V3Width
-		    nodep->v3error("Selection index out of range: "
+		    nodep->v3warn(SELRANGE, "Selection index out of range: "
 				   <<nodep->msbConst()<<":"<<nodep->lsbConst()
 				   <<" outside "<<bdtypep->msbMaxSelect()<<":0"
 				   <<(bdtypep->lsb()>=0 ? ""
@@ -455,6 +467,21 @@ private:
     void replaceZero(AstNode* nodep) {
 	replaceNum(nodep, 0); nodep=NULL;
     }
+    void replaceZeroChkPure(AstNode* nodep, AstNode* checkp) {
+	// For example, "0 * n" -> 0 if n has no side effects
+	// Else strength reduce it to 0 & n.
+	// If ever change the operation note AstAnd rule specially ignores this created pattern
+	if (isTPure(checkp)) {
+	    replaceNum(nodep, 0); nodep=NULL;
+	} else {
+	    AstNode* newp = new AstAnd(nodep->fileline(),
+				       new AstConst(nodep->fileline(), 0),
+				       checkp->unlinkFrBack());
+	    newp->widthSignedFrom(nodep);
+	    nodep->replaceWith(newp);
+	    nodep->deleteTree(); nodep=NULL;
+	}
+    }
     void replaceAllOnes (AstNode* nodep) {
 	V3Number ones (nodep->fileline(), nodep->width(), 0);
 	ones.setMask(nodep->width());
@@ -832,9 +859,9 @@ private:
 		string name1 = ((string)"__Vconcswap"+cvtToStr(m_modp->varNumGetInc()));
 		string name2 = ((string)"__Vconcswap"+cvtToStr(m_modp->varNumGetInc()));
 		AstVar* temp1p = new AstVar(sel1p->fileline(), AstVarType::BLOCKTEMP, name1,
-					    AstLogicPacked(), msb1-lsb1+1);
+					    VFlagLogicPacked(), msb1-lsb1+1);
 		AstVar* temp2p = new AstVar(sel2p->fileline(), AstVarType::BLOCKTEMP, name2,
-					    AstLogicPacked(), msb2-lsb2+1);
+					    VFlagLogicPacked(), msb2-lsb2+1);
 		m_modp->addStmtp(temp1p);
 		m_modp->addStmtp(temp2p);
 		AstNodeAssign* asn1ap=nodep->cloneType
@@ -1356,7 +1383,7 @@ private:
 		    break;
 		}
 	    }
-	    
+
 	    // Pass2, remove dup edges
 	    for (AstNodeSenItem* nextp, * senp = nodep->sensesp()->castNodeSenItem();
 		 senp; senp=nextp) {
@@ -1601,6 +1628,12 @@ private:
 	}
     }
 
+    // Simplify
+    virtual void visit(AstBasicDType* nodep, AstNUser*) {
+	nodep->iterateChildren(*this);
+	nodep->cvtRangeConst();
+    }
+
     //-----
     // Jump elimination
 
@@ -1654,28 +1687,28 @@ private:
     TREEOPC("AstNodeUniop{$lhsp.castConst, !nodep->isOpaque()}",  "replaceConst(nodep)");
     // Zero on one side or the other
     TREEOP ("AstAdd   {$lhsp.isZero, $rhsp}",	"replaceWRhs(nodep)");
-    TREEOP ("AstAnd   {$lhsp.isZero, $rhsp}",	"replaceZero(nodep)");
+    TREEOP ("AstAnd   {$lhsp.isZero, $rhsp, isTPure($rhsp)}",	"replaceZero(nodep)");  // Can't use replaceZeroChkPure as we make this pattern in ChkPure
     TREEOP ("AstLogAnd{$lhsp.isZero, $rhsp}",	"replaceZero(nodep)");
     TREEOP ("AstLogOr {$lhsp.isZero, $rhsp}",	"replaceWRhs(nodep)");
-    TREEOP ("AstDiv   {$lhsp.isZero, $rhsp}",	"replaceZero(nodep)");
-    TREEOP ("AstDivS  {$lhsp.isZero, $rhsp}",	"replaceZero(nodep)");
-    TREEOP ("AstMul   {$lhsp.isZero, $rhsp}",	"replaceZero(nodep)");
-    TREEOP ("AstMulS  {$lhsp.isZero, $rhsp}",	"replaceZero(nodep)");
-    TREEOP ("AstPow   {$lhsp.isZero, $rhsp}",	"replaceZero(nodep)");
-    TREEOP ("AstPowS  {$lhsp.isZero, $rhsp}",	"replaceZero(nodep)");
+    TREEOP ("AstDiv   {$lhsp.isZero, $rhsp}",	"replaceZeroChkPure(nodep,$rhsp)");
+    TREEOP ("AstDivS  {$lhsp.isZero, $rhsp}",	"replaceZeroChkPure(nodep,$rhsp)");
+    TREEOP ("AstMul   {$lhsp.isZero, $rhsp}",	"replaceZeroChkPure(nodep,$rhsp)");
+    TREEOP ("AstMulS  {$lhsp.isZero, $rhsp}",	"replaceZeroChkPure(nodep,$rhsp)");
+    TREEOP ("AstPow   {$lhsp.isZero, $rhsp}",	"replaceZeroChkPure(nodep,$rhsp)");
+    TREEOP ("AstPowS  {$lhsp.isZero, $rhsp}",	"replaceZeroChkPure(nodep,$rhsp)");
     TREEOP ("AstOr    {$lhsp.isZero, $rhsp}",	"replaceWRhs(nodep)");
-    TREEOP ("AstShiftL{$lhsp.isZero, $rhsp}",	"replaceZero(nodep)");
-    TREEOP ("AstShiftR{$lhsp.isZero, $rhsp}",	"replaceZero(nodep)");
-    TREEOP ("AstShiftRS{$lhsp.isZero, $rhsp}",	"replaceZero(nodep)");
+    TREEOP ("AstShiftL{$lhsp.isZero, $rhsp}",	"replaceZeroChkPure(nodep,$rhsp)");
+    TREEOP ("AstShiftR{$lhsp.isZero, $rhsp}",	"replaceZeroChkPure(nodep,$rhsp)");
+    TREEOP ("AstShiftRS{$lhsp.isZero, $rhsp}",	"replaceZeroChkPure(nodep,$rhsp)");
     TREEOP ("AstXor   {$lhsp.isZero, $rhsp}",	"replaceWRhs(nodep)");
     TREEOP ("AstXnor  {$lhsp.isZero, $rhsp}",	"AstNot{$rhsp}");
     TREEOP ("AstSub   {$lhsp.isZero, $rhsp}",	"AstNegate{$rhsp}");
     TREEOP ("AstAdd   {$lhsp, $rhsp.isZero}",	"replaceWLhs(nodep)");
-    TREEOP ("AstAnd   {$lhsp, $rhsp.isZero}",	"replaceZero(nodep)");
-    TREEOP ("AstLogAnd{$lhsp, $rhsp.isZero}",	"replaceZero(nodep)");
+    TREEOP ("AstAnd   {$lhsp, $rhsp.isZero}",	"replaceZeroChkPure(nodep,$lhsp)");
+    TREEOP ("AstLogAnd{$lhsp, $rhsp.isZero}",	"replaceZeroChkPure(nodep,$lhsp)");
     TREEOP ("AstLogOr {$lhsp, $rhsp.isZero}",	"replaceWLhs(nodep)");
-    TREEOP ("AstMul   {$lhsp, $rhsp.isZero}",	"replaceZero(nodep)");
-    TREEOP ("AstMulS  {$lhsp, $rhsp.isZero}",	"replaceZero(nodep)");
+    TREEOP ("AstMul   {$lhsp, $rhsp.isZero}",	"replaceZeroChkPure(nodep,$lhsp)");
+    TREEOP ("AstMulS  {$lhsp, $rhsp.isZero}",	"replaceZeroChkPure(nodep,$lhsp)");
     TREEOP ("AstOr    {$lhsp, $rhsp.isZero}",	"replaceWLhs(nodep)");
     TREEOP ("AstShiftL{$lhsp, $rhsp.isZero}",	"replaceWLhs(nodep)");
     TREEOP ("AstShiftR{$lhsp, $rhsp.isZero}",	"replaceWLhs(nodep)");
@@ -1686,12 +1719,12 @@ private:
     // Non-zero on one side or the other
     TREEOP ("AstAnd   {$lhsp.isAllOnes, $rhsp}",	"replaceWRhs(nodep)");
     TREEOP ("AstLogAnd{$lhsp.isNeqZero, $rhsp}",	"replaceWRhs(nodep)");
-    TREEOP ("AstOr    {$lhsp.isAllOnes, $rhsp}",	"replaceWLhs(nodep)"); //->allOnes
+    TREEOP ("AstOr    {$lhsp.isAllOnes, $rhsp, isTPure($rhsp)}",	"replaceWLhs(nodep)"); //->allOnes
     TREEOP ("AstLogOr {$lhsp.isNeqZero, $rhsp}",	"replaceNum(nodep,1)");
     TREEOP ("AstAnd   {$lhsp, $rhsp.isAllOnes}",	"replaceWLhs(nodep)");
     TREEOP ("AstLogAnd{$lhsp, $rhsp.isNeqZero}",	"replaceWLhs(nodep)");
-    TREEOP ("AstOr    {$lhsp, $rhsp.isAllOnes}",	"replaceWRhs(nodep)"); //->allOnes
-    TREEOP ("AstLogOr {$lhsp, $rhsp.isNeqZero}",	"replaceNum(nodep,1)");
+    TREEOP ("AstOr    {$lhsp, $rhsp.isAllOnes, isTPure($lhsp)}",	"replaceWRhs(nodep)"); //->allOnes
+    TREEOP ("AstLogOr {$lhsp, $rhsp.isNeqZero, isTPure($lhsp)}",	"replaceNum(nodep,1)");
     TREEOP ("AstXor   {$lhsp.isAllOnes, $rhsp}",	"AstNot{$rhsp}");
     TREEOP ("AstXnor  {$lhsp.isAllOnes, $rhsp}",	"replaceWRhs(nodep)");
     TREEOP ("AstMul   {$lhsp.isOne, $rhsp}",	"replaceWRhs(nodep)");
@@ -1710,10 +1743,10 @@ private:
     TREEOPC("AstNodeCond{$condp.isNeqZero,    $expr1p.castConst, $expr2p.castConst}", "replaceWChild(nodep,$expr1p)");
     TREEOP ("AstNodeCond{$condp, operandsSame($expr1p,,$expr2p)}","replaceWChild(nodep,$expr1p)");
     TREEOP ("AstCond{$condp->castNot(),       $expr1p, $expr2p}", "AstCond{$condp->op1p(), $expr2p, $expr1p}");
-    TREEOP ("AstNodeCond{$condp.width1, $expr1p.width1,   $expr1p.isAllOnes, $expr2p}", "AstOr {$condp, $expr2p}");  // a?1:b == a|b
-    TREEOP ("AstNodeCond{$condp.width1, $expr1p.width1,   $expr1p,    $expr2p.isZero}", "AstAnd{$condp, $expr1p}");  // a?b:0 == a&b
-    TREEOP ("AstNodeCond{$condp.width1, $expr1p.width1,   $expr1p, $expr2p.isAllOnes}", "AstOr {AstNot{$condp}, $expr1p}");  // a?b:1 == ~a|b
-    TREEOP ("AstNodeCond{$condp.width1, $expr1p.width1,   $expr1p.isZero,    $expr2p}", "AstAnd{AstNot{$condp}, $expr2p}");  // a?0:b == ~a&b
+    TREEOP ("AstNodeCond{$condp.width1, $expr1p.width1,   $expr1p.isAllOnes, $expr2p}", "AstLogOr {$condp, $expr2p}");  // a?1:b == a||b
+    TREEOP ("AstNodeCond{$condp.width1, $expr1p.width1,   $expr1p,    $expr2p.isZero}", "AstLogAnd{$condp, $expr1p}");  // a?b:0 == a&&b
+    TREEOP ("AstNodeCond{$condp.width1, $expr1p.width1,   $expr1p, $expr2p.isAllOnes}", "AstLogOr {AstNot{$condp}, $expr1p}");  // a?b:1 == ~a||b
+    TREEOP ("AstNodeCond{$condp.width1, $expr1p.width1,   $expr1p.isZero,    $expr2p}", "AstLogAnd{AstNot{$condp}, $expr2p}");  // a?0:b == ~a&&b
     TREEOP ("AstNodeCond{!$condp.width1, operandBoolShift(nodep->condp())}", "replaceBoolShift(nodep->condp())");
     // Prefer constants on left, since that often needs a shift, it lets constant red remove the shift
     TREEOP ("AstNodeBiCom{!$lhsp.castConst, $rhsp.castConst}",	"swapSides(nodep)");
@@ -1838,9 +1871,9 @@ private:
     TREEOPV("AstOneHot{$lhsp.width1}",		"replaceWLhs(nodep)");
     TREEOPV("AstOneHot0{$lhsp.width1}",		"replaceNum(nodep,1)");
     // Binary AND/OR is faster than logical and/or (usually)
-    TREEOPV("AstLogAnd{$lhsp.width1, $rhsp.width1}", "AstAnd{$lhsp,$rhsp}");
-    TREEOPV("AstLogOr {$lhsp.width1, $rhsp.width1}", "AstOr{$lhsp,$rhsp}");
-    TREEOPV("AstLogNot{$lhsp.width1}",		    "AstNot{$lhsp}");
+    TREEOPV("AstLogAnd{$lhsp.width1, $rhsp.width1, isTPure($lhsp), isTPure($rhsp)}", "AstAnd{$lhsp,$rhsp}");
+    TREEOPV("AstLogOr {$lhsp.width1, $rhsp.width1, isTPure($lhsp), isTPure($rhsp)}", "AstOr{$lhsp,$rhsp}");
+    TREEOPV("AstLogNot{$lhsp.width1, isTPure($lhsp)}",	"AstNot{$lhsp}");
     // CONCAT(CONCAT({a},{b}),{c}) -> CONCAT({a},CONCAT({b},{c}))
     // CONCAT({const},CONCAT({const},{c})) -> CONCAT((constifiedCONC{const|const},{c}))
     TREEOPV("AstConcat{operandConcatMove(nodep)}",	"moveConcat(nodep)");
@@ -1921,13 +1954,14 @@ public:
 	PROC_V_EXPENSIVE,
 	PROC_CPP
     };
-    
+
     // CONSTUCTORS
     ConstVisitor(ProcMode pmode) {
 	m_params = false;
 	m_required = false;
 	m_doExpensive = false;
 	m_doNConst = false;
+	m_doShort = true;	// Presently always done
 	m_doV = false;
 	m_warn = false;
 	m_wremove = true;  // Overridden in visitors

src/V3Const.h

@@ -1,4 +1,4 @@
-// -*- C++ -*-
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Propagate constants across AST
 //
@@ -8,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2003-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.

src/V3Coverage.cpp

@@ -1,3 +1,4 @@
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Netlist (top level) functions
 //
@@ -7,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2003-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.
@@ -87,7 +88,7 @@ private:
 	    if (prettyName.find("._") != string::npos)
 	        return "Inlined leading underscore";
 	}
-	if ((nodep->width()*nodep->arrayElements()) > 256) return "Wide bus/array > 256 bits";
+	if ((nodep->width()*nodep->dtypep()->arrayElements()) > 256) return "Wide bus/array > 256 bits";
 	// We allow this, though tracing doesn't
 	// if (nodep->arrayp(1)) return "Unsupported: Multi-dimensional array";
 	return NULL;
@@ -193,7 +194,7 @@ private:
 		     const ToggleEnt& above,
 		     AstVar* varp, AstVar* chgVarp) { // Constant
 	if (AstBasicDType* bdtypep = dtypep->castBasicDType()) {
-	    if (bdtypep->rangep()) {
+	    if (bdtypep->isRanged()) {
 		for (int index_docs=bdtypep->lsb(); index_docs<bdtypep->msb()+1; index_docs++) {
 		    int index_code = index_docs - bdtypep->lsb();
 		    ToggleEnt newent (above.m_comment+string("[")+cvtToStr(index_docs)+"]",
@@ -216,7 +217,7 @@ private:
 		ToggleEnt newent (above.m_comment+string("[")+cvtToStr(index_docs)+"]",
 				  new AstArraySel(varp->fileline(), above.m_varRefp->cloneTree(true), index_code),
 				  new AstArraySel(varp->fileline(), above.m_chgRefp->cloneTree(true), index_code));
-		toggleVarRecurse(adtypep->dtypeSkipRefp(), depth+1,
+		toggleVarRecurse(adtypep->subDTypep()->skipRefp(), depth+1,
 				 newent,
 				 varp, chgVarp);
 		newent.cleanup();

src/V3Coverage.h

@@ -1,4 +1,4 @@
-// -*- C++ -*-
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Coverage modules/signals together
 //
@@ -8,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2003-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.

src/V3CoverageJoin.cpp

@@ -1,3 +1,4 @@
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Netlist (top level) functions
 //
@@ -7,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2003-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.

src/V3CoverageJoin.h

@@ -1,4 +1,4 @@
-// -*- C++ -*-
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Coverage modules/signals together
 //
@@ -8,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2003-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.

src/V3Dead.cpp

@@ -1,3 +1,4 @@
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Dead code elimination
 //
@@ -7,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2003-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.
@@ -70,16 +71,16 @@ class DeadVisitor : public AstNVisitor {
 private:
     // NODE STATE
     // Entire Netlist:
-    //  AstNodeModule::user()	-> int. Count of number of cells referencing this module.
-    //  AstVar::user()		-> int. Count of number of references
-    //  AstVarScope::user()	-> int. Count of number of references
+    //  AstNodeModule::user1()	-> int. Count of number of cells referencing this module.
+    //  AstVar::user1()		-> int. Count of number of references
+    //  AstVarScope::user1()	-> int. Count of number of references
     AstUser1InUse	m_inuser1;
 
     // TYPES
     typedef multimap<AstVarScope*,AstNodeAssign*>	AssignMap;
 
     // STATE
-    vector<AstVar*>		m_varsp;	// List of all encountered to avoid another loop through tree
+    vector<AstNode*>		m_varEtcsp;	// List of all encountered to avoid another loop through tree
     vector<AstVarScope*>	m_vscsp;	// List of all encountered to avoid another loop through tree
     AssignMap			m_assignMap;	// List of all simple assignments for each variable
     bool			m_elimUserVars;	// Allow removal of user's vars
@@ -91,14 +92,18 @@ private:
 	if (VL_UNLIKELY(level < 0)) level = v3Global.opt.debugSrcLevel(__FILE__);
 	return level;
     }
+    void checkAll(AstNode* nodep) {
+    }
 
     // VISITORS
     virtual void visit(AstCell* nodep, AstNUser*) {
 	nodep->iterateChildren(*this);
+	checkAll(nodep);
 	nodep->modp()->user1Inc();
     }
     virtual void visit(AstNodeVarRef* nodep, AstNUser*) {
 	nodep->iterateChildren(*this);
+	checkAll(nodep);
 	if (nodep->varScopep()) {
 	    nodep->varScopep()->user1Inc();
 	    nodep->varScopep()->varp()->user1Inc();
@@ -112,29 +117,38 @@ private:
     }
     virtual void visit(AstNodeFTaskRef* nodep, AstNUser*) {
 	nodep->iterateChildren(*this);
+	checkAll(nodep);
 	if (nodep->packagep()) {
 	    nodep->packagep()->user1Inc();
 	}
     }
     virtual void visit(AstRefDType* nodep, AstNUser*) {
 	nodep->iterateChildren(*this);
+	checkAll(nodep);
 	if (nodep->packagep()) {
 	    nodep->packagep()->user1Inc();
 	}
     }
     virtual void visit(AstEnumItemRef* nodep, AstNUser*) {
 	nodep->iterateChildren(*this);
+	checkAll(nodep);
 	if (nodep->packagep()) {
 	    nodep->packagep()->user1Inc();
 	}
     }
     virtual void visit(AstVarScope* nodep, AstNUser*) {
 	nodep->iterateChildren(*this);
-	m_vscsp.push_back(nodep);
+	checkAll(nodep);
+	if (mightElim(nodep->varp())) {
+	    m_vscsp.push_back(nodep);
+	}
     }
     virtual void visit(AstVar* nodep, AstNUser*) {
 	nodep->iterateChildren(*this);
-	m_varsp.push_back(nodep);
+	checkAll(nodep);
+	if (mightElim(nodep)) {
+	    m_varEtcsp.push_back(nodep);
+	}
     }
 
     virtual void visit(AstNodeAssign* nodep, AstNUser*) {
@@ -150,12 +164,14 @@ private:
 	} else {  // Track like any other statement
 	    nodep->lhsp()->iterateAndNext(*this);
 	}
+	checkAll(nodep);
     }
 
     //-----
     virtual void visit(AstNode* nodep, AstNUser*) {
 	if (nodep->isOutputter()) m_sideEffect=true;
 	nodep->iterateChildren(*this);
+	checkAll(nodep);
     }
 
     // METHODS
@@ -180,7 +196,7 @@ private:
 	    }
 	}
     }
-    bool canElim(AstVar* nodep) {
+    bool mightElim(AstVar* nodep) {
 	return (!nodep->isSigPublic()	// Can't elim publics!
 		&& !nodep->isIO()
 		&& (nodep->isTemp() || nodep->isParam() || m_elimUserVars));
@@ -189,7 +205,7 @@ private:
 	// Delete any unused varscopes
 	for (vector<AstVarScope*>::iterator it = m_vscsp.begin(); it!=m_vscsp.end(); ++it) {
 	    AstVarScope* vscp = *it;
-	    if (vscp->user1() == 0 && canElim(vscp->varp())) {
+	    if (vscp->user1() == 0) {
 		UINFO(4,"  Dead "<<vscp<<endl);
 		pair <AssignMap::iterator,AssignMap::iterator> eqrange = m_assignMap.equal_range(vscp);
 		for (AssignMap::iterator it = eqrange.first; it != eqrange.second; ++it) {
@@ -200,8 +216,8 @@ private:
 		vscp->unlinkFrBack()->deleteTree(); vscp=NULL;
 	    }
 	}
-	for (vector<AstVar*>::iterator it = m_varsp.begin(); it!=m_varsp.end(); ++it) {
-	    if ((*it)->user1() == 0 && canElim((*it))) {
+	for (vector<AstNode*>::iterator it = m_varEtcsp.begin(); it!=m_varEtcsp.end(); ++it) {
+	    if ((*it)->user1() == 0) {
 		UINFO(4,"  Dead "<<(*it)<<endl);
 		(*it)->unlinkFrBack()->deleteTree(); (*it)=NULL;
 	    }

src/V3Dead.h

@@ -1,4 +1,4 @@
-// -*- C++ -*-
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Dead branch elimination
 //
@@ -8,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2003-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.

src/V3Delayed.cpp

@@ -1,3 +1,4 @@
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Add temporaries, such as for delayed nodes
 //
@@ -7,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2003-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.
@@ -74,14 +75,15 @@ private:
     // NODE STATE
     // Cleared each module:
     //  AstVarScope::user1p()	-> AstVarScope*.  Points to temp var created.
-    //  AstVarScope::user2p()	-> AstActive*.  Points to activity block of signal
+    //  AstVarScope::user2p()	-> AstActive*.  Points to activity block of signal (valid when AstVarScope::user1p is valid)
     //  AstVarScope::user4p()	-> AstAlwaysPost*.  Post block for this variable
     //  AstVarScope::user5()	-> VarUsage. Tracks delayed vs non-delayed usage
     //  AstVar::user2()		-> bool.  Set true if already made warning
     //  AstVar::user4()		-> int.   Vector number, for assignment creation
     //  AstVarRef::user2()	-> bool.  Set true if already processed
+    //  AstAlwaysPost::user2()	-> ActActive*.  Points to activity block of signal (valid when AstAlwaysPost::user4p is valid)
     //  AstAlwaysPost::user4()	-> AstIf*.  Last IF (__Vdlyvset__) created under this AlwaysPost
-    // Cleared each scope:
+    // Cleared each scope/active:
     //  AstAssignDly::user3()	-> AstVarScope*.  __Vdlyvset__ created for this assign
     //  AstAlwaysPost::user3()	-> AstVarScope*.  __Vdlyvset__ last referenced in IF
     AstUser1InUse	m_inuser1;
@@ -132,8 +134,8 @@ private:
 	    if (width==0) {
 		varp = new AstVar (oldvarscp->fileline(), AstVarType::BLOCKTEMP, name, oldvarscp->varp());
 		varp->widthSignedFrom(oldvarscp);
-	    } else {
-		varp = new AstVar (oldvarscp->fileline(), AstVarType::BLOCKTEMP, name, AstLogicPacked(), width);
+	    } else { // Used for vset and dimensions, so can zero init
+		varp = new AstVar (oldvarscp->fileline(), AstVarType::BLOCKTEMP, name, VFlagBitPacked(), width);
 	    }
 	    addmodp->addStmtp(varp);
 	    m_modVarMap.insert(make_pair(make_pair(addmodp, name), varp));
@@ -144,6 +146,40 @@ private:
 	return varscp;
     }
 
+    AstActive* createActivePost(AstVarRef* varrefp) {
+	AstActive* newactp = new AstActive (varrefp->fileline(), "sequentdly",
+					    m_activep->sensesp());
+	m_activep->addNext(newactp);
+	return newactp;
+    }
+    void checkActivePost(AstVarRef* varrefp, AstActive* oldactivep) {
+	// Check for MULTIDRIVEN, and if so make new sentree that joins old & new sentree
+	if (!oldactivep) varrefp->v3fatalSrc("<= old dly assignment not put under sensitivity block");
+	if (oldactivep->sensesp() != m_activep->sensesp()) {
+	    if (!varrefp->varp()->fileline()->warnIsOff(V3ErrorCode::MULTIDRIVEN)
+		&& !varrefp->varp()->user2()) {
+		varrefp->varp()->v3warn(MULTIDRIVEN,"Signal has multiple driving blocks: "<<varrefp->varp()->prettyName());
+		varrefp->v3warn(MULTIDRIVEN,"... Location of first driving block");
+		oldactivep->v3warn(MULTIDRIVEN,"... Location of other driving block");
+		varrefp->varp()->user2(true);
+	    }
+	    UINFO(4,"AssignDupDlyVar: "<<varrefp<<endl);
+	    UINFO(4,"  Act: "<<m_activep<<endl);
+	    UINFO(4,"  Act: "<<oldactivep<<endl);
+	    // Make a new sensitivity list, which is the combination of both blocks
+	    AstNodeSenItem* sena = m_activep->sensesp()->sensesp()->cloneTree(true);
+	    AstNodeSenItem* senb = oldactivep->sensesp()->sensesp()->cloneTree(true);
+	    AstSenTree* treep = new AstSenTree(m_activep->fileline(), sena);
+	    if (senb) treep->addSensesp(senb);
+	    if (AstSenTree* storep = oldactivep->sensesStorep()) {
+		storep->unlinkFrBack();
+		pushDeletep(storep);
+	    }
+	    oldactivep->sensesStorep(treep);
+	    oldactivep->sensesp(treep);
+	}
+    }
+
     AstNode* createDlyArray(AstAssignDly* nodep, AstNode* lhsp) {
 	// Create delayed assignment
 	// See top of this file for transformation
@@ -225,6 +261,7 @@ private:
 	//
 	//=== Setting/not setting boolean: __Vdlyvset__
 	AstVarScope* setvscp;
+	AstAssignPre* setinitp = NULL;
 
 	if (nodep->user3p()) {
 	    // Simplistic optimization.  If the previous statement in same scope was also a =>,
@@ -236,11 +273,9 @@ private:
 	} else {  // Create new one
 	    string setvarname = (string("__Vdlyvset__")+oldvarp->shortName()+"__v"+cvtToStr(modVecNum));
 	    setvscp = createVarSc(varrefp->varScopep(), setvarname, 1);
-	    AstAssignPre* setinitp
-		= new AstAssignPre (nodep->fileline(),
-				    new AstVarRef(nodep->fileline(), setvscp, true),
-				    new AstConst(nodep->fileline(), 0));
-	    m_activep->addStmtsp(setinitp);
+	    setinitp = new AstAssignPre (nodep->fileline(),
+					 new AstVarRef(nodep->fileline(), setvscp, true),
+					 new AstConst(nodep->fileline(), 0));
 	    AstAssign* setassignp
 		= new AstAssign (nodep->fileline(),
 				 new AstVarRef(nodep->fileline(), setvscp, true),
@@ -269,11 +304,18 @@ private:
 	UINFO(9,"   For "<<setvscp<<endl);
 	UINFO(9,"     & "<<varrefp<<endl);
 	AstAlwaysPost* finalp = varrefp->varScopep()->user4p()->castNode()->castAlwaysPost();
-	if (!finalp) {
+	if (finalp) {
+	    AstActive* oldactivep = finalp->user2p()->castNode()->castActive();
+	    checkActivePost(varrefp, oldactivep);
+	    if (setinitp) oldactivep->addStmtsp(setinitp);
+	} else { // first time we've dealt with this memory
 	    finalp = new AstAlwaysPost(nodep->fileline(), NULL/*sens*/, NULL/*body*/);
 	    UINFO(9,"     Created "<<finalp<<endl);
-	    m_activep->addStmtsp(finalp);
+	    AstActive* newactp = createActivePost(varrefp);
+	    newactp->addStmtsp(finalp);
 	    varrefp->varScopep()->user4p(finalp);
+	    finalp->user2p(newactp);
+	    if (setinitp) newactp->addStmtsp(setinitp);
 	}
 	AstIf* postLogicp;
 	if (finalp->user3p()->castNode() == setvscp) {
@@ -292,7 +334,6 @@ private:
 	    finalp->user4p(postLogicp);	// and the associated IF, as we may be able to reuse it
 	}
 	postLogicp->addIfsp(new AstAssign(nodep->fileline(), selectsp, valreadp));
-
 	return newlhsp;
     }
 
@@ -316,6 +357,7 @@ private:
 	m_activep = nodep;
 	bool oldinit = m_inInitial;
 	m_inInitial = nodep->hasInitial();
+	AstNode::user3ClearTree();  // Two sets to same variable in different actives must use different vars.
 	nodep->iterateChildren(*this);
 	m_inInitial = oldinit;
     }
@@ -342,6 +384,7 @@ private:
 	m_inDly = false;
 	m_nextDlyp = NULL;
     }
+
     virtual void visit(AstVarRef* nodep, AstNUser*) {
 	if (!nodep->user2Inc()) {  // Not done yet
 	    if (m_inDly && nodep->lvalue()) {
@@ -354,30 +397,7 @@ private:
 		AstVarScope* dlyvscp = oldvscp->user1p()->castNode()->castVarScope();
 		if (dlyvscp) {  // Multiple use of delayed variable
 		    AstActive* oldactivep = dlyvscp->user2p()->castNode()->castActive();
-		    if (!oldactivep) nodep->v3fatalSrc("<= old dly assignment not put under sensitivity block");
-		    if (oldactivep->sensesp() != m_activep->sensesp()) {
-			if (!nodep->varp()->fileline()->warnIsOff(V3ErrorCode::MULTIDRIVEN)
-			    && !nodep->varp()->user2()) {
-			    nodep->varp()->v3warn(MULTIDRIVEN,"Signal has multiple driving blocks: "<<nodep->varp()->prettyName());
-			    nodep->v3warn(MULTIDRIVEN,"... Location of first driving block");
-			    oldactivep->v3warn(MULTIDRIVEN,"... Location of other driving block");
-			    nodep->varp()->user2(true);
-			}
-			UINFO(4,"AssignDupDlyVar: "<<nodep<<endl);
-			UINFO(4,"  Act: "<<m_activep<<endl);
-			UINFO(4,"  Act: "<<oldactivep<<endl);
-			// Make a new sensitivity list, which is the combination of both blocks
-			AstNodeSenItem* sena = m_activep->sensesp()->sensesp()->cloneTree(true);
-			AstNodeSenItem* senb = oldactivep->sensesp()->sensesp()->cloneTree(true);
-			AstSenTree* treep = new AstSenTree(m_activep->fileline(), sena);
-			if (senb) treep->addSensesp(senb);
-			if (AstSenTree* storep = oldactivep->sensesStorep()) {
-			    storep->unlinkFrBack();
-			    pushDeletep(storep);
-			}
-			oldactivep->sensesStorep(treep);
-			oldactivep->sensesp(treep);
-		    }
+		    checkActivePost(nodep, oldactivep);
 		}
 		if (!dlyvscp) {  // First use of this delayed variable
 		    string newvarname = (string("__Vdly__")+nodep->varp()->shortName());
@@ -393,12 +413,10 @@ private:
 		    postp->lhsp()->user2(true);	// Don't detect this assignment
 		    oldvscp->user1p(dlyvscp);  // So we can find it later
 		    // Make new ACTIVE with identical sensitivity tree
-		    AstActive* newactp = new AstActive (nodep->fileline(), "sequentdly",
-							m_activep->sensesp());
+		    AstActive* newactp = createActivePost(nodep);
+		    dlyvscp->user2p(newactp);
 		    newactp->addStmtsp(prep);	// Add to FRONT of statements
 		    newactp->addStmtsp(postp);
-		    m_activep->addNext(newactp);
-		    dlyvscp->user2p(newactp);
 		}
 		AstVarRef* newrefp = new AstVarRef(nodep->fileline(), dlyvscp, true);
 		newrefp->user2(true);  // No reason to do it again

src/V3Delayed.h

@@ -1,4 +1,4 @@
-// -*- C++ -*-
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Pre C-Emit stage changes
 //
@@ -8,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2003-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.

src/V3Depth.cpp

@@ -1,3 +1,4 @@
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Prevent very deep expressions
 //
@@ -7,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2003-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.
@@ -68,7 +69,8 @@ private:
 				   // Width, not widthMin, as we may be in middle of BITSEL expression which
 				   // though it's one bit wide, needs the mask in the upper bits.
 				   // (Someday we'll have a valid bitmask instead of widths....)
-				   AstLogicPacked(), nodep->width());
+				   // See t_func_crc for an example test that requires this
+				   VFlagLogicPacked(), nodep->width());
 	if (!m_funcp) nodep->v3fatalSrc("Deep expression not under a function");
 	m_funcp->addInitsp(varp);
 	// Replace node tree with reference to var

src/V3Depth.h

@@ -1,4 +1,4 @@
-// -*- C++ -*-
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Prevent very deep expressions
 //
@@ -8,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2003-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.

src/V3DepthBlock.cpp

@@ -1,3 +1,4 @@
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Prevent very deep expressions
 //
@@ -7,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2003-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.

src/V3DepthBlock.h

@@ -1,4 +1,4 @@
-// -*- C++ -*-
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Prevent very deep expressions
 //
@@ -8,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2003-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.

src/V3Descope.cpp

@@ -1,3 +1,4 @@
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Rename scope references to module-local references
 //
@@ -7,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2003-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.

src/V3Descope.h

@@ -1,4 +1,4 @@
-// -*- C++ -*-
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Rename scope references to module-local references
 //
@@ -8,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2003-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.

src/V3EmitC.cpp

@@ -1,3 +1,4 @@
+// -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
 // DESCRIPTION: Verilator: Emit C++ for tree
 //
@@ -7,7 +8,7 @@
 //
 //*************************************************************************
 //
-// Copyright 2003-2011 by Wilson Snyder.  This program is free software; you can
+// Copyright 2003-2012 by Wilson Snyder.  This program is free software; you can
 // redistribute it and/or modify it under the terms of either the GNU
 // Lesser General Public License Version 3 or the Perl Artistic License
 // Version 2.0.
@@ -33,7 +34,7 @@
 #include "V3EmitC.h"
 #include "V3EmitCBase.h"
 
-#define VL_VALUE_STRING_MAX_WIDTH 1024	// We use a static char array in VL_VALUE_STRING
+#define VL_VALUE_STRING_MAX_WIDTH 8192	// We use a static char array in VL_VALUE_STRING
 
 //######################################################################
 // Emit statements and math operators
@@ -322,7 +323,7 @@ public:
 	    AstVarRef* varrefp = nodep->memp()->castVarRef();
 	    if (!varrefp) { nodep->v3error("Readmem loading non-variable"); }
 	    else if (AstArrayDType* adtypep = varrefp->varp()->dtypeSkipRefp()->castArrayDType()) {
-		puts(cvtToStr(varrefp->varp()->arrayElements()));
+		puts(cvtToStr(varrefp->varp()->dtypep()->arrayElements()));
 		array_lsb = adtypep->lsb();
 	    }
 	    else {
@@ -552,7 +553,7 @@ public:
 	    nodep->v3error("Unsupported: 4-state numbers in this context");
 	} else if (nodep->isWide()) {
 	    putbs("VL_CONST_W_");
-	    puts(cvtToStr(VL_WORDS_I(nodep->num().minWidth())));
+	    puts(cvtToStr(VL_WORDS_I(nodep->num().widthMin())));
 	    puts("X(");
 	    puts(cvtToStr(nodep->widthMin()));
 	    puts(",");
@@ -564,7 +565,7 @@ public:
 	    } else {
 		assigntop->iterateAndNext(*this);
 	    }
-	    for (int word=VL_WORDS_I(nodep->num().minWidth())-1; word>0; word--) {
+	    for (int word=VL_WORDS_I(nodep->num().widthMin())-1; word>0; word--) {
 		// Only 32 bits - llx + long long here just to appease CPP format warning
 		ofp()->printf(",0x%08" VL_PRI64 "x", (vluint64_t)(nodep->num().dataWord(word)));
 	    }
@@ -661,10 +662,10 @@ class EmitCImp : EmitCStmts {
 	    changep->lhsp()->iterateAndNext(*this);
 	}
 	else {
-	    AstVarRef* lhsp = changep->lhsp()->castVarRef();
-	    AstVarRef* rhsp = changep->rhsp()->castVarRef();
-	    if (!lhsp) changep->v3fatalSrc("Not ref?");
-	    if (!rhsp) changep->v3fatalSrc("Not ref?");
+	    AstNode* lhsp = changep->lhsp();
+	    AstNode* rhsp = changep->rhsp();
+	    if (!lhsp->castVarRef() && !lhsp->castArraySel()) changep->v3fatalSrc("Not ref?");
+	    if (!rhsp->castVarRef() && !rhsp->castArraySel()) changep->v3fatalSrc("Not ref?");
 	    for (int word=0; word<changep->lhsp()->widthWords(); word++) {
 		if (!gotOne) {
 		    gotOne = true;
@@ -677,10 +678,10 @@ class EmitCImp : EmitCStmts {
 		    puts(" | (");
 		}
 		changep->lhsp()->iterateAndNext(*this);
-		if (changep->isWide()) puts("["+cvtToStr(word)+"]");
+		if (changep->lhsp()->isWide()) puts("["+cvtToStr(word)+"]");
 		puts(" ^ ");
 		changep->rhsp()->iterateAndNext(*this);
-		if (changep->isWide()) puts("["+cvtToStr(word)+"]");
+		if (changep->lhsp()->isWide()) puts("["+cvtToStr(word)+"]");
 		puts(")");
 	    }
 	}
@@ -872,9 +873,6 @@ void EmitCStmts::emitVarDecl(AstVar* nodep, const string& prefixIfImp) {
     if (nodep->isIO()) {
 	bool isArray = !nodep->dtypeSkipRefp()->castBasicDType();
 	if (nodep->isSc()) {
-	    if (isArray) {
-		nodep->v3error("Unsupported: SystemC inputs and outputs must be simple data types; no arrays");
-	    }
 	    m_ctorVarsVec.push_back(nodep);
 	    ofp()->putAlign(nodep->isStatic(), 4);	// sc stuff is a structure, so bigger alignment
 	    if (nodep->attrScClocked() && nodep->isInput()) {
@@ -889,6 +887,12 @@ void EmitCStmts::emitVarDecl(AstVar* nodep, const string& prefixIfImp) {
 		puts(">\t");
 	    }
 	    puts(nodep->name());
+	    if (isArray) {
+		for (AstArrayDType* arrayp=nodep->dtypeSkipRefp()->castArrayDType(); arrayp;
+		     arrayp = arrayp->subDTypep()->skipRefp()->castArrayDType()) {
+		    puts("["+cvtToStr(arrayp->elementsConst())+"]");
+		}
+	    }
 	    puts(";\n");
 	} else { // C++ signals
 	    ofp()->putAlign(nodep->isStatic(), nodep->dtypeSkipRefp()->widthAlignBytes(),
@@ -905,7 +909,8 @@ void EmitCStmts::emitVarDecl(AstVar* nodep, const string& prefixIfImp) {
 	    if (isArray) {
 		if (nodep->isWide()) puts("W");
 		puts("("+nodep->name());
-		for (AstArrayDType* arrayp=nodep->dtypeSkipRefp()->castArrayDType(); arrayp; arrayp = arrayp->dtypeSkipRefp()->castArrayDType()) {
+		for (AstArrayDType* arrayp=nodep->dtypeSkipRefp()->castArrayDType(); arrayp;
+		     arrayp = arrayp->subDTypep()->skipRefp()->castArrayDType()) {
 		    puts("["+cvtToStr(arrayp->elementsConst())+"]");
 		}
 		puts(","+cvtToStr(basicp->msb())+","+cvtToStr(basicp->lsb()));
@@ -926,7 +931,8 @@ void EmitCStmts::emitVarDecl(AstVar* nodep, const string& prefixIfImp) {
 	// strings and other fundamental c types
 	puts(nodep->vlArgType(true,false));
 	// This isn't very robust and may need cleanup for other data types
-	for (AstArrayDType* arrayp=nodep->dtypeSkipRefp()->castArrayDType(); arrayp; arrayp = arrayp->dtypeSkipRefp()->castArrayDType()) {
+	for (AstArrayDType* arrayp=nodep->dtypeSkipRefp()->castArrayDType(); arrayp;
+	     arrayp = arrayp->subDTypep()->skipRefp()->castArrayDType()) {
 	    puts("["+cvtToStr(arrayp->elementsConst())+"]");
 	}
 	puts(";\n");
@@ -951,7 +957,8 @@ void EmitCStmts::emitVarDecl(AstVar* nodep, const string& prefixIfImp) {
 	if (prefixIfImp!="") { puts(prefixIfImp); puts("::"); }
 	puts(nodep->name());
 	// This isn't very robust and may need cleanup for other data types
-	for (AstArrayDType* arrayp=nodep->dtypeSkipRefp()->castArrayDType(); arrayp; arrayp = arrayp->dtypeSkipRefp()->castArrayDType()) {
+	for (AstArrayDType* arrayp=nodep->dtypeSkipRefp()->castArrayDType(); arrayp;
+	     arrayp = arrayp->subDTypep()->skipRefp()->castArrayDType()) {
 	    puts("["+cvtToStr(arrayp->elementsConst())+"]");
 	}
 	puts(","+cvtToStr(basicp->msb())+","+cvtToStr(basicp->lsb()));
@@ -961,22 +968,29 @@ void EmitCStmts::emitVarDecl(AstVar* nodep, const string& prefixIfImp) {
 }
 
 void EmitCStmts::emitVarCtors() {
-    ofp()->indentInc();
-    bool first = true;
-    for (vector<AstVar*>::iterator it = m_ctorVarsVec.begin(); it != m_ctorVarsVec.end(); ++it) {
-	if (first) {
-	    first=false;
-	    puts("\n");
-	    puts("#if (SYSTEMC_VERSION>20011000)\n");  // SystemC 2.0.1 and newer
-	    puts("  : ");
+    if (!m_ctorVarsVec.empty()) {
+	ofp()->indentInc();
+	puts("\n");
+	puts("#if (SYSTEMC_VERSION>20011000)\n");  // SystemC 2.0.1 and newer
+	bool first = true;
+	for (vector<AstVar*>::iterator it = m_ctorVarsVec.begin(); it != m_ctorVarsVec.end(); ++it) {
+	    AstVar* varp = *it;
+	    bool isArray = !varp->dtypeSkipRefp()->castBasicDType();
+	    if (isArray) {
+		puts("// Skipping array: ");
+		puts(varp->name());
+		puts("\n");
+	    } else {
+		if (first) { puts("  : "); first=false; }
+		else puts(", ");
+		if (ofp()->exceededWidth()) puts("\n  ");
+		puts(varp->name());
+		puts("("); putsQuoted(varp->name()); puts(")");
+	    }
 	}
-	else puts(", ");
-	if (ofp()->exceededWidth()) puts("\n  ");
-	puts((*it)->name());
-	puts("("); putsQuoted((*it)->name()); puts(")");
+	puts ("\n#endif\n");
+	ofp()->indentDec();
     }
-    if (!first) puts ("\n#endif\n");
-    ofp()->indentDec();
 }
 
 bool EmitCStmts::emitSimpleOk(AstNodeMath* nodep) {
@@ -1049,7 +1063,7 @@ void EmitCStmts::emitOpName(AstNode* nodep, const string& format,
 		++pos;
 		switch (pos[0]) {
 		case 'q': emitIQW(detailp); break;
-		case 'w': 
+		case 'w':
 		    COMMA;
 		    puts(cvtToStr(detailp->widthMin()));
 		    needComma = true;
@@ -1182,7 +1196,7 @@ void EmitCStmts::displayArg(AstNode* dispp, AstNode** elistp, bool isScan,
 	return;
     }
     if (argp->widthMin() > VL_VALUE_STRING_MAX_WIDTH) {
-	dispp->v3error("Exceeded limit of 1024 bits for any display arguments");
+	dispp->v3error("Exceeded limit of "+cvtToStr(VL_VALUE_STRING_MAX_WIDTH)+" bits for any display arguments");
     }
     if (argp && argp->isWide()
 	&& (fmtLetter=='d'||fmtLetter=='u')) {
@@ -1327,7 +1341,7 @@ void EmitCImp::emitVarResets(AstNodeModule* modp) {
 		int vects = 0;
 		// This isn't very robust and may need cleanup for other data types
 		for (AstArrayDType* arrayp=varp->dtypeSkipRefp()->castArrayDType(); arrayp;
-		     arrayp = arrayp->dtypeSkipRefp()->castArrayDType()) {
+		     arrayp = arrayp->subDTypep()->skipRefp()->castArrayDType()) {
 		    int vecnum = vects++;
 		    if (arrayp->msb() < arrayp->lsb()) varp->v3fatalSrc("Should have swapped msb & lsb earlier.");
 		    string ivar = string("__Vi")+cvtToStr(vecnum);
@@ -1353,7 +1367,7 @@ void EmitCImp::emitVarResets(AstNodeModule* modp) {
 		    puts(varp->name());
 		    for (int v=0; v<vects; ++v) puts( "[__Vi"+cvtToStr(v)+"]");
 		    if (zeroit) {
-			puts("= 0;\n");
+			puts(" = 0;\n");
 		    } else {
 			puts(" = VL_RAND_RESET_");
 			emitIQW(varp);
@@ -1500,7 +1514,22 @@ void EmitCImp::emitSensitives() {
 	for (AstNode* nodep=m_modp->stmtsp(); nodep; nodep = nodep->nextp()) {
 	    if (AstVar* varp = nodep->castVar()) {
 		if (varp->isInput() && (varp->isScSensitive() || varp->isUsedClock())) {
-		    puts("sensitive << "+varp->name()+";\n");
+		    int vects = 0;
+		    // This isn't very robust and may need cleanup for other data types
+		    for (AstArrayDType* arrayp=varp->dtypeSkipRefp()->castArrayDType(); arrayp;
+			 arrayp = arrayp->subDTypep()->skipRefp()->castArrayDType()) {
+			int vecnum = vects++;
+			if (arrayp->msb() < arrayp->lsb()) varp->v3fatalSrc("Should have swapped msb & lsb earlier.");
+			string ivar = string("__Vi")+cvtToStr(vecnum);
+			// MSVC++ pre V7 doesn't support 'for (int ...)', so declare in sep block
+			puts("{ int __Vi"+cvtToStr(vecnum)+"="+cvtToStr(arrayp->lsb())+";");
+			puts(" for (; "+ivar+"<="+cvtToStr(arrayp->msb()));
+			puts("; ++"+ivar+") {\n");
+		    }
+		    puts("sensitive << "+varp->name());
+		    for (int v=0; v<vects; ++v) puts( "[__Vi"+cvtToStr(v)+"]");
+		    puts(";\n");
+		    for (int v=0; v<vects; ++v) puts( "}}\n");
 		}
 	    }
 	}
@@ -2048,7 +2077,7 @@ class EmitCTrace : EmitCStmts {
 	    puts("vcdp->declArray");
 	} else if (nodep->isQuad()) {
 	    puts("vcdp->declQuad ");
-	} else if (nodep->msbEndianed() || nodep->lsbEndianed()) {
+	} else if (nodep->left() || nodep->right()) {
 	    puts("vcdp->declBus  ");
 	} else {
 	    puts("vcdp->declBit  ");
@@ -2062,8 +2091,9 @@ class EmitCTrace : EmitCStmts {
 	} else {
 	    puts(",-1");
 	}
-	if (nodep->msbEndianed() || nodep->lsbEndianed()) {
-	    puts(","+cvtToStr(nodep->msbEndianed())+","+cvtToStr(nodep->lsbEndianed()));
+	if (!nodep->isDouble()  // When float/double no longer have widths this can go
+	    && (nodep->left() || nodep->right())) {
+	    puts(","+cvtToStr(nodep->left())+","+cvtToStr(nodep->right()));
 	}
 	puts(");");
     }
@@ -2079,7 +2109,7 @@ class EmitCTrace : EmitCStmts {
 	    puts("vcdp->"+full+"Array");
 	} else if (nodep->isQuad()) {
 	    puts("vcdp->"+full+"Quad ");
-	} else if (nodep->declp()->msbEndianed() || nodep->declp()->lsbEndianed()) {
+	} else if (nodep->declp()->left() || nodep->declp()->right()) {
 	    puts("vcdp->"+full+"Bus  ");
 	} else {
 	    puts("vcdp->"+full+"Bit  ");
@@ -2088,7 +2118,8 @@ class EmitCTrace : EmitCStmts {
 			    + ((arrayindex<0) ? 0 : (arrayindex*nodep->declp()->widthWords()))));
 	puts(",");
 	emitTraceValue(nodep, arrayindex);
-	if (nodep->declp()->msbEndianed() || nodep->declp()->lsbEndianed() || emitTraceIsScBv(nodep)) {
+	if (!nodep->isDouble()  // When float/double no longer have widths this can go
+	    && (nodep->declp()->left() || nodep->declp()->right() || emitTraceIsScBv(nodep))) {
 	    puts(","+cvtToStr(nodep->declp()->widthMin()));
 	}
 	puts(");\n");