Commit Graph

9903 Commits

Author SHA1 Message Date
Dragon-Git 58bd13b623
Fix heap-use-after-free in `VlRNG::VlRNG()` (#7865) 2026-07-03 06:38:48 -04:00
Pawel Kojma b97df914dd
Fix clang++ ambiguous overload of '==' operator (#7863) 2026-07-03 06:37:48 -04:00
Geza Lore 0e371d6e5c Fix cleaning purity cache after assertions 2026-07-02 17:47:09 +01:00
Geza Lore 1106e89c84 Optimize random initialization
Fetching a thread-local is relatively expensive. Random initializing
wides used to do it once or twice per word, and on short runs for
large designs can be noticeably expensive, so fetch once per variable
instead. Also remove unused VL_RAND_RESET_{Q,W} functions.
2026-07-02 16:38:14 +01:00
Jakub Michalski 506f703da5
Internals: Remove unused variables in verilated_funcs.h (#7862)
Signed-off-by: Jakub Michalski <jmichalski@antmicro.com>
2026-07-02 07:16:42 -04:00
Jakub Michalski 853ee5df17
Fix DFG misoptimizing bound checks (#7755)
Signed-off-by: Jakub Michalski <jmichalski@antmicro.com>
2026-07-02 11:33:38 +01:00
Wilson Snyder 964474837f Commentary 2026-07-01 19:37:12 -04:00
Wilson Snyder ce4be92a67 devel release 2026-07-01 18:31:23 -04:00
Wilson Snyder 848d926ebd Version bump 2026-07-01 18:27:54 -04:00
Wilson Snyder bb9cad507f Commentary: Changes update 2026-07-01 18:27:54 -04:00
github action 9c655d379a Apply 'make format' [ci skip] 2026-07-01 19:59:37 +00:00
Sergey Chusov 1ea10ba71c
Fix class scope '::' reference through an inherited type parameter (#7844) 2026-07-01 15:58:35 -04:00
Wilson Snyder 6b3e2ce971 Commentary: Changes update 2026-06-29 22:00:10 -04:00
dependabot[bot] e80329a57b
CI: Bump actions/cache from 5.0.5 to 6.1.0 in the everything group (#7854) 2026-06-29 11:03:22 -04:00
github action 514fa120f5 Apply 'make format' [ci skip] 2026-06-29 14:58:00 +00:00
Joshua Leahy cf7e3f791a
Fix covergroups without --coverage (#7848) (#7849)
Fixes #7848.
2026-06-29 10:56:59 -04:00
Wilson Snyder 276f2f344d Commentary: Changes update 2026-06-28 16:15:54 -04:00
Wilson Snyder 6006f91e2e Tests: Add t_queue_array (#6921 test) 2026-06-28 16:07:37 -04:00
Wilson Snyder c4f63583bc Tests: Fix t_cover_expr_fork data location 2026-06-28 15:40:10 -04:00
Wilson Snyder 657d5f6abf Tests: Add t_initial_dlyass2 (#5210).
Fixes #5210. (Confirms fixed in master earlier).
2026-06-28 15:34:50 -04:00
Wilson Snyder 9448e4366c Fix MSVC warning. No functional change. 2026-06-28 09:47:53 -04:00
Nick Brereton 59b85f670b
Fix constant pool recache after dead scope removal (#7845) 2026-06-28 09:30:48 -04:00
Matthew Ballance d023b3b075
Support dynamic loading of VPI extensions (#7727) 2026-06-28 09:28:09 -04:00
Yilou Wang 3853301367
Fix disable iff ignored when its condition is held continuously true (#7841) 2026-06-26 06:00:44 -04:00
Geza Lore 2d157b29b0 Optimize assetOn checks furter 2026-06-25 20:12:49 +01:00
Yilou Wang f0f1c44dd6
Fix object randomization skipped by an unrelated global constraint (#7833) (#7838)
Fixes #7833.
2026-06-25 09:30:05 -04:00
Geza Lore b73a897db3
Optimize module inlining heuristic (#7837)
Rewrite module inlining decision to be based on a bipartite Module/Cell
graph, similar to V3InlineCFuncs. Preserved all old heuristics, but
added 2 new ones:

- If a module, and all the sub-hierarchy below it, is less than 10% the
  total flattened size of the design, then flatten the contents of that
  module (but the module itself is not necessarily inlined).

- If the flattened size of all instances of a module is less than 20% of
  the total flattened size of the design, then inline all instances of
  that module.

These are both relative to the total size of the design, so they
auto-scale with complexity. The net effect is that large shared
instances are preserved, but their contents are flattened out. E.g. in a
multi-core CPU this would keep the cores non-inlined but flatten out
most everything else. This still enables V3Combining and sharing those
later, but avoids potentially big overheads e.g. with small widely used
library modules.

Empirically this yields less generated C++ than the previous version
(due to removing lots of small functions), and can improve performance
10-20% while still having meaningful combining relative to the size of
the design.
2026-06-25 14:14:15 +01:00
Yilou Wang 000afcf52d
Support variable-length intersect in SVA sequences (#7835) 2026-06-25 04:41:53 -07:00
github action 0ebae43713 Apply 'make format' [ci skip] 2026-06-25 02:44:28 +00:00
Wolfgang Mayerwieser 249608a42f
Fix performance on large package-scoped structs (#7830) 2026-06-24 19:43:24 -07:00
Ryszard Rozak def1e2ccbc
Fix lifetime of expression coverage variable (#7834)
Signed-off-by: Ryszard Rozak <rrozak@antmicro.com>
2026-06-24 09:59:32 -04:00
Yilou Wang 9462c2a910
Fix unclocked concurrent assertion misreported as unsupported (#7831) 2026-06-24 09:44:47 -04:00
Matthew Ballance d456384d39
Support hierarchical reference cross members (#7749) (#7820) 2026-06-24 07:47:36 -04:00
Ryszard Rozak 995534d3ed
Fix insertion of expression coverage statement (#7832)
Signed-off-by: Ryszard Rozak <rrozak@antmicro.com>
2026-06-24 07:44:49 -04:00
Artur Bieniek 350158c857
Fix scheduling of virtual interface method writes (#7641)
Fix scheduling of writes in virtual interfaces, there were missing triggers (see added test).

Make V3SchedVirtIface handle writes done inside methods called through a virtual interface. The pass first records direct vif.member writes, VIF method calls, and candidate interface member VarScopes. It then walks the methods reachable from those VIF calls, writes to persistent interface variables in those method bodies are treated as VIF writes, and nested calls are followed with the same interface context. Function locals, temps, and events are ignored because they are not persistent interface storage observable through a later VIF read. Triggers are still created only from the intersection of (interface type, member name) writes and matching VarScopes, so unrelated interface variables and interfaces with no virtual access do not get extra triggers.
2026-06-24 10:51:42 +01:00
github action 84cc08b756 Apply 'make format' [ci skip] 2026-06-24 09:44:11 +00:00
Thomas Santerre bd6b9161dc
Optimize bit-scan loops into $mostsetbitp1 / $countones (#7822)
Recognize the common single-bit scan loop idioms in V3Unroll (before it
unrolls) and lower them to bit-reduction primitives, replacing a literal
W-iteration loop with one intrinsic-backed expression:

  target=0; for (i=0;i<W;i++) if (vec[i]) target = i + 1;      -> $mostsetbitp1(vec)
  target=0; for (i=0;i<W;i++) if (vec[i]) target = target + 1; -> $countones(vec)

The leading-one form lowers to a new AstMostSetBitP1 node, emitted as
VL_MOSTSETBITP1_{I,Q,W}; those runtime helpers now use __builtin_clz where
available (same pattern as VL_REDXOR's __builtin_parity), with the existing
bit scan as fallback.  The count-ones form reuses AstCountOnes ($countones,
popcount); as the DFG requires a 32-bit countones result it is built at 32
bits and narrowed to the accumulator width with a select.

Matching is structural to stay sound: the index must start at 0, increment
by exactly 1, and scan all W==width(vec) bits via a single 1-bit select of a
distinct vector, with the target pre-zeroed and no else branch.  The loop
bound is accepted as a strict ascending 'idx < W' written either way and
signed or unsigned (Gt/GtS/Lt/LtS).  Gated by -fbit-scan-loops (on at -O).

Adds t_bit_scan_loops (I/Q/W, count-ones and unsigned-index positives;
step-2, start-1, idx*2+1, vec[idx+1], target=idx and W!=width negatives, all
self-checked and asserted via --stats not to lower) plus t_bit_scan_loops_off
for the disable flag.

Motivated by a transformer inference design whose 80-bit leading-one detector
ran every cycle (~37% of runtime); the lowering is worth ~39% there.
2026-06-24 10:43:05 +01:00
Wilson Snyder 7752625f49 CI: Pin actions to hashes 2026-06-23 21:24:21 -04:00
Wilson Snyder 36d30d8fcb CI: Remove unused passed step 2026-06-23 21:21:07 -04:00
Tom Jackson 2baca68f86
Fix class/var named identically to an enclosing-scope type (#7827) (#7828)
Fixes #7827.
2026-06-23 20:43:31 -04:00
Igor Zaworski 0cd13f80c9
Fix nested class split crash (#7826)
Signed-off-by: Igor Zaworski <izaworski@antmicro.com>
2026-06-23 14:07:15 -04:00
Jakub Wasilewski d5c040d8e6
Fix skewed dist operator for arrays (#7802) 2026-06-23 09:47:55 -04:00
Nick Brereton 6fbc7042a5
Support VPI access to unpacked struct members (#7823) 2026-06-23 07:04:51 -04:00
Geza Lore c76c94ef16
Optimize additional expression patterns in V3Const (#7824)
- Masking that returns known zero
- More general Sel over Extend
2026-06-23 04:22:35 +01:00
Matthew Ballance 756bcf5742
Fix '$' as unsupported coverpoint-bin range bounds (#7750) (#7825) 2026-06-22 22:14:43 -04:00
Artur Bieniek 87bebbb732
Support global $assertcontrol (#7807)
Signed-off-by: Artur Bieniek <abieniek@antmicro.com>
2026-06-22 18:51:41 -04:00
Wilson Snyder c927f05f35 Update fst from upstream (#6771 partial) 2026-06-22 17:25:59 -04:00
dependabot[bot] bf50baefee
CI: Bump actions/checkout from 6 to 7 in the everything group (#7821) 2026-06-22 12:48:29 -04:00
github action 515c4282f4 Apply 'make format' [ci skip] 2026-06-22 16:47:50 +00:00
Saksham 729794bc0e
Fix CASEINCOMPLETE for all uncovered enum items (#7815) (#7817)
Fixes #7815.
2026-06-22 12:41:48 -04:00