sv2v/src/Convert
Zachary Snow 5351dee80a minor scoping/ordering fixes for pesky VCS restrictions 2019-04-02 15:36:29 -04:00
..
AlwaysKW.hs added some support for a few key non-synthesizable constructs 2019-03-04 21:04:22 -05:00
AsgnOp.hs support for more complex for loop components 2019-03-27 01:53:26 -04:00
Bits.hs $bits conversion handles types with more than 1 dimension 2019-04-02 13:44:47 -04:00
Enum.hs minor scoping/ordering fixes for pesky VCS restrictions 2019-04-02 15:36:29 -04:00
FuncRet.hs revamped support system with most SystemVerilog types and signed types 2019-03-22 17:45:31 -04:00
Interface.hs interface conversion obeys function/task identifier shadowing 2019-04-02 13:35:15 -04:00
KWArgs.hs added conversion for name task and function arguments 2019-04-01 13:16:21 -04:00
Logic.hs several conversion bug fixes 2019-03-31 15:01:10 -04:00
PackedArray.hs minor scoping/ordering fixes for pesky VCS restrictions 2019-04-02 15:36:29 -04:00
Return.hs support for binary blocking assignment operators in statements 2019-03-07 18:16:28 -05:00
StarPort.hs preliminary support for extern and module/interface lifetimes 2019-03-26 15:10:16 -04:00
StmtBlock.hs added conversion to make functions and tasks use only one statement 2019-03-26 21:43:27 -04:00
Struct.hs fix Struct and Interface conversion for expressions within LHSs 2019-04-02 01:00:02 -04:00
Traverse.hs minor scoping/ordering fixes for pesky VCS restrictions 2019-04-02 15:36:29 -04:00
Typedef.hs added support and conversion handling of the $bits system function 2019-04-02 00:16:09 -04:00
UnbasedUnsized.hs simple conversion for unbased unsized literals 2019-03-19 13:40:25 -04:00
Unique.hs additional SystemVerilog language support 2019-03-30 00:47:42 -04:00