mirror of https://github.com/zachjs/sv2v.git
added some support for a few key non-synthesizable constructs
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@ -18,7 +18,7 @@ convert = traverseDescriptions $ traverseModuleItems replaceAlwaysKW
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replaceAlwaysKW :: ModuleItem -> ModuleItem
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replaceAlwaysKW (AlwaysC AlwaysComb stmt) =
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AlwaysC Always $ Timing SenseStar stmt
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AlwaysC Always $ Timing (Event SenseStar) stmt
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replaceAlwaysKW (AlwaysC AlwaysFF stmt) =
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AlwaysC Always stmt
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replaceAlwaysKW other = other
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@ -97,6 +97,8 @@ traverseStmtsM mapper = moduleItemMapper
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moduleItemMapper (Function lifetime ret name decls stmts) = do
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stmts' <- mapM fullMapper stmts
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return $ Function lifetime ret name decls stmts'
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moduleItemMapper (Initial stmt) =
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fullMapper stmt >>= return . Initial
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moduleItemMapper other = return $ other
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fullMapper = traverseNestedStmtsM mapper
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@ -125,8 +127,9 @@ traverseNestedStmtsM mapper = fullMapper
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s1' <- fullMapper s1
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s2' <- fullMapper s2
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return $ If e s1' s2'
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cs (Timing sense stmt) = fullMapper stmt >>= return . Timing sense
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cs (Timing event stmt) = fullMapper stmt >>= return . Timing event
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cs (Return expr) = return $ Return expr
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cs (Subroutine f exprs) = return $ Subroutine f exprs
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cs (Null) = return Null
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traverseStmtLHSsM :: Monad m => MapperM m LHS -> MapperM m Stmt
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@ -238,7 +241,9 @@ traverseExprsM mapper = moduleItemMapper
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return $ For (x1, e1') cc' (x2, e2') stmt
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flatStmtMapper (If cc s1 s2) =
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exprMapper cc >>= \cc' -> return $ If cc' s1 s2
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flatStmtMapper (Timing sense stmt) = return $ Timing sense stmt
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flatStmtMapper (Timing event stmt) = return $ Timing event stmt
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flatStmtMapper (Subroutine f exprs) =
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mapM exprMapper exprs >>= return . Subroutine f
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flatStmtMapper (Return expr) =
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exprMapper expr >>= return . Return
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flatStmtMapper (Null) = return Null
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@ -252,6 +257,8 @@ traverseExprsM mapper = moduleItemMapper
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exprMapper expr >>= return . Assign lhs
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moduleItemMapper (AlwaysC kw stmt) =
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stmtMapper stmt >>= return . AlwaysC kw
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moduleItemMapper (Initial stmt) =
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stmtMapper stmt >>= return . Initial
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moduleItemMapper (Function lifetime ret f decls stmts) = do
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decls' <- mapM declMapper decls
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stmts' <- mapM stmtMapper stmts
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@ -12,6 +12,7 @@ module Language.SystemVerilog.AST
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, BinOp (..)
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, AsgnOp (..)
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, Sense (..)
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, Timing (..)
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, GenItem (..)
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, AlwaysKW (..)
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, CaseKW (..)
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@ -156,11 +157,9 @@ data ModuleItem
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| Genvar Identifier
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| Generate [GenItem]
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| Modport Identifier [ModportDecl]
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| Initial Stmt
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deriving Eq
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-- "function inputs and outputs are inferred to be of type reg if no internal
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-- data types for the ports are declared"
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data AlwaysKW
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= Always
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| AlwaysComb
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@ -189,7 +188,8 @@ instance Show ModuleItem where
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Function ml t x i b -> printf "function %s%s%s;\n%s\n%s\nendfunction" (showLifetime ml) (showPad t) x (indent $ show i) (indent $ unlines' $ map show b)
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Genvar x -> printf "genvar %s;" x
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Generate b -> printf "generate\n%s\nendgenerate" (indent $ unlines' $ map show b)
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Modport x l -> printf "modport %s(\n%s\n);" x (indent $ intercalate ",\n" $ map showModportDecl l)
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Modport x l -> printf "modport %s(\n%s\n);" x (indent $ intercalate ",\n" $ map showModportDecl l)
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Initial s -> printf "initial %s" (show s)
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where
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showMaybePorts = maybe "(.*)" showPorts
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showPorts :: [PortBinding] -> String
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@ -401,8 +401,9 @@ data Stmt
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| AsgnBlk LHS Expr
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| Asgn LHS Expr
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| If Expr Stmt Stmt
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| Timing Sense Stmt
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| Timing Timing Stmt
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| Return Expr
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| Subroutine Identifier [Expr]
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| Null
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deriving Eq
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@ -431,9 +432,11 @@ instance Show Stmt where
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show (If a b Null) = printf "if (%s) %s" (show a) (show b)
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show (If a b c ) = printf "if (%s) %s\nelse %s" (show a) (show b) (show c)
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show (Return e ) = printf "return %s;" (show e)
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show (Timing t s ) = printf "@(%s)%s" (show t) rest
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show (Subroutine x a) = printf "%s(%s);" x (commas $ map show a)
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show (Timing t s ) = printf "%s%s" (show t) rest
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where
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rest = case s of
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Null -> ";"
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Block _ _ -> " " ++ (show s)
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_ -> "\n" ++ (indent $ show s)
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show (Null ) = ";"
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@ -443,6 +446,17 @@ type Case = ([Expr], Stmt)
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showCase :: (Show x, Show y) => ([x], y) -> String
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showCase (a, b) = printf "%s: %s" (commas $ map show a) (show b)
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data Timing
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= Event Sense
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| Delay Expr
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| Cycle Expr
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deriving Eq
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instance Show Timing where
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show (Event s) = printf "@(%s)" (show s)
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show (Delay e) = printf "#(%s)" (show e)
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show (Cycle e) = printf "##(%s)" (show e)
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data Sense
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= Sense LHS
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| SenseOr Sense Sense
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@ -265,23 +265,31 @@ Identifiers :: { [Identifier] }
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-- uses delimiter propagation hack to avoid conflicts
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DeclTokens(delim) :: { [DeclToken] }
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: DeclToken delim { [$1] }
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| DeclToken DeclTokens(delim) { [$1] ++ $2 }
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| "=" Expr "," DeclTokens(delim) { [DTAsgn $2, DTComma] ++ $4 }
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| "<=" Expr "," DeclTokens(delim) { [DTAsgnNBlk $2, DTComma] ++ $4 }
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| "=" Expr delim { [DTAsgn $2] }
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| "<=" Expr delim { [DTAsgnNBlk $2] }
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: DeclToken delim { [$1] }
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| DeclToken DeclTokens(delim) { [$1] ++ $2 }
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| "=" Expr "," DeclTokens(delim) { [DTAsgn $2, DTComma] ++ $4 }
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| "=" Expr delim { [DTAsgn $2] }
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DeclToken :: { DeclToken }
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: DeclOrStmtToken { $1 }
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| ParameterBindings { DTParams $1 }
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| ModuleInstantiation { DTInstance $1 }
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DeclOrStmtTokens(delim) :: { [DeclToken] }
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: DeclOrStmtToken delim { [$1] }
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| DeclOrStmtToken DeclOrStmtTokens(delim) { [$1] ++ $2 }
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| "=" Expr "," DeclOrStmtTokens(delim) { [DTAsgn $2, DTComma] ++ $4 }
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| "<=" Expr "," DeclOrStmtTokens(delim) { [DTAsgnNBlk $2, DTComma] ++ $4 }
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| "=" Expr delim { [DTAsgn $2] }
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| "<=" Expr delim { [DTAsgnNBlk $2] }
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DeclOrStmtToken :: { DeclToken }
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: "," { DTComma }
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| Range { DTRange $1 }
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| Identifier { DTIdent $1 }
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| Direction { DTDir $1 }
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| ParameterBindings { DTParams $1 }
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| ModuleInstantiation { DTInstance $1 }
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| PartialType { DTType $1 }
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| Range { DTRange $1 }
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| Identifier { DTIdent $1 }
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| Direction { DTDir $1 }
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| "[" Expr "]" { DTBit $2 }
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| "{" LHSs "}" { DTConcat $2 }
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| PartialType { DTType $1 }
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| Identifier "." Identifier { DTType $ InterfaceT $1 (Just $3) }
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| "[" Expr "]" { DTBit $2 }
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| "{" LHSs "}" { DTConcat $2 }
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VariablePortIdentifiers :: { [(Identifier, Maybe Expr)] }
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: VariablePortIdentifier { [$1] }
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@ -306,6 +314,7 @@ ModuleItem :: { [ModuleItem] }
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| "localparam" ParamType DeclAsgns ";" { map MIDecl $ map (uncurry $ Localparam $2) $3 }
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| "assign" LHS "=" Expr ";" { [Assign $2 $4] }
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| AlwaysKW Stmt { [AlwaysC $1 $2] }
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| "initial" Stmt { [Initial $2] }
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| "genvar" Identifiers ";" { map Genvar $2 }
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| "generate" GenItems "endgenerate" { [Generate $2] }
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| "modport" ModportItems ";" { map (uncurry Modport) $2 }
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@ -338,13 +347,6 @@ ParamType :: { Type }
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: Dimensions { Implicit $1 }
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| "integer" { IntegerT }
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EventControl :: { Sense }
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: "@" "(" Sense ")" { $3 }
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| "@" "(" "*" ")" { SenseStar }
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| "@" "(*)" { SenseStar }
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| "@" "*" { SenseStar }
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| "@*" { SenseStar }
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Dimensions :: { [Range] }
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: {- empty -} { [] }
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| DimensionsNonEmpty { $1 }
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@ -372,15 +374,6 @@ LHSs :: { [LHS] }
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: LHS { [$1] }
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| LHSs "," LHS { $1 ++ [$3] }
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Sense :: { Sense }
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: Sense1 { $1 }
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| Sense "or" Sense1 { SenseOr $1 $3 }
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Sense1 :: { Sense }
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: LHS { Sense $1 }
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| "posedge" LHS { SensePosedge $2 }
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| "negedge" LHS { SenseNegedge $2 }
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Bindings :: { [(Identifier, Maybe Expr)] }
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: {- empty -} { [] }
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| BindingsNonEmpty { $1 }
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@ -403,6 +396,7 @@ Stmt :: { Stmt }
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: StmtNonAsgn { $1 }
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| LHS "=" Expr ";" { AsgnBlk $1 $3 }
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| LHS "<=" Expr ";" { Asgn $1 $3 }
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| Identifier ";" { Subroutine $1 [] }
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StmtNonAsgn :: { Stmt }
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: ";" { Null }
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| "begin" Stmts "end" { Block Nothing $2 }
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@ -411,18 +405,39 @@ StmtNonAsgn :: { Stmt }
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| "if" "(" Expr ")" Stmt %prec NoElse { If $3 $5 Null }
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| "for" "(" Identifier "=" Expr ";" Expr ";" Identifier "=" Expr ")" Stmt { For ($3, $5) $7 ($9, $11) $13 }
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| Unique CaseKW "(" Expr ")" Cases opt(CaseDefault) "endcase" { Case $1 $2 $4 $6 $7 }
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| EventControl Stmt { Timing $1 $2 }
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| TimingControl Stmt { Timing $1 $2 }
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| "return" Expr ";" { Return $2 }
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| Identifier "(" CallArgs ")" ";" { Subroutine $1 $3 }
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DeclsAndStmts :: { ([Decl], [Stmt]) }
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: DeclOrStmt DeclsAndStmts { combineDeclsAndStmts $1 $2 }
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| StmtNonAsgn Stmts { ([], $1 : $2) }
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| {- empty -} { ([], []) }
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DeclOrStmt :: { ([Decl], [Stmt]) }
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: DeclTokens(";") { parseDTsAsDeclOrAsgn $1 }
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: DeclOrStmtTokens(";") { parseDTsAsDeclOrAsgn $1 }
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| "parameter" ParamType DeclAsgns ";" { (map (uncurry $ Parameter $2) $3, []) }
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| "localparam" ParamType DeclAsgns ";" { (map (uncurry $ Localparam $2) $3, []) }
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TimingControl :: { Timing }
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: DelayControl { $1 }
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| CycleDelay { $1 }
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| EventControl { $1 }
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DelayControl :: { Timing }
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: "#" Expr { Delay $2 }
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CycleDelay :: { Timing }
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: "##" Expr { Cycle $2 }
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EventControl :: { Timing }
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: "@" "(" Senses ")" { Event $3 }
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| "@" "(*)" { Event SenseStar }
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| "@*" { Event SenseStar }
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Senses :: { Sense }
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: Sense { $1 }
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| Senses "or" Sense { SenseOr $1 $3 }
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Sense :: { Sense }
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: LHS { Sense $1 }
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| "posedge" LHS { SensePosedge $2 }
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| "negedge" LHS { SenseNegedge $2 }
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Unique :: { Bool }
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: "unique" { True }
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| {- empty -} { False }
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@ -449,8 +464,11 @@ String :: { String }
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: string { tail $ init $ tokenString $1 }
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CallArgs :: { [Expr] }
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: Expr { [$1] }
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| CallArgs "," Expr { $1 ++ [$3] }
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: {- empty -} { [] }
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| CallArgsNonEmpty { $1 }
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CallArgsNonEmpty :: { [Expr] }
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: Expr { [$1] }
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| CallArgsNonEmpty "," Expr { $1 ++ [$3] }
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Exprs :: { [Expr] }
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: Expr { [$1] }
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@ -140,8 +140,10 @@ parseDTsAsDecl tokens =
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where components = parseDTsAsComponents tokens
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-- [PUBLIC]: parser for single block item declarations of assign statetments
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-- [PUBLIC]: parser for single block item declarations or assign or arg-less
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-- subroutine call statetments
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parseDTsAsDeclOrAsgn :: [DeclToken] -> ([Decl], [Stmt])
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parseDTsAsDeclOrAsgn [DTIdent f] = ([], [Subroutine f []])
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parseDTsAsDeclOrAsgn tokens =
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if any isAsgnToken tokens || tripLookahead tokens
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then ([], [constructor lhs expr])
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