Zachary Snow 0c08b9aebb preliminary support for multi-dimensional vector types

2019-02-20 16:03:04 -05:00

Convert

preliminary support for multi-dimensional vector types

2019-02-20 16:03:04 -05:00

Language

preliminary support for multi-dimensional vector types

2019-02-20 16:03:04 -05:00

.gitignore

switch to using stack

2019-02-11 23:48:49 -05:00

Convert.hs

suport for in module instantiations

2019-02-20 15:22:26 -05:00

LICENSE

updated LICENSE to reflect fork

2019-02-08 16:51:20 -05:00

Makefile

switch to using stack

2019-02-11 23:48:49 -05:00

Setup.hs

Initial commit: fork of https://github.com/tomahawkins/verilog

2019-02-07 23:49:12 -05:00

stack.yaml

switch to using stack

2019-02-11 23:48:49 -05:00

sv2v.cabal

suport for in module instantiations

2019-02-20 15:22:26 -05:00

sv2v.hs

added logic to module items; toying with initial Conversion

2019-02-17 23:39:01 -05:00

S

Description

SystemVerilog to Verilog conversion

conversionsystemverilogverilogyosys

BSD-3-Clause

3.3 MiB

Languages

Haskell 48.1%

SystemVerilog 26.3%

Verilog 16.4%

Yacc 6.4%

Shell 2.4%

Other 0.3%