test/core/struct_unit_array.v

module top;
    reg [2:0] s = 3'b110;
    initial #1 $display("%b", s);
endmodule
fix premature elaboration of single element patterns 2020-12-07 16:23:29 -07:00			`module top;`
convert logics with initial values to regs, not wires 2021-07-01 23:17:08 -04:00			`reg [2:0] s = 3'b110;`
fix premature elaboration of single element patterns 2020-12-07 16:23:29 -07:00			`initial #1 $display("%b", s);`
			`endmodule`