propagate_IOB_SING and propagate_IOI_SING walk each IO column from a
parent IOB/IOI tile down to the SING half-tiles at the column endpoints
and alias the parent's CLB_IO_CLK bits into both halves (offset=0 for
the bottom SING, offset=99 for the top SING). The parent-type
allowlists were missing the HP-bank L-column types:
propagate_IOB_SING: ["LIOB33", "RIOB33", "RIOB18"] # LIOB18 missing
propagate_IOI_SING: ["LIOI3", "RIOI3", "RIOI"] # LIOI missing
On artix7 / kintex7 the leftmost HP column doesn't exist as a parent
LIOB18 / LIOI in the tilegrid, so the omission was latent. On
virtex7 VX (HP-only) both LIOB18 and RIOB18 columns exist, and the
gap surfaces as half the SING IOB / IOI tiles (the L-column ones)
having empty bits in tilegrid.json:
LIOB18_SING: 0/14 with bits -> 14/14
RIOB18_SING: 14/14 (unchanged)
LIOI_SING: 0/14 with bits -> 14/14
RIOI_SING: 14/14 (unchanged)
Add the missing types. Cross-checked against iob18's own measured
parent bases (e.g. LIOB18_X81Y2 -> 0x00421000 lines up with the
propagated LIOB18_SING_X81Y1 base 0x00421000 offset=0 and Y51 offset=99).
Also de-wire the iob18_sing sub-fuzzer from TILEGRID_TDB_DEPENDENCIES:
SING tiles aren't independently addressed (they share the parent IOB's
base with a word-offset variant), and half of iob18_sing's tdb entries
land at an unaligned frame (offset+1) that add_tdb's frame-alignment
assertion would reject anyway. The build rule stays so the fuzzer can
be invoked manually as a Vivado-measurement guard for the propagation.
Co-Authored-By: Claude Opus 4.7 <[email protected]>
Dr Jonathan Richard Robert KimmittandClaude Opus 4.7
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