Commit Graph

20 Commits

Author SHA1 Message Date
Tomasz Michalak ecab15cd39 zynq: 034-cmt-pll-pips: Remove Zynq specific workarounds
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
2020-01-27 11:26:55 +01:00
Alessandro Comodi e44027bcaf Move all part-specific files to dedicated directory
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
2020-01-24 10:13:33 +01:00
Maciej Kurc 6fd00834b2 Fixed bit names formatting.
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2019-11-14 16:09:44 +01:00
Maciej Kurc b99bd85fa4 Added handling of routing failure in the TCL script.
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2019-10-29 18:20:50 +01:00
Maciej Kurc 0377b5fb4c Disabled reading PIPs and PPIPs for "R" version of CMT tiles for Zynq7.
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2019-10-29 17:43:10 +01:00
Maciej Kurc 573ee1a38d Fixed bug in tag_groups.txt
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2019-10-29 11:55:03 +01:00
Maciej Kurc bf380f2bdd PIPs and PPIPs are now not read from the db.
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2019-10-29 11:50:40 +01:00
Maciej Kurc 8267bcdaeb Updated regex for PIP todo list.
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2019-10-28 15:59:38 +01:00
Maciej Kurc 5ab90a604d Inceased N
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2019-10-28 15:59:38 +01:00
Maciej Kurc 355a571400 Removed the INTERNAL_FEEDBACK tag as it is the same as the PLLE2.COMPENSATION.INTENAL
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2019-10-28 15:59:38 +01:00
Maciej Kurc 4a6930694f Reworked fuzzer, added README.md
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2019-10-28 15:59:38 +01:00
Maciej Kurc 73c8652858 Ran make format_py
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2019-10-28 15:59:38 +01:00
Maciej Kurc 56258694aa Added rejection of conflicting features.
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2019-10-28 15:59:38 +01:00
Maciej Kurc a4250c1487 Comments.
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2019-10-28 15:58:58 +01:00
Maciej Kurc 205bc5c1df Code formatting.
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2019-10-28 15:58:58 +01:00
Maciej Kurc 89abe7ad47 Modified 034 to manually force routing through specific PIPs and exclude PPIPs from segdata.
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2019-10-28 15:57:22 +01:00
Maciej Kurc 0922181488 Fixed bits.dbf for 034 to include "0" tags in db.
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2019-09-26 14:38:29 +02:00
Keith Rothman b77c47b155 Fixes for zynq7 and PLL fuzzing.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2019-07-03 13:19:03 -07:00
Keith Rothman 2728b781d1 Limit pips to the ones we care about.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2019-07-03 13:19:03 -07:00
Keith Rothman 30648d554a Complete initial PLL fuzzer.
This solves for all unknown bits, but results in a large "IN_USE"
feature for apparently constant bits.

Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2019-07-03 13:18:58 -07:00