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docs: update `CMD_CHG_STATUS` PLL control register bits

This commit is contained in:
Patrick Urban 2025-10-15 19:40:40 +02:00
parent 1f3f9aad85
commit f9183e4e2a
1 changed files with 149 additions and 17 deletions
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166
docs/source/bitstream/commands.rst
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@ -304,29 +304,161 @@ CMD_CHG_STATUS
- 6..7
- Unused
* - 4
-
- PLL0 Control Register
- 0
- PLL0 PLL_RST_N
* -
- 1
- PLL0 PLL_EN
* -
- 2
- PLL0 PLL_AUTN
* -
- 3
- PLL0 SET_SEL
* -
- 4
- PLL0 USR_SET
* -
- 5
- PLL0 USR_CLK_REF
* -
- 6
- PLL0 CLK_OUT_EN
* -
- 7
- PLL0 LOCK_REQ
* - 5
-
- PLL0 Startup Register
- 0..2
- PLL0 AUTN_CT_I[2:0], should be 001
* -
- 3
- PLL0 CLK180_DOUB
* -
- 4
- PLL0 CLK270_DOUB
* -
- 5..6
- Unused
* -
- 7
- PLL0 USR_CLK_OUT
* - 6
-
- PLL1 Control Register
- 0
- PLL1 PLL_RST_N
* -
- 1
- PLL1 PLL_EN
* -
- 2
- Unused
* -
- 3
- PLL1 SET_SEL
* -
- 4
- PLL1 USR_SET
* -
- 5
- PLL1 USR_CLK_REF
* -
- 6
- PLL1 CLK_OUT_EN
* -
- 7
- PLL1 LOCK_REQ
* - 7
-
- PLL1 Startup Register
- 0..2
- Unused
* -
- 3
- PLL1 CLK180_DOUB
* -
- 4
- PLL1 CLK270_DOUB
* -
- 5..6
- Unused
* -
- 7
- PLL1 USR_CLK_OUT
* - 8
-
- PLL2 Control Register
* - 9
-
- PLL2 Startup Register
- 0
- PLL2 PLL_RST_N
* -
- 1
- PLL2 PLL_EN
* -
- 2
- Unused
* -
- 3
- PLL2 SET_SEL
* -
- 4
- PLL2 USR_SET
* -
- 5
- PLL2 USR_CLK_REF
* -
- 6
- PLL2 CLK_OUT_EN
* -
- 9
- PLL2 LOCK_REQ
* - 7
- 0..2
- Unused
* -
- 3
- PLL2 CLK180_DOUB
* -
- 4
- PLL2 CLK270_DOUB
* -
- 5..6
- Unused
* -
- 7
- PLL2 USR_CLK_OUT
* - 10
-
- PLL3 Control Register
- 0
- PLL3 PLL_RST_N
* -
- 1
- PLL3 PLL_EN
* -
- 2
- Unused
* -
- 3
- PLL3 SET_SEL
* -
- 4
- PLL3 USR_SET
* -
- 5
- PLL3 USR_CLK_REF
* -
- 6
- PLL3 CLK_OUT_EN
* -
- 9
- PLL3 LOCK_REQ
* - 11
-
- PLL3 Startup Register
- 0..2
- Unused
* -
- 3
- PLL3 CLK180_DOUB
* -
- 4
- PLL3 CLK270_DOUB
* -
- 5..6
- Unused
* -
- 7
- PLL3 USR_CLK_OUT
.. warning::
This command have data after payload, and it consists of 9 bytes ``0x00 0x00 0x00 0x00 0x33 0x00 0x00 0x00 0x00`` and