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b8e2939776
board: add vid/pid for DFU at board level
2021-07-17 08:34:44 +0200
7113f4b36b
part: add Gowin GW1N-2
2021-07-16 07:42:34 +0200
651fdd8beb
ftdixx: improve workaround for arty. Not required with a classic ft2232
2021-07-14 19:08:40 +0200
cd64bce4f2
fix warning in Debug mode
2021-07-14 17:59:02 +0200
be6ed217dd
main: display error message if program fails
2021-07-14 16:39:14 +0200
1e0a06288d
configBitstreamParser: don't compute reverseByte, use a precomputed table: gain: 200ms for arty @30MHz
2021-07-14 08:44:22 +0200
cc688d6db6
main: small fix
2021-07-14 08:07:51 +0200
894cda820f
board: add default frequency option for BITBANG and SPI boards
2021-07-14 08:05:36 +0200
13af012163
main: avoid potential miss with probe clock frequency
2021-07-14 08:04:43 +0200
fd329158de
Merge pull request #98 from ultraembedded/master
2021-07-14 07:53:13 +0200
acf7d2a0a8
ftdiJtagMPSSE: add work around to deal with freq >= 15MHz
2021-07-13 07:00:30 +0200
594f065116
ftdipp_mpsse: use runtime_error instead of simple exception
2021-07-12 08:05:25 +0200
f8831f329c
Only use board clock speed if user does not specify an alternate freq
2021-07-11 15:27:46 +0100
797785ce93
Allow board configuration table to contain a default clock speed (as some boards are known to work at higher speeds safely). Move Digilent Arty to 10MHz (tested).
2021-07-11 15:20:15 +0100
3983726a66
all devices: use spiFlash dump & verify
2021-07-11 11:34:14 +0200
f5254294eb
altera: add verify and dump
2021-07-11 11:32:35 +0200
b77c5a22df
spiFlash: add verify and dump method
2021-07-11 11:32:10 +0200
f19d0996a4
progressBar: limit resolution
2021-07-11 11:30:02 +0200
6a1f67bc69
spiOverJtag: add constr_xc6s_csg324
2021-07-11 09:05:15 +0200
6639f0646a
board: pipistrello: add spi flash support
2021-07-11 08:58:40 +0200
0d57b58c26
spiOverJtag: use build.py for all devices, add xc6slx45
2021-07-11 08:57:46 +0200
7d3000f88d
spiOverJtag: rewrite xilinx spiOverJtag vhd -> v
2021-07-11 08:57:00 +0200
7137103db1
update README
2021-07-11 08:49:39 +0200
c90a4b7734
altera: spi flash support for cycloneV and qmtech
2021-07-10 08:20:27 +0200
0c4aedcb23
altera: add spi flash support for de0nano (EP4CE22F17C6)
2021-07-09 07:40:55 +0200
592cbd87b7
spiOverJtag: add real bridge (virtual jtag) for cyc1000 and build system based on edalize
2021-07-08 20:59:28 +0200
c99f5aa4e6
main: update to pass device type and prog type to altera class
2021-07-08 20:54:12 +0200
84bd19b19a
board: cyc1000: add fpga model
2021-07-08 20:53:20 +0200
c29fbb15f9
altera: use new epcq interface, add device type and prog type. Now more generic and not specific to cyc1000
2021-07-08 20:52:46 +0200
0d4b6143b5
epcq,spiFlash: epcq is now a subclass of spiFlash (real different part is power_(up|down) and read_id
2021-07-08 20:51:51 +0200
9f32493962
Merge pull request #97 from wasv/xc6
2021-07-08 20:47:06 +0200
db73fedf40
Adds wpn and hldn signals.
2021-07-04 21:35:07 -0400
05c07df4cc
Condenses TCL script.
2021-07-04 21:34:23 -0400
1d6505182c
Adds .gitignore for ISE build files.
2021-07-04 21:33:48 -0400
f937cb9ab5
Adds support for the xc6slx100fgg484.
2021-07-03 05:01:56 -0400
8068c84ec8
board: add Fomu support
2021-06-29 13:45:56 +0200
1dbbd34420
prepare release v0.4.0
2021-06-26 15:24:22 +0200
8f95303daf
move to APACHE-2.0 license
2021-06-26 15:24:07 +0200
b2d2fa0127
ftdipp_mpsse: with 1.5 reatach may be automatic
2021-06-26 15:04:57 +0200
c1f18cd1d3
jtag: fix unsigned vs signed
2021-06-26 08:47:37 +0200
98a2e836fa
ice40: add support for verify and dump
2021-06-26 08:43:02 +0200
fb8f50cb52
ice40: indent
2021-06-26 08:34:41 +0200
79a0e84f1f
efinix: add support for verify and dump
2021-06-26 08:34:12 +0200
b92a9adca7
ftdispi: improve write/read
2021-06-26 08:06:26 +0200
d32b81037a
xilinx: add dumpFlash support
2021-06-25 11:28:19 +0200
2af64e9af4
all: propagate verify with a message when not supported
2021-06-25 08:58:45 +0200
fe0a315456
lattice,device: introduce method to dump flash content
2021-06-24 18:19:09 +0200
c471d25bb5
xilinx,lattice,device: add verify write into flash
2021-06-24 18:06:48 +0200
b150bbdd23
gowin: checks if fs is targeted for connected device
2021-06-24 08:57:18 +0200
bb9d22d89a
Merge pull request #94 from zyp/orbtrace
2021-06-23 09:41:45 +0200
5e11b3cb67
cmsisDAP: Remove product string check.
2021-06-22 23:53:30 +0200
7fc0703167
cable: Add support for Orbtrace.
2021-06-22 23:52:54 +0200
371a411e8a
prepare release v0.3.0
2021-06-20 16:40:41 +0200
40d9bc3ea7
dirtyJtag: cpplint/cppcheck
2021-06-20 16:39:19 +0200
0a7fd93a08
dirtyJtag: update _clkHZ with current frequency
2021-06-20 16:28:46 +0200
8d20c09791
dirtyJtag: fix toggleClk call (TMS is high, TDI depends on last_bit)
2021-06-20 16:28:18 +0200
26f5dd3ee5
Merge pull request #92 from phdussud/master
2021-06-20 16:26:53 +0200
827767b99f
add proof of concept / draft for DFU protocol. Add orangeCrab in DFU mode
2021-06-20 10:25:49 +0200
80f642a0a4
Fix a buffer overflow per code review
2021-06-19 12:39:25 -0700
cbbac0bff8
Changes per code review.
2021-06-19 09:40:33 -0700
dddfcbc973
board: add support for colorlight I5
2021-06-19 17:30:47 +0200
53c5d35da6
add cmsis dap (hid) support
2021-06-19 17:28:48 +0200
00289503dd
README: add ZedBoard, de0nanoSoc and de10nano support
2021-06-19 15:33:26 +0200
b4fe045060
fsparser: don't try to analyze header after then end of header area
2021-06-18 13:33:40 +0200
41b4a79af1
Merge pull request #91 from ultraembedded/master
2021-06-14 07:16:55 +0200
f84cb403e4
dirtyJtag optimizations to cut the number of USB requests
2021-06-13 11:38:30 -0700
171d51f844
dirtyJtag cable: optimizations to cut down on USB packet traffic
2021-06-13 10:51:06 -0700
470f2a2b25
Cosmetic change to board list in README.
2021-06-13 17:57:54 +0100
eaed746cf2
Add a few more Spartan6 based parts and boards (tested on an old miniSpartan6+).
2021-06-13 17:55:56 +0100
2bf7b255b3
lattice: move directly to run_test_idle with last tx packet in program_mem
2021-06-12 09:27:16 +0200
2214a7e720
Merge remote-tracking branch 'origin/master' into JTAG_chain
2021-06-12 08:44:18 +0200
b5f2506fd1
clkHZ: be more generic
2021-06-12 08:40:40 +0200
6c3fb2559d
Merge pull request #90 from ultraembedded/master
2021-06-11 13:39:01 +0200
0dd7355b36
Recombine Spartan 6 supported parts list
2021-06-11 11:52:08 +0100
dc003f6212
As per feedback, allow 232H devices to have upper bank pins configured on init.
2021-06-11 11:24:57 +0100
291f1b6d6f
Add support for Digilent Digital Discovery and Analog Discovery 2 (openFPGALoader -c digilent_ad)
2021-06-10 22:38:17 +0100
b1cdcba15e
Merge pull request #89 from kargeor/1200HC
2021-06-08 08:54:39 +0200
3abc591bd5
Add LCMXO2-1200HC
2021-06-05 23:24:47 -0700
70aaddd0e3
README: update intel section. Add rbf and a note for compression
2021-05-27 07:26:24 +0200
0cae46b367
configBitstreamParser: fix CRLF vs LF: use fread with FILE (or stdin) instead of c++ stream
2021-05-26 17:56:21 +0200
b28ae236a1
fsparser: drop CR at the end of line
2021-05-26 17:40:16 +0200
d3a5b712b4
part: cycloneV Soc 5CEMA4 -> 5CSEMA4, add 5CSEBA6 idcode
2021-05-21 12:37:16 +0200
fc08249630
lattice: don't use read_write
2021-05-18 08:27:34 +0200
c36d29e5e3
gowin: don't use read_write
2021-05-16 12:13:31 +0200
a160cc6431
board: add terasic de0nanoSoc
2021-05-15 19:32:49 +0200
a96fbcc99a
board: add digilent zedboard
2021-05-15 19:31:39 +0200
ba92456597
part: add zynq 7020
2021-05-15 19:31:20 +0200
2f38461826
main: fix default args.index_chain
2021-05-15 19:30:45 +0200
9e260c1e05
xilinx: don't use read_write
2021-05-15 18:43:54 +0200
181303ce8c
anlogic: don't use read_write
2021-05-15 15:39:37 +0200
27af85dc19
main: add option to specify device index
2021-05-15 15:26:09 +0200
acf4ab270c
main: rework fpga detection to allows more than one device in a chain, but only FPGA is allowed
2021-05-15 15:08:27 +0200
8b34448ed0
jtag: add logic to handle multiple device in JTAG chain
2021-05-15 12:25:39 +0200
a242168e7f
jtag: shiftxR: don't try to move to shift when not required
2021-05-15 09:05:48 +0200
5da47a0200
jtag: propagate getClkFreq
2021-05-15 08:46:21 +0200
3d60cd647f
altera: adapt delay according to clock freq
2021-05-15 08:35:16 +0200
610a76f653
jtagInterface/cables: introduce getClkFreq
2021-05-15 08:32:51 +0200
c4e58073c1
part: add irlength and introduce new structure for device not handled (CPU) mainly for irlength
2021-05-14 16:35:26 +0200
49ba5f265a
add support for usb-blasterII
2021-05-13 16:11:22 +0200
42b7279a4b
main: add optional probe-firmware
2021-05-13 16:07:40 +0200
Gwenhael Goavec-Merou
ultraembedded
Billy Stevens
Vegard Storheil Eriksen
phdussud
GEORGIOS KARNAS