daf233d983
efinix: in JTAG mode keep bus_addr, device_addr between jtag and spi interfaces
2023-02-25 17:11:55 +01:00
ea6b1989d0
ftdipp_mpsse: adding bus_addr, device_addr getters
2023-02-25 17:10:40 +01:00
7f1f9445d4
cable: bus_addr, device_addr: int -> uint8_t
2023-02-25 17:10:01 +01:00
49ae479833
Add flash support for VCU128
...
VCU128 does not have secondary flash.
2023-02-22 09:51:16 +08:00
f54781471b
Add initial support for VCU128
2023-02-19 18:39:14 +08:00
a0180f0bc6
xvc_server: fix comm when Vivado acts as client
2023-02-18 09:31:25 +01:00
a481c1e699
gowin: merge CRC check into one method, check usercode/checksum as fallback when usercode register doesn't match computed file's checksum (issue #279 )
2023-02-16 20:02:36 +01:00
6f070d8e97
fsParser: fix usercode/checksum size
2023-02-16 19:59:58 +01:00
2869db7580
libusb_ll: fix typo in scan method
2023-02-16 08:00:39 +01:00
391dcb3dee
dirtyJtag: throw exception when getVersion fails, use a #define for TIMEOUT value
2023-02-16 07:59:54 +01:00
8e20f1eb7d
Fix typo in part name and family.
2023-02-15 15:06:02 +01:00
9a09e427e3
Added Lone Dynamics Schoko and Konfekt SBCs
2023-02-11 17:15:45 +01:00
2c7334cc35
src/part: add LCMXO2-256HC, update doc/FPGAs
2023-02-08 20:18:04 +01:00
b93862bd65
Sort.
2023-02-08 14:08:45 +01:00
d4095ddb93
Add ID code for part xa2c64a (Coolrunner-II).
2023-02-08 14:05:45 +01:00
090a16656d
Only delete bitstream objects if non-null
2023-02-07 10:30:28 +01:00
beb93d8321
Replace the string arguments usage with a bitfield
2023-02-06 15:17:53 +01:00
0536ab4754
Add target-flash and secondary-bitstream CLI options for VCU118
2023-02-06 11:23:10 +01:00
5a00f0d184
part: Add all cyclone V variant
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board: Add the Terasic C5G
2023-01-29 15:35:47 +01:00
4a07ffa2b8
Merge pull request #297 from barbedo/vcu118-flash-ir-codes
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Add support for XCVU9P IR length and codes
2023-01-24 06:31:40 +01:00
43e6c0c867
Add support for 4-byte QSPI flash addressing ( #295 )
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* Add support for 4-byte QSPI flash addressing
* Avoid code duplication
2023-01-23 15:18:46 +01:00
ad9ad539ff
Add support for XCVU9P IR length and codes
2023-01-21 14:45:50 +01:00
e5481787d8
Fix VCU118 board part name and IR length
2023-01-21 14:45:50 +01:00
85fd2f316f
Add support for MT25QU01 flash
2023-01-21 13:47:51 +01:00
d127fb9554
bitparser: replace _raw_data.size() with _file_size
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Signed-off-by: Michal Sieron <msieron@antmicro.com>
2023-01-20 09:09:41 +01:00
bc53c1d022
bitparser: check bitstream length in the file
...
It was present before, but for some reason was removed in 16932786
2023-01-19 21:07:40 +01:00
67563983f9
feat(board): add support for Terasic DE10-Lite
2023-01-09 15:52:54 -06:00
fdf4c94d83
boards: add Sitlinv STLV7325
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Sitlinv STLV7325 is a board with XC7K325T-FFG676.
Add support for it.
The board does not have JTAG cables on board, however its vendor
provides an option to buy a FT4232-based JTAG cable with the board, so
the default cable is set to ft4232.
Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
2023-01-06 15:22:43 +08:00
14fce33109
feat(board): add support for Arrow/Terasic DECA
2023-01-04 13:11:21 -06:00
cc1bc89f29
boards: Trenz TEI0010 - AnalogMax
2023-01-04 19:00:08 +01:00
751b057596
parts: Intel MAX10 (10M08)
2023-01-04 18:53:25 +01:00
8ee65e7f9d
usbBlaster,ftdiJtagMPSSE: fix alignment for 1 bit len read transaction
2023-01-04 18:50:13 +01:00
84aa0d14b9
main: xvc_server: catch exception
2023-01-02 18:02:43 +01:00
2182a8ff7f
xvc_server: don't stop when connection close, rework read to return code for error and for disconnect
2023-01-02 18:02:28 +01:00
c28e955bb9
usbBlaster: change tx_len size (16 -> 32) to fix a potential overflow when log2(xfer_len) > 16 in toggleClk method
2023-01-02 08:57:52 +01:00
0591af56b7
feat(board): add support for Trenz C10LP-RefKit
2022-12-25 15:53:45 -06:00
483304344f
more typo fixes
2022-12-18 23:29:21 +01:00
0bdef7bab1
typo's, added git as dependency
2022-12-18 13:56:54 +01:00
0855efb29f
Add initial support for the VCU118 board
2022-12-11 22:11:50 +01:00
e536634ada
adding LiteX-Acorn-Baseboards support
2022-12-11 20:39:32 +01:00
fb8c1a5f97
altera,intel: adding an option to bypass spiOverJtag automatic bitstream selection by providing the bitstream file path
2022-12-10 22:05:37 +01:00
94d0ad6c85
src/ftdispi: typo: replace _holdn by _wpn for spi_config.wpn_pi (fix issue #277 ).
2022-11-27 15:29:25 +01:00
175312423c
src/libusb_ll: typo (ft2232RL -> ft232RL). Fix #276
2022-11-27 09:51:31 +01:00
0048431fb2
ALINX AX516 board.
2022-11-26 23:05:30 +01:00
6dfc762b7c
src/lattice: allows to use bit file for machxo2
2022-11-26 12:11:41 +01:00
2d885ce064
src/latticeBitParser: support machxo2 (check compress & fill vector<string>)
2022-11-26 12:06:24 +01:00
b078aa393a
adding nexys A7 (50/100) aka nexys 4 DDR
2022-11-23 13:47:07 +01:00
42193f1db8
boards: Add USRP X300 and X310
...
Signed-off-by: Martin Braun <martin.braun@ettus.com>
2022-11-22 20:15:16 +01:00
13fa66bc22
src/xilinx: zynqXX: load only ( #268 )
2022-11-20 17:08:49 +01:00
2df7606300
posParser: introducing intel/altera POF file parser
2022-11-20 16:46:51 +01:00
Gwenhael Goavec-Merou
Jiajie Chen
Bastian Löher
wdevore
Ricardo Barbedo
Olivier Galibert
Ricardo Barbedo
Michal Sieron
Marcus Andrade
Icenowy Zheng
Cedric de Wijs
Haakan T. Johansson
Martin Braun