7d3000f88d
spiOverJtag: rewrite xilinx spiOverJtag vhd -> v
2021-07-11 08:57:00 +02:00
c90a4b7734
altera: spi flash support for cycloneV and qmtech
2021-07-10 08:20:27 +02:00
0c4aedcb23
altera: add spi flash support for de0nano (EP4CE22F17C6)
2021-07-09 07:40:55 +02:00
592cbd87b7
spiOverJtag: add real bridge (virtual jtag) for cyc1000 and build system based on edalize
2021-07-08 20:59:28 +02:00
db73fedf40
Adds wpn and hldn signals.
2021-07-04 21:35:07 -04:00
05c07df4cc
Condenses TCL script.
2021-07-04 21:34:23 -04:00
1d6505182c
Adds .gitignore for ISE build files.
2021-07-04 21:33:48 -04:00
f937cb9ab5
Adds support for the xc6slx100fgg484.
...
Tested on a Pano Logic G2.
2021-07-03 05:01:56 -04:00
a4ccdae7df
add basys3 support
2021-04-20 21:28:14 +02:00
7039465353
rework xilinx fpga spiOverJtag to respect model/package
2021-04-19 21:17:08 +02:00
922d3b0b56
xilinx: add xca50t support
2020-12-08 07:32:30 +01:00
edad461d88
add support for artix-7 200t and nexys video board
2020-10-15 16:07:55 +02:00
20d72de3c4
spiOverJtag: add xc7a100 bitstream
2020-09-22 15:02:42 +02:00
ced3363ee5
Support Arty S7-50
...
Added Xilinx xc7s50 device to part.hpp; added support for generating
spiOverJtag bitstream file for that device and added bitstream to repo.
Converted xdc file from DOC line endings to native line endings.
2020-08-08 11:42:38 +02:00
5acae16a82
add design and bitstream to access SPI through JTAG
2019-10-05 19:03:28 +02:00
Gwenhael Goavec-Merou
Billy Stevens
Giuseppe Gebbia
Staf Verhaegen