af9f25e985
Various filter examples using Laplace expression x_fer
2023-01-20 15:07:37 +01:00
925dc55a73
rename example file
2022-12-11 15:28:23 +01:00
ca1974ff37
Examples moved to folder /various
2022-12-11 15:28:01 +01:00
751019b447
Examples for d_pwm and d_osc
2022-12-11 15:27:42 +01:00
ec6a902fb9
Fix a bug in simple diode, when ilimit is set, but not epsilon.
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Make model more similar to LTSPICE
Add an example
2022-10-08 16:50:38 +02:00
cb42895dad
example for pwlts source code model
2022-10-07 13:39:33 +02:00
c8ed9590b7
Handle the case when control voltages on and off are equal.
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Update the linear switch: add the limits to resistance ron, roff
Update the log switch: correct the resistance calculation for
von < voff
Add some examples for the pswitch.
2022-10-07 13:12:56 +02:00
2deefe1fbc
New tables for MOS devices
2022-10-07 13:11:18 +02:00
765d2e8a0e
Return data to input directory.
2022-10-07 13:10:51 +02:00
a69dd1bcde
Simplify the NMOS or PMOS selection by setting only one parameter
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'mostype'
ngspice-37+ is required.
2022-10-07 13:10:06 +02:00
afde37c35d
add y-axis label
2022-02-01 12:21:08 +01:00
2981d0f56d
Use 'esave none' to reduce memory consumption.
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Only analg nodes are to be saved.
2022-01-09 10:58:51 +01:00
738ac4863c
Obtain memory and simulation time
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Add rusage information command
2022-01-03 22:11:15 +01:00
70e4d2157e
New names for the (experimental) ramp-time capacitor and inductor code models
2021-10-29 16:28:57 +02:00
05624bedd3
move examples file to prpoer xspice folder
2021-08-03 15:53:11 +02:00
6c3b14e396
make simulation faster, allow batch mode
2020-03-15 08:50:57 +01:00
9dec5f5f1e
An example for non-convergence of the pll if the stepszelimit is removed.
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Adding a somewhat relaxed limit by TMAX in the tran command will speed
up the simulation by a factor of 1.5 without compromising the result.
2019-03-21 20:26:24 +01:00
f46135cc03
script to start GTKWave
2018-10-13 22:47:53 +02:00
bd5379d760
one tran analysis is sufficient
2018-09-14 20:34:27 +02:00
3138811acd
README for the table model and its table directory
2018-09-02 18:05:10 +02:00
925cb49ff2
Add some description, correct minor bugs.
2018-09-02 18:05:06 +02:00
800c9711f2
add a flag 'type of the union' to safely free model->param[i]->element,
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if it contain a malloced string
2018-08-28 21:29:05 +02:00
f988dfad93
add plotting to the example
2018-08-27 12:20:30 +02:00
9becf1313a
complex model: a script loads two circuits with MOS and
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bipolar table models, and run a sequence of dc simulations
with switching the circuit.
2018-08-18 11:28:13 +02:00
bb86b137a7
add 'reset' to fix a huge memory leak
2018-08-18 11:27:38 +02:00
e99985a156
add two commands 'reset' to avoid huge memory leak
2018-08-18 11:27:08 +02:00
b0883ffc5d
add the reset command to avoid huge memory leak
2018-08-18 11:26:55 +02:00
83db375fe8
add plotting with internal analog plot
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and gtkwave for digital data
2018-08-10 19:55:52 +02:00
e8e5823955
add a hint to run the table generator before
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simulation is possible
2018-08-10 19:41:02 +02:00
c8705147b0
Original examples fixed and moved to here
2018-07-28 13:45:41 +02:00
0de66ea3b8
XSPICE state machine example
2018-07-28 12:54:02 +02:00
a5e382d0ea
XSPICE d_source examples
2018-07-28 12:52:21 +02:00
6e452b1e7c
xspice filesource example
2018-07-28 11:45:33 +02:00
6ac19b03a3
examples/xspice/d_lut/mult4bit.spi, example for d_lut and d_genlut
2017-05-01 22:11:50 +02:00
30aa5ec0b7
examples/xspice/table, examples for the table2d and table3d code models
2017-04-30 17:01:07 +02:00
fb90bebcab
example for .options interp (reduces memory, speeds up plotting)
2014-02-01 14:31:38 +01:00
5ed51c2668
example input file as cited in manual
2012-10-21 11:50:23 +02:00
177964b4a6
XSPICE example: delta-sigma converter
2012-08-14 23:06:34 +02:00
5d0c3182d3
add BSIM3 model parameters for loop filer with transistor charge pump
2012-08-05 20:15:53 +02:00
96dd397251
correct the plot output
2012-08-05 12:06:11 +02:00
19a67fb7c5
pll: just include one of the two vco available
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(avoid a bug which has been removed only recently)
2012-08-04 00:22:25 +02:00
a0db6f0ccd
update to XSPICE phase-locked loop example
2012-08-03 23:22:54 +02:00
6cd13e0475
pll-xspice-fstep.cir: pll with ref frequency steps
2012-07-31 18:05:10 +02:00
c31fc334f6
pll-xspice.cir: save command added
2012-07-31 17:31:28 +02:00
c0b5a78097
new XSPICE example: use trtol=1
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less ripple, but longer simulation time
2012-07-30 00:01:56 +02:00
85ece25a3a
new XSPICE example: mixed mode pll circuit
2012-07-29 13:52:23 +02:00
926a7b338c
'filesource' test
2011-06-23 19:56:46 +00:00
b1f6da536a
whitespace cleanup, add missing trailing newlines
2010-09-07 19:04:20 +00:00
adc911d412
xspice examples
2010-05-14 20:33:20 +00:00
57097463ee
xspice examples
2009-12-21 18:23:55 +00:00
Holger Vogt
dwarning
Tim Edwards
h_vogt
rlar