Commit Graph

106 Commits

Author SHA1 Message Date
rlar 06f2ce9087 examples/tclspice, cleanup "wish" trampoline and add emacs mode specification 2017-10-19 17:57:37 +02:00
rlar fad7605c21 examples/tclspice, rename test bench scripts, .tcl --> .sh
Customers have been mislead to invoke them with tclsh or wish.
Actually some are indeed tcl scripts which could be invoked with "wish"
All these scripts include a #!/bin/sh trampoline to the proper interpreter.
No script was meant to be interpreted by tclsh
2017-10-19 17:57:03 +02:00
dwarning 22599ca096 examples/tclspice, explicit blt::vector create
in blt2.5 "create" is not the default vector operation anymore
2017-10-19 17:50:34 +02:00
dwarning 8539029e6d reduce simulation time for tcl examples 2017-10-12 11:22:17 +02:00
dwarning 8316af27cf autosclae for psd plot 2017-09-02 10:25:31 +02:00
dwarning a1d27b4257 dio, introduce qd as an alias for diode charge to get the right unit in plotting 2017-08-03 17:03:10 +02:00
dwarning 458be1a82e bjt and diode: examples for plotting small signal parameters in a dc sweep 2017-08-03 17:03:07 +02:00
Tim Edwards 6ac19b03a3 examples/xspice/d_lut/mult4bit.spi, example for d_lut and d_genlut 2017-05-01 22:11:50 +02:00
h_vogt 30aa5ec0b7 examples/xspice/table, examples for the table2d and table3d code models 2017-04-30 17:01:07 +02:00
h_vogt 370e52736f MC_ring.sp, replace variables by vectors in the loop 2017-02-09 22:06:04 +01:00
dwarning d45736855e binning constraints are wrong and obsolete for the examples 2017-02-03 13:32:13 +01:00
rlar 13decee3ed examples/inductive-systems/*, add test files 2017-01-02 20:02:19 +01:00
h_vogt 0252f7b9cb examples/various/ro_17_4.cir, a ring oscillator with BSIM4 using 'xmu' 2016-07-16 15:25:41 +02:00
h_vogt 494a58cca9 main.c, add variable 'batchmode'
which is set when command line option `-b' is active
2016-03-26 22:14:11 +01:00
h_vogt 8b709a394f cpitf.c, cp_istrue(), avoid surplus Warning Message when an `if' condition expands to nothing
When in expression
  if $var ...
the variable `var' was undefined, then
ngspice printed a surplus warning message
>  Warning: NULL arithmetic expression
in addition to the error message
>  Error: var: no such variable.

ngspice continues to process the conditional construct
  and evaluates the condition as "FALSE"
2016-03-26 21:58:39 +01:00
rlar dbb958fff8 introduce examples/control_structs/if-test-1.cir 2016-03-26 21:58:11 +01:00
dwarning 11a75fd1e3 move to the actual bsim4 version to avoid needless warnings 2014-09-10 13:33:22 +02:00
h_vogt fb90bebcab example for .options interp (reduces memory, speeds up plotting) 2014-02-01 14:31:38 +01:00
h_vogt dab52db6da monte carlo with control script and MOS parameter set containing AGAUSS parameter variations (like commercial parameter libraries) 2014-01-11 16:24:27 +01:00
dwarning d65e0fa855 two examples to show fft/ifft vector command 2014-01-02 09:54:02 +01:00
dwarning 29f6b5c618 soa check example 2014-01-02 09:32:57 +01:00
dwarning 5f5a22ec3e suppress a warning by inserting the default diode model 2013-12-31 16:19:54 +01:00
Stefano Perticaroli 79bffc78a1 next version of PSS2
which was reviewed and rewritten on branch `PSS-2-try-to-rebase+4'
by Stefano Perticaroli and Francesco Lannutti
2012-12-28 18:15:37 +01:00
rlar 0be61b3e5a remove PSS2 2012-12-28 18:10:05 +01:00
h_vogt f04bfb3a0b input examples drawn from manual 2012-11-17 16:32:08 +01:00
h_vogt 04adbd7d3b examples/snapshot: start, interrupt and resume simulation 2012-11-03 20:08:23 +01:00
h_vogt 5ed51c2668 example input file as cited in manual 2012-10-21 11:50:23 +02:00
rlar 2bcadae16c missing newline at end of file 2012-10-20 19:49:10 +02:00
h_vogt 3ca1235602 gnuplot.c: improve scaling of y axis 2012-10-09 19:47:24 +02:00
h_vogt 177964b4a6 XSPICE example: delta-sigma converter 2012-08-14 23:06:34 +02:00
h_vogt f1d0d40753 demonstrate effect of W crossing binning limits 2012-08-07 23:11:52 +02:00
h_vogt 5d0c3182d3 add BSIM3 model parameters for loop filer with transistor charge pump 2012-08-05 20:15:53 +02:00
h_vogt e1df8eb739 example, add 'alter @m1[w]=11u' using binning and model change 2012-08-05 20:06:06 +02:00
dwarning 96dd397251 correct the plot output 2012-08-05 12:06:11 +02:00
h_vogt 19a67fb7c5 pll: just include one of the two vco available
(avoid a bug which has been removed only recently)
2012-08-04 00:22:25 +02:00
h_vogt a0db6f0ccd update to XSPICE phase-locked loop example 2012-08-03 23:22:54 +02:00
h_vogt 6cd13e0475 pll-xspice-fstep.cir: pll with ref frequency steps 2012-07-31 18:05:10 +02:00
h_vogt c31fc334f6 pll-xspice.cir: save command added 2012-07-31 17:31:28 +02:00
h_vogt c0b5a78097 new XSPICE example: use trtol=1
less ripple, but longer simulation time
2012-07-30 00:01:56 +02:00
h_vogt 85ece25a3a new XSPICE example: mixed mode pll circuit 2012-07-29 13:52:23 +02:00
h_vogt d072ab80d1 memristor example, parameters changed 2012-06-13 19:15:26 +02:00
h_vogt fde8c46356 add ac and dc simulation to memristor model 2012-06-13 19:15:25 +02:00
h_vogt f53eb5cf78 memristor code model in extradev 2012-06-13 19:15:24 +02:00
h_vogt 1cbc41cc32 memristor subcircuit model example 2012-06-13 19:15:19 +02:00
rlar 3d34b22ebf fix file modes 2012-06-12 21:26:29 +02:00
h_vogt 890d049a5b uic to end of line in pss 2011-08-09 19:58:40 +00:00
pnenzi af16208f9c Moved pss example files from tests directory to examples directory 2011-08-07 18:51:05 +00:00
h_vogt 926a7b338c 'filesource' test 2011-06-23 19:56:46 +00:00
h_vogt 747c606e30 remove bug in command meas, allow / and \ in Windows file paths 2011-06-18 17:45:43 +00:00
dwarning c7763a6e83 to much puts 2011-03-10 20:12:07 +00:00