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889 Commits

Author SHA1 Message Date
Miodrag Milanovic e3ce2f544d noreturn have to be void, so there is no UB 2018-07-25 11:58:23 +02:00
Miodrag Milanovic 6b8b067b1a Fix for zero length case 2018-07-25 09:37:22 +02:00
Miodrag Milanovic 5e58a329e6 Make thread check portable 2018-07-25 09:32:13 +02:00
Miodrag Milanovic 8b60ed5fd1 Fix bba to compile on windows (no unistd there) 2018-07-25 09:31:44 +02:00
Clifford Wolf c3859072d4 Use bbasm to create iCE40 chipdb 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-24 21:10:42 +02:00
Clifford Wolf 1b7b4ece06 Add bba parser 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-24 17:59:20 +02:00
Serge Bazanski 62bcda87bd Merge branch 'q3k/pll' into 'master' 
ice40: support CORE PLLs

See merge request SymbioticEDA/nextpnr!17
 2018-07-24 15:01:12 +00:00
Sergiusz Bazanski 2039112a47 ice40: after review 2018-07-24 15:59:18 +01:00
Sergiusz Bazanski b31e95f82c Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr into q3k/pll 2018-07-24 15:54:03 +01:00
David Shah c57463e87b Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr 2018-07-24 16:38:45 +02:00
David Shah 3931c84fed ecp5: Architecture testing and fixing 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-07-24 16:38:35 +02:00
Clifford Wolf a82a8840d2 Add missing implementations of generic Arch methods 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-24 16:28:06 +02:00
David Shah 974ca143e8 Remove implementations of deprecated APIs 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-07-24 16:09:29 +02:00
David Shah 5a170f286c ice40: Remove use of deprecated APIs 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-07-24 15:52:56 +02:00
David Shah e200c281d9 common: Remove use of deprecated APIs 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-07-24 15:45:49 +02:00
Clifford Wolf c0c8dc7602 Remove uphill/downhill bel pins from ice40 db 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-24 15:44:39 +02:00
David Shah 942c552e07 Add bbasm target, use as passthru in iCE40 builder 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-07-24 15:31:00 +02:00
David Shah 7387721940 Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr 2018-07-24 12:58:07 +02:00
David Shah 35a6bc496e ecp5: Support for differential IO 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-07-24 12:57:54 +02:00
Clifford Wolf c06bca0713 Add dummy bba main 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-24 12:27:41 +02:00
Clifford Wolf 0fe6fe501a Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr 2018-07-24 12:24:31 +02:00
Clifford Wolf c3cbc274ac Change G_FRAME color to be significantly darker than G_ACTIVE 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-24 12:24:14 +02:00
David Shah f61e9e5609 ecp5: Set BANKREF to correct VccIO 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-07-24 12:22:57 +02:00
Clifford Wolf 9d38907e95 Add G_ARROW (for now same look as G_LINE) 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-24 12:18:01 +02:00
David Shah 7858663aa7 timing: Model clock to Q times 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-07-24 11:46:14 +02:00
David Shah 4359197dfe ice40: Trim BRAM constant inputs, reduces routing congestion around BRAM 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-07-24 11:21:10 +02:00
David Shah a09f95bb06 ice40: Fix SPRAM and other primitives in corners other than (0, 0) 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-07-24 11:16:33 +02:00
Sergiusz Bazanski 90ba958abe ice40: fixes before review 2018-07-24 03:19:22 +01:00
Sergiusz Bazanski eaae1d299c ice40: move PLL->IO from pseudo pip to second uphill bel 2018-07-24 02:55:40 +01:00
Sergiusz Bazanski 65ceb20784 ice40: emit list of upbels in chipdb 2018-07-24 02:55:40 +01:00
Sergiusz Bazanski fae7994bc3 clang-format 2018-07-24 02:55:40 +01:00
Sergiusz Bazanski dbf79d78bb ice40: A slightly nicer way to do this. 2018-07-24 02:55:40 +01:00
Sergiusz Bazanski 065ea95eab ice40: Move spliceLUT back to pack.cc 2018-07-24 02:55:40 +01:00
Sergiusz Bazanski 1d3147e26a ice40: Prevent placement of SB_IOs in IO blocks used by PLL outputs 2018-07-24 02:55:40 +01:00
Sergiusz Bazanski e6c7b14465 ice40: Refactor PLL/LOCK LUT splicing out into Arch:: 2018-07-24 02:55:40 +01:00
Sergiusz Bazanski 69233385f8 ice40: Emit feed-through LUTs for PLL/LOCK 2018-07-24 02:55:40 +01:00
Sergiusz Bazanski db31c0625b ice40: Fail early on SB_PLL40_*_PAD cells 2018-07-24 02:55:38 +01:00
Sergiusz Bazanski 2b1f7875bb ice40: Implement emitting PLLs 2018-07-24 02:38:10 +01:00
Miodrag Milanovic 139f7e0903 make update of tree for nets and cells partial 2018-07-23 19:54:36 +02:00
David Shah 730e56e3dd ecp5: Add some more PIO helper functions 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-07-23 19:15:59 +02:00
David Shah baa673f9ed ecp5: Helper functions for I/O placement and checking 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-07-23 18:56:46 +02:00
Miodrag Milanovic 7fd45c0cdf Proper highlight/selected cleanup on context re-init 2018-07-23 17:10:06 +02:00
Miodrag Milanovic eeb6203c9d write frequency info 2018-07-23 16:55:40 +02:00
Miodrag Milanovic 2bf39cbdc5 always assign budget before placing 2018-07-23 16:53:08 +02:00
Clifford Wolf e647604e2a Add Context::archcheck() and "nextpnr-ice40 --test" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-23 14:03:23 +02:00
Clifford Wolf 90fe002a36 Remove getBelsByType() API 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-23 13:16:27 +02:00
David Shah bfa1137fe0 clangformat 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-07-23 13:02:57 +02:00
David Shah a3864c2936 ecp5: Add Add getGridDimX(), getGridDimY(), getTileDimZ() 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-07-23 13:02:37 +02:00
Clifford Wolf 38962d0f02 clangformat 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-23 12:45:31 +02:00
Clifford Wolf a436facfd0 Add fallback to estimateDelay() in getNetinfoRouteDelay() 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-07-23 12:44:26 +02:00